/[pcre]/code/trunk/sljit/sljitNativeARM_32.c
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Contents of /code/trunk/sljit/sljitNativeARM_32.c

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Revision 1493 - (show annotations)
Wed Jul 9 04:41:15 2014 UTC (5 years, 1 month ago) by zherczeg
File MIME type: text/plain
File size: 79397 byte(s)
Minor JIT compiler update.
1 /*
2 * Stack-less Just-In-Time compiler
3 *
4 * Copyright 2009-2012 Zoltan Herczeg (hzmester@freemail.hu). All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without modification, are
7 * permitted provided that the following conditions are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright notice, this list of
10 * conditions and the following disclaimer.
11 *
12 * 2. Redistributions in binary form must reproduce the above copyright notice, this list
13 * of conditions and the following disclaimer in the documentation and/or other materials
14 * provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER(S) AND CONTRIBUTORS ``AS IS'' AND ANY
17 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
19 * SHALL THE COPYRIGHT HOLDER(S) OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
21 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
22 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
24 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 */
26
27 SLJIT_API_FUNC_ATTRIBUTE SLJIT_CONST char* sljit_get_platform_name(void)
28 {
29 #if (defined SLJIT_CONFIG_ARM_V7 && SLJIT_CONFIG_ARM_V7)
30 return "ARMv7" SLJIT_CPUINFO;
31 #elif (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
32 return "ARMv5" SLJIT_CPUINFO;
33 #else
34 #error "Internal error: Unknown ARM architecture"
35 #endif
36 }
37
38 /* Last register + 1. */
39 #define TMP_REG1 (SLJIT_NUMBER_OF_REGISTERS + 2)
40 #define TMP_REG2 (SLJIT_NUMBER_OF_REGISTERS + 3)
41 #define TMP_REG3 (SLJIT_NUMBER_OF_REGISTERS + 4)
42 #define TMP_PC (SLJIT_NUMBER_OF_REGISTERS + 5)
43
44 #define TMP_FREG1 (0)
45 #define TMP_FREG2 (SLJIT_NUMBER_OF_FLOAT_REGISTERS + 1)
46
47 /* In ARM instruction words.
48 Cache lines are usually 32 byte aligned. */
49 #define CONST_POOL_ALIGNMENT 8
50 #define CONST_POOL_EMPTY 0xffffffff
51
52 #define ALIGN_INSTRUCTION(ptr) \
53 (sljit_uw*)(((sljit_uw)(ptr) + (CONST_POOL_ALIGNMENT * sizeof(sljit_uw)) - 1) & ~((CONST_POOL_ALIGNMENT * sizeof(sljit_uw)) - 1))
54 #define MAX_DIFFERENCE(max_diff) \
55 (((max_diff) / (sljit_si)sizeof(sljit_uw)) - (CONST_POOL_ALIGNMENT - 1))
56
57 /* See sljit_emit_enter and sljit_emit_op0 if you want to change them. */
58 static SLJIT_CONST sljit_ub reg_map[SLJIT_NUMBER_OF_REGISTERS + 6] = {
59 0, 0, 1, 2, 11, 10, 9, 8, 7, 6, 5, 4, 13, 3, 12, 14, 15
60 };
61
62 #define RM(rm) (reg_map[rm])
63 #define RD(rd) (reg_map[rd] << 12)
64 #define RN(rn) (reg_map[rn] << 16)
65
66 /* --------------------------------------------------------------------- */
67 /* Instrucion forms */
68 /* --------------------------------------------------------------------- */
69
70 /* The instruction includes the AL condition.
71 INST_NAME - CONDITIONAL remove this flag. */
72 #define COND_MASK 0xf0000000
73 #define CONDITIONAL 0xe0000000
74 #define PUSH_POOL 0xff000000
75
76 /* DP - Data Processing instruction (use with EMIT_DATA_PROCESS_INS). */
77 #define ADC_DP 0x5
78 #define ADD_DP 0x4
79 #define AND_DP 0x0
80 #define B 0xea000000
81 #define BIC_DP 0xe
82 #define BL 0xeb000000
83 #define BLX 0xe12fff30
84 #define BX 0xe12fff10
85 #define CLZ 0xe16f0f10
86 #define CMP_DP 0xa
87 #define BKPT 0xe1200070
88 #define EOR_DP 0x1
89 #define MOV_DP 0xd
90 #define MUL 0xe0000090
91 #define MVN_DP 0xf
92 #define NOP 0xe1a00000
93 #define ORR_DP 0xc
94 #define PUSH 0xe92d0000
95 #define POP 0xe8bd0000
96 #define RSB_DP 0x3
97 #define RSC_DP 0x7
98 #define SBC_DP 0x6
99 #define SMULL 0xe0c00090
100 #define SUB_DP 0x2
101 #define UMULL 0xe0800090
102 #define VABS_F32 0xeeb00ac0
103 #define VADD_F32 0xee300a00
104 #define VCMP_F32 0xeeb40a40
105 #define VCVT_F32_S32 0xeeb80ac0
106 #define VCVT_F64_F32 0xeeb70ac0
107 #define VCVT_S32_F32 0xeebd0ac0
108 #define VDIV_F32 0xee800a00
109 #define VMOV_F32 0xeeb00a40
110 #define VMOV 0xee000a10
111 #define VMRS 0xeef1fa10
112 #define VMUL_F32 0xee200a00
113 #define VNEG_F32 0xeeb10a40
114 #define VSTR_F32 0xed000a00
115 #define VSUB_F32 0xee300a40
116
117 #if (defined SLJIT_CONFIG_ARM_V7 && SLJIT_CONFIG_ARM_V7)
118 /* Arm v7 specific instructions. */
119 #define MOVW 0xe3000000
120 #define MOVT 0xe3400000
121 #define SXTB 0xe6af0070
122 #define SXTH 0xe6bf0070
123 #define UXTB 0xe6ef0070
124 #define UXTH 0xe6ff0070
125 #endif
126
127 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
128
129 static sljit_si push_cpool(struct sljit_compiler *compiler)
130 {
131 /* Pushing the constant pool into the instruction stream. */
132 sljit_uw* inst;
133 sljit_uw* cpool_ptr;
134 sljit_uw* cpool_end;
135 sljit_si i;
136
137 /* The label could point the address after the constant pool. */
138 if (compiler->last_label && compiler->last_label->size == compiler->size)
139 compiler->last_label->size += compiler->cpool_fill + (CONST_POOL_ALIGNMENT - 1) + 1;
140
141 SLJIT_ASSERT(compiler->cpool_fill > 0 && compiler->cpool_fill <= CPOOL_SIZE);
142 inst = (sljit_uw*)ensure_buf(compiler, sizeof(sljit_uw));
143 FAIL_IF(!inst);
144 compiler->size++;
145 *inst = 0xff000000 | compiler->cpool_fill;
146
147 for (i = 0; i < CONST_POOL_ALIGNMENT - 1; i++) {
148 inst = (sljit_uw*)ensure_buf(compiler, sizeof(sljit_uw));
149 FAIL_IF(!inst);
150 compiler->size++;
151 *inst = 0;
152 }
153
154 cpool_ptr = compiler->cpool;
155 cpool_end = cpool_ptr + compiler->cpool_fill;
156 while (cpool_ptr < cpool_end) {
157 inst = (sljit_uw*)ensure_buf(compiler, sizeof(sljit_uw));
158 FAIL_IF(!inst);
159 compiler->size++;
160 *inst = *cpool_ptr++;
161 }
162 compiler->cpool_diff = CONST_POOL_EMPTY;
163 compiler->cpool_fill = 0;
164 return SLJIT_SUCCESS;
165 }
166
167 static sljit_si push_inst(struct sljit_compiler *compiler, sljit_uw inst)
168 {
169 sljit_uw* ptr;
170
171 if (SLJIT_UNLIKELY(compiler->cpool_diff != CONST_POOL_EMPTY && compiler->size - compiler->cpool_diff >= MAX_DIFFERENCE(4092)))
172 FAIL_IF(push_cpool(compiler));
173
174 ptr = (sljit_uw*)ensure_buf(compiler, sizeof(sljit_uw));
175 FAIL_IF(!ptr);
176 compiler->size++;
177 *ptr = inst;
178 return SLJIT_SUCCESS;
179 }
180
181 static sljit_si push_inst_with_literal(struct sljit_compiler *compiler, sljit_uw inst, sljit_uw literal)
182 {
183 sljit_uw* ptr;
184 sljit_uw cpool_index = CPOOL_SIZE;
185 sljit_uw* cpool_ptr;
186 sljit_uw* cpool_end;
187 sljit_ub* cpool_unique_ptr;
188
189 if (SLJIT_UNLIKELY(compiler->cpool_diff != CONST_POOL_EMPTY && compiler->size - compiler->cpool_diff >= MAX_DIFFERENCE(4092)))
190 FAIL_IF(push_cpool(compiler));
191 else if (compiler->cpool_fill > 0) {
192 cpool_ptr = compiler->cpool;
193 cpool_end = cpool_ptr + compiler->cpool_fill;
194 cpool_unique_ptr = compiler->cpool_unique;
195 do {
196 if ((*cpool_ptr == literal) && !(*cpool_unique_ptr)) {
197 cpool_index = cpool_ptr - compiler->cpool;
198 break;
199 }
200 cpool_ptr++;
201 cpool_unique_ptr++;
202 } while (cpool_ptr < cpool_end);
203 }
204
205 if (cpool_index == CPOOL_SIZE) {
206 /* Must allocate a new entry in the literal pool. */
207 if (compiler->cpool_fill < CPOOL_SIZE) {
208 cpool_index = compiler->cpool_fill;
209 compiler->cpool_fill++;
210 }
211 else {
212 FAIL_IF(push_cpool(compiler));
213 cpool_index = 0;
214 compiler->cpool_fill = 1;
215 }
216 }
217
218 SLJIT_ASSERT((inst & 0xfff) == 0);
219 ptr = (sljit_uw*)ensure_buf(compiler, sizeof(sljit_uw));
220 FAIL_IF(!ptr);
221 compiler->size++;
222 *ptr = inst | cpool_index;
223
224 compiler->cpool[cpool_index] = literal;
225 compiler->cpool_unique[cpool_index] = 0;
226 if (compiler->cpool_diff == CONST_POOL_EMPTY)
227 compiler->cpool_diff = compiler->size;
228 return SLJIT_SUCCESS;
229 }
230
231 static sljit_si push_inst_with_unique_literal(struct sljit_compiler *compiler, sljit_uw inst, sljit_uw literal)
232 {
233 sljit_uw* ptr;
234 if (SLJIT_UNLIKELY((compiler->cpool_diff != CONST_POOL_EMPTY && compiler->size - compiler->cpool_diff >= MAX_DIFFERENCE(4092)) || compiler->cpool_fill >= CPOOL_SIZE))
235 FAIL_IF(push_cpool(compiler));
236
237 SLJIT_ASSERT(compiler->cpool_fill < CPOOL_SIZE && (inst & 0xfff) == 0);
238 ptr = (sljit_uw*)ensure_buf(compiler, sizeof(sljit_uw));
239 FAIL_IF(!ptr);
240 compiler->size++;
241 *ptr = inst | compiler->cpool_fill;
242
243 compiler->cpool[compiler->cpool_fill] = literal;
244 compiler->cpool_unique[compiler->cpool_fill] = 1;
245 compiler->cpool_fill++;
246 if (compiler->cpool_diff == CONST_POOL_EMPTY)
247 compiler->cpool_diff = compiler->size;
248 return SLJIT_SUCCESS;
249 }
250
251 static SLJIT_INLINE sljit_si prepare_blx(struct sljit_compiler *compiler)
252 {
253 /* Place for at least two instruction (doesn't matter whether the first has a literal). */
254 if (SLJIT_UNLIKELY(compiler->cpool_diff != CONST_POOL_EMPTY && compiler->size - compiler->cpool_diff >= MAX_DIFFERENCE(4088)))
255 return push_cpool(compiler);
256 return SLJIT_SUCCESS;
257 }
258
259 static SLJIT_INLINE sljit_si emit_blx(struct sljit_compiler *compiler)
260 {
261 /* Must follow tightly the previous instruction (to be able to convert it to bl instruction). */
262 SLJIT_ASSERT(compiler->cpool_diff == CONST_POOL_EMPTY || compiler->size - compiler->cpool_diff < MAX_DIFFERENCE(4092));
263 return push_inst(compiler, BLX | RM(TMP_REG1));
264 }
265
266 static sljit_uw patch_pc_relative_loads(sljit_uw *last_pc_patch, sljit_uw *code_ptr, sljit_uw* const_pool, sljit_uw cpool_size)
267 {
268 sljit_uw diff;
269 sljit_uw ind;
270 sljit_uw counter = 0;
271 sljit_uw* clear_const_pool = const_pool;
272 sljit_uw* clear_const_pool_end = const_pool + cpool_size;
273
274 SLJIT_ASSERT(const_pool - code_ptr <= CONST_POOL_ALIGNMENT);
275 /* Set unused flag for all literals in the constant pool.
276 I.e.: unused literals can belong to branches, which can be encoded as B or BL.
277 We can "compress" the constant pool by discarding these literals. */
278 while (clear_const_pool < clear_const_pool_end)
279 *clear_const_pool++ = (sljit_uw)(-1);
280
281 while (last_pc_patch < code_ptr) {
282 /* Data transfer instruction with Rn == r15. */
283 if ((*last_pc_patch & 0x0c0f0000) == 0x040f0000) {
284 diff = const_pool - last_pc_patch;
285 ind = (*last_pc_patch) & 0xfff;
286
287 /* Must be a load instruction with immediate offset. */
288 SLJIT_ASSERT(ind < cpool_size && !(*last_pc_patch & (1 << 25)) && (*last_pc_patch & (1 << 20)));
289 if ((sljit_si)const_pool[ind] < 0) {
290 const_pool[ind] = counter;
291 ind = counter;
292 counter++;
293 }
294 else
295 ind = const_pool[ind];
296
297 SLJIT_ASSERT(diff >= 1);
298 if (diff >= 2 || ind > 0) {
299 diff = (diff + ind - 2) << 2;
300 SLJIT_ASSERT(diff <= 0xfff);
301 *last_pc_patch = (*last_pc_patch & ~0xfff) | diff;
302 }
303 else
304 *last_pc_patch = (*last_pc_patch & ~(0xfff | (1 << 23))) | 0x004;
305 }
306 last_pc_patch++;
307 }
308 return counter;
309 }
310
311 /* In some rare ocasions we may need future patches. The probability is close to 0 in practice. */
312 struct future_patch {
313 struct future_patch* next;
314 sljit_si index;
315 sljit_si value;
316 };
317
318 static SLJIT_INLINE sljit_si resolve_const_pool_index(struct future_patch **first_patch, sljit_uw cpool_current_index, sljit_uw *cpool_start_address, sljit_uw *buf_ptr)
319 {
320 sljit_si value;
321 struct future_patch *curr_patch, *prev_patch;
322
323 /* Using the values generated by patch_pc_relative_loads. */
324 if (!*first_patch)
325 value = (sljit_si)cpool_start_address[cpool_current_index];
326 else {
327 curr_patch = *first_patch;
328 prev_patch = 0;
329 while (1) {
330 if (!curr_patch) {
331 value = (sljit_si)cpool_start_address[cpool_current_index];
332 break;
333 }
334 if ((sljit_uw)curr_patch->index == cpool_current_index) {
335 value = curr_patch->value;
336 if (prev_patch)
337 prev_patch->next = curr_patch->next;
338 else
339 *first_patch = curr_patch->next;
340 SLJIT_FREE(curr_patch);
341 break;
342 }
343 prev_patch = curr_patch;
344 curr_patch = curr_patch->next;
345 }
346 }
347
348 if (value >= 0) {
349 if ((sljit_uw)value > cpool_current_index) {
350 curr_patch = (struct future_patch*)SLJIT_MALLOC(sizeof(struct future_patch));
351 if (!curr_patch) {
352 while (*first_patch) {
353 curr_patch = *first_patch;
354 *first_patch = (*first_patch)->next;
355 SLJIT_FREE(curr_patch);
356 }
357 return SLJIT_ERR_ALLOC_FAILED;
358 }
359 curr_patch->next = *first_patch;
360 curr_patch->index = value;
361 curr_patch->value = cpool_start_address[value];
362 *first_patch = curr_patch;
363 }
364 cpool_start_address[value] = *buf_ptr;
365 }
366 return SLJIT_SUCCESS;
367 }
368
369 #else
370
371 static sljit_si push_inst(struct sljit_compiler *compiler, sljit_uw inst)
372 {
373 sljit_uw* ptr;
374
375 ptr = (sljit_uw*)ensure_buf(compiler, sizeof(sljit_uw));
376 FAIL_IF(!ptr);
377 compiler->size++;
378 *ptr = inst;
379 return SLJIT_SUCCESS;
380 }
381
382 static SLJIT_INLINE sljit_si emit_imm(struct sljit_compiler *compiler, sljit_si reg, sljit_sw imm)
383 {
384 FAIL_IF(push_inst(compiler, MOVW | RD(reg) | ((imm << 4) & 0xf0000) | (imm & 0xfff)));
385 return push_inst(compiler, MOVT | RD(reg) | ((imm >> 12) & 0xf0000) | ((imm >> 16) & 0xfff));
386 }
387
388 #endif
389
390 static SLJIT_INLINE sljit_si detect_jump_type(struct sljit_jump *jump, sljit_uw *code_ptr, sljit_uw *code)
391 {
392 sljit_sw diff;
393
394 if (jump->flags & SLJIT_REWRITABLE_JUMP)
395 return 0;
396
397 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
398 if (jump->flags & IS_BL)
399 code_ptr--;
400
401 if (jump->flags & JUMP_ADDR)
402 diff = ((sljit_sw)jump->u.target - (sljit_sw)(code_ptr + 2));
403 else {
404 SLJIT_ASSERT(jump->flags & JUMP_LABEL);
405 diff = ((sljit_sw)(code + jump->u.label->size) - (sljit_sw)(code_ptr + 2));
406 }
407
408 /* Branch to Thumb code has not been optimized yet. */
409 if (diff & 0x3)
410 return 0;
411
412 if (jump->flags & IS_BL) {
413 if (diff <= 0x01ffffff && diff >= -0x02000000) {
414 *code_ptr = (BL - CONDITIONAL) | (*(code_ptr + 1) & COND_MASK);
415 jump->flags |= PATCH_B;
416 return 1;
417 }
418 }
419 else {
420 if (diff <= 0x01ffffff && diff >= -0x02000000) {
421 *code_ptr = (B - CONDITIONAL) | (*code_ptr & COND_MASK);
422 jump->flags |= PATCH_B;
423 }
424 }
425 #else
426 if (jump->flags & JUMP_ADDR)
427 diff = ((sljit_sw)jump->u.target - (sljit_sw)code_ptr);
428 else {
429 SLJIT_ASSERT(jump->flags & JUMP_LABEL);
430 diff = ((sljit_sw)(code + jump->u.label->size) - (sljit_sw)code_ptr);
431 }
432
433 /* Branch to Thumb code has not been optimized yet. */
434 if (diff & 0x3)
435 return 0;
436
437 if (diff <= 0x01ffffff && diff >= -0x02000000) {
438 code_ptr -= 2;
439 *code_ptr = ((jump->flags & IS_BL) ? (BL - CONDITIONAL) : (B - CONDITIONAL)) | (code_ptr[2] & COND_MASK);
440 jump->flags |= PATCH_B;
441 return 1;
442 }
443 #endif
444 return 0;
445 }
446
447 static SLJIT_INLINE void inline_set_jump_addr(sljit_uw addr, sljit_uw new_addr, sljit_si flush)
448 {
449 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
450 sljit_uw *ptr = (sljit_uw*)addr;
451 sljit_uw *inst = (sljit_uw*)ptr[0];
452 sljit_uw mov_pc = ptr[1];
453 sljit_si bl = (mov_pc & 0x0000f000) != RD(TMP_PC);
454 sljit_sw diff = (sljit_sw)(((sljit_sw)new_addr - (sljit_sw)(inst + 2)) >> 2);
455
456 if (diff <= 0x7fffff && diff >= -0x800000) {
457 /* Turn to branch. */
458 if (!bl) {
459 inst[0] = (mov_pc & COND_MASK) | (B - CONDITIONAL) | (diff & 0xffffff);
460 if (flush) {
461 SLJIT_CACHE_FLUSH(inst, inst + 1);
462 }
463 } else {
464 inst[0] = (mov_pc & COND_MASK) | (BL - CONDITIONAL) | (diff & 0xffffff);
465 inst[1] = NOP;
466 if (flush) {
467 SLJIT_CACHE_FLUSH(inst, inst + 2);
468 }
469 }
470 } else {
471 /* Get the position of the constant. */
472 if (mov_pc & (1 << 23))
473 ptr = inst + ((mov_pc & 0xfff) >> 2) + 2;
474 else
475 ptr = inst + 1;
476
477 if (*inst != mov_pc) {
478 inst[0] = mov_pc;
479 if (!bl) {
480 if (flush) {
481 SLJIT_CACHE_FLUSH(inst, inst + 1);
482 }
483 } else {
484 inst[1] = BLX | RM(TMP_REG1);
485 if (flush) {
486 SLJIT_CACHE_FLUSH(inst, inst + 2);
487 }
488 }
489 }
490 *ptr = new_addr;
491 }
492 #else
493 sljit_uw *inst = (sljit_uw*)addr;
494 SLJIT_ASSERT((inst[0] & 0xfff00000) == MOVW && (inst[1] & 0xfff00000) == MOVT);
495 inst[0] = MOVW | (inst[0] & 0xf000) | ((new_addr << 4) & 0xf0000) | (new_addr & 0xfff);
496 inst[1] = MOVT | (inst[1] & 0xf000) | ((new_addr >> 12) & 0xf0000) | ((new_addr >> 16) & 0xfff);
497 if (flush) {
498 SLJIT_CACHE_FLUSH(inst, inst + 2);
499 }
500 #endif
501 }
502
503 static sljit_uw get_imm(sljit_uw imm);
504
505 static SLJIT_INLINE void inline_set_const(sljit_uw addr, sljit_sw new_constant, sljit_si flush)
506 {
507 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
508 sljit_uw *ptr = (sljit_uw*)addr;
509 sljit_uw *inst = (sljit_uw*)ptr[0];
510 sljit_uw ldr_literal = ptr[1];
511 sljit_uw src2;
512
513 src2 = get_imm(new_constant);
514 if (src2) {
515 *inst = 0xe3a00000 | (ldr_literal & 0xf000) | src2;
516 if (flush) {
517 SLJIT_CACHE_FLUSH(inst, inst + 1);
518 }
519 return;
520 }
521
522 src2 = get_imm(~new_constant);
523 if (src2) {
524 *inst = 0xe3e00000 | (ldr_literal & 0xf000) | src2;
525 if (flush) {
526 SLJIT_CACHE_FLUSH(inst, inst + 1);
527 }
528 return;
529 }
530
531 if (ldr_literal & (1 << 23))
532 ptr = inst + ((ldr_literal & 0xfff) >> 2) + 2;
533 else
534 ptr = inst + 1;
535
536 if (*inst != ldr_literal) {
537 *inst = ldr_literal;
538 if (flush) {
539 SLJIT_CACHE_FLUSH(inst, inst + 1);
540 }
541 }
542 *ptr = new_constant;
543 #else
544 sljit_uw *inst = (sljit_uw*)addr;
545 SLJIT_ASSERT((inst[0] & 0xfff00000) == MOVW && (inst[1] & 0xfff00000) == MOVT);
546 inst[0] = MOVW | (inst[0] & 0xf000) | ((new_constant << 4) & 0xf0000) | (new_constant & 0xfff);
547 inst[1] = MOVT | (inst[1] & 0xf000) | ((new_constant >> 12) & 0xf0000) | ((new_constant >> 16) & 0xfff);
548 if (flush) {
549 SLJIT_CACHE_FLUSH(inst, inst + 2);
550 }
551 #endif
552 }
553
554 SLJIT_API_FUNC_ATTRIBUTE void* sljit_generate_code(struct sljit_compiler *compiler)
555 {
556 struct sljit_memory_fragment *buf;
557 sljit_uw *code;
558 sljit_uw *code_ptr;
559 sljit_uw *buf_ptr;
560 sljit_uw *buf_end;
561 sljit_uw size;
562 sljit_uw word_count;
563 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
564 sljit_uw cpool_size;
565 sljit_uw cpool_skip_alignment;
566 sljit_uw cpool_current_index;
567 sljit_uw *cpool_start_address;
568 sljit_uw *last_pc_patch;
569 struct future_patch *first_patch;
570 #endif
571
572 struct sljit_label *label;
573 struct sljit_jump *jump;
574 struct sljit_const *const_;
575
576 CHECK_ERROR_PTR();
577 check_sljit_generate_code(compiler);
578 reverse_buf(compiler);
579
580 /* Second code generation pass. */
581 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
582 size = compiler->size + (compiler->patches << 1);
583 if (compiler->cpool_fill > 0)
584 size += compiler->cpool_fill + CONST_POOL_ALIGNMENT - 1;
585 #else
586 size = compiler->size;
587 #endif
588 code = (sljit_uw*)SLJIT_MALLOC_EXEC(size * sizeof(sljit_uw));
589 PTR_FAIL_WITH_EXEC_IF(code);
590 buf = compiler->buf;
591
592 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
593 cpool_size = 0;
594 cpool_skip_alignment = 0;
595 cpool_current_index = 0;
596 cpool_start_address = NULL;
597 first_patch = NULL;
598 last_pc_patch = code;
599 #endif
600
601 code_ptr = code;
602 word_count = 0;
603
604 label = compiler->labels;
605 jump = compiler->jumps;
606 const_ = compiler->consts;
607
608 if (label && label->size == 0) {
609 label->addr = (sljit_uw)code;
610 label->size = 0;
611 label = label->next;
612 }
613
614 do {
615 buf_ptr = (sljit_uw*)buf->memory;
616 buf_end = buf_ptr + (buf->used_size >> 2);
617 do {
618 word_count++;
619 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
620 if (cpool_size > 0) {
621 if (cpool_skip_alignment > 0) {
622 buf_ptr++;
623 cpool_skip_alignment--;
624 }
625 else {
626 if (SLJIT_UNLIKELY(resolve_const_pool_index(&first_patch, cpool_current_index, cpool_start_address, buf_ptr))) {
627 SLJIT_FREE_EXEC(code);
628 compiler->error = SLJIT_ERR_ALLOC_FAILED;
629 return NULL;
630 }
631 buf_ptr++;
632 if (++cpool_current_index >= cpool_size) {
633 SLJIT_ASSERT(!first_patch);
634 cpool_size = 0;
635 if (label && label->size == word_count) {
636 /* Points after the current instruction. */
637 label->addr = (sljit_uw)code_ptr;
638 label->size = code_ptr - code;
639 label = label->next;
640 }
641 }
642 }
643 }
644 else if ((*buf_ptr & 0xff000000) != PUSH_POOL) {
645 #endif
646 *code_ptr = *buf_ptr++;
647 /* These structures are ordered by their address. */
648 SLJIT_ASSERT(!label || label->size >= word_count);
649 SLJIT_ASSERT(!jump || jump->addr >= word_count);
650 SLJIT_ASSERT(!const_ || const_->addr >= word_count);
651 if (jump && jump->addr == word_count) {
652 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
653 if (detect_jump_type(jump, code_ptr, code))
654 code_ptr--;
655 jump->addr = (sljit_uw)code_ptr;
656 #else
657 jump->addr = (sljit_uw)(code_ptr - 2);
658 if (detect_jump_type(jump, code_ptr, code))
659 code_ptr -= 2;
660 #endif
661 jump = jump->next;
662 }
663 if (label && label->size == word_count) {
664 /* code_ptr can be affected above. */
665 label->addr = (sljit_uw)(code_ptr + 1);
666 label->size = (code_ptr + 1) - code;
667 label = label->next;
668 }
669 if (const_ && const_->addr == word_count) {
670 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
671 const_->addr = (sljit_uw)code_ptr;
672 #else
673 const_->addr = (sljit_uw)(code_ptr - 1);
674 #endif
675 const_ = const_->next;
676 }
677 code_ptr++;
678 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
679 }
680 else {
681 /* Fortunately, no need to shift. */
682 cpool_size = *buf_ptr++ & ~PUSH_POOL;
683 SLJIT_ASSERT(cpool_size > 0);
684 cpool_start_address = ALIGN_INSTRUCTION(code_ptr + 1);
685 cpool_current_index = patch_pc_relative_loads(last_pc_patch, code_ptr, cpool_start_address, cpool_size);
686 if (cpool_current_index > 0) {
687 /* Unconditional branch. */
688 *code_ptr = B | (((cpool_start_address - code_ptr) + cpool_current_index - 2) & ~PUSH_POOL);
689 code_ptr = cpool_start_address + cpool_current_index;
690 }
691 cpool_skip_alignment = CONST_POOL_ALIGNMENT - 1;
692 cpool_current_index = 0;
693 last_pc_patch = code_ptr;
694 }
695 #endif
696 } while (buf_ptr < buf_end);
697 buf = buf->next;
698 } while (buf);
699
700 SLJIT_ASSERT(!label);
701 SLJIT_ASSERT(!jump);
702 SLJIT_ASSERT(!const_);
703
704 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
705 SLJIT_ASSERT(cpool_size == 0);
706 if (compiler->cpool_fill > 0) {
707 cpool_start_address = ALIGN_INSTRUCTION(code_ptr);
708 cpool_current_index = patch_pc_relative_loads(last_pc_patch, code_ptr, cpool_start_address, compiler->cpool_fill);
709 if (cpool_current_index > 0)
710 code_ptr = cpool_start_address + cpool_current_index;
711
712 buf_ptr = compiler->cpool;
713 buf_end = buf_ptr + compiler->cpool_fill;
714 cpool_current_index = 0;
715 while (buf_ptr < buf_end) {
716 if (SLJIT_UNLIKELY(resolve_const_pool_index(&first_patch, cpool_current_index, cpool_start_address, buf_ptr))) {
717 SLJIT_FREE_EXEC(code);
718 compiler->error = SLJIT_ERR_ALLOC_FAILED;
719 return NULL;
720 }
721 buf_ptr++;
722 cpool_current_index++;
723 }
724 SLJIT_ASSERT(!first_patch);
725 }
726 #endif
727
728 jump = compiler->jumps;
729 while (jump) {
730 buf_ptr = (sljit_uw*)jump->addr;
731
732 if (jump->flags & PATCH_B) {
733 if (!(jump->flags & JUMP_ADDR)) {
734 SLJIT_ASSERT(jump->flags & JUMP_LABEL);
735 SLJIT_ASSERT(((sljit_sw)jump->u.label->addr - (sljit_sw)(buf_ptr + 2)) <= 0x01ffffff && ((sljit_sw)jump->u.label->addr - (sljit_sw)(buf_ptr + 2)) >= -0x02000000);
736 *buf_ptr |= (((sljit_sw)jump->u.label->addr - (sljit_sw)(buf_ptr + 2)) >> 2) & 0x00ffffff;
737 }
738 else {
739 SLJIT_ASSERT(((sljit_sw)jump->u.target - (sljit_sw)(buf_ptr + 2)) <= 0x01ffffff && ((sljit_sw)jump->u.target - (sljit_sw)(buf_ptr + 2)) >= -0x02000000);
740 *buf_ptr |= (((sljit_sw)jump->u.target - (sljit_sw)(buf_ptr + 2)) >> 2) & 0x00ffffff;
741 }
742 }
743 else if (jump->flags & SLJIT_REWRITABLE_JUMP) {
744 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
745 jump->addr = (sljit_uw)code_ptr;
746 code_ptr[0] = (sljit_uw)buf_ptr;
747 code_ptr[1] = *buf_ptr;
748 inline_set_jump_addr((sljit_uw)code_ptr, (jump->flags & JUMP_LABEL) ? jump->u.label->addr : jump->u.target, 0);
749 code_ptr += 2;
750 #else
751 inline_set_jump_addr((sljit_uw)buf_ptr, (jump->flags & JUMP_LABEL) ? jump->u.label->addr : jump->u.target, 0);
752 #endif
753 }
754 else {
755 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
756 if (jump->flags & IS_BL)
757 buf_ptr--;
758 if (*buf_ptr & (1 << 23))
759 buf_ptr += ((*buf_ptr & 0xfff) >> 2) + 2;
760 else
761 buf_ptr += 1;
762 *buf_ptr = (jump->flags & JUMP_LABEL) ? jump->u.label->addr : jump->u.target;
763 #else
764 inline_set_jump_addr((sljit_uw)buf_ptr, (jump->flags & JUMP_LABEL) ? jump->u.label->addr : jump->u.target, 0);
765 #endif
766 }
767 jump = jump->next;
768 }
769
770 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
771 const_ = compiler->consts;
772 while (const_) {
773 buf_ptr = (sljit_uw*)const_->addr;
774 const_->addr = (sljit_uw)code_ptr;
775
776 code_ptr[0] = (sljit_uw)buf_ptr;
777 code_ptr[1] = *buf_ptr;
778 if (*buf_ptr & (1 << 23))
779 buf_ptr += ((*buf_ptr & 0xfff) >> 2) + 2;
780 else
781 buf_ptr += 1;
782 /* Set the value again (can be a simple constant). */
783 inline_set_const((sljit_uw)code_ptr, *buf_ptr, 0);
784 code_ptr += 2;
785
786 const_ = const_->next;
787 }
788 #endif
789
790 SLJIT_ASSERT(code_ptr - code <= (sljit_si)size);
791
792 compiler->error = SLJIT_ERR_COMPILED;
793 compiler->executable_size = (code_ptr - code) * sizeof(sljit_uw);
794 SLJIT_CACHE_FLUSH(code, code_ptr);
795 return code;
796 }
797
798 /* --------------------------------------------------------------------- */
799 /* Entry, exit */
800 /* --------------------------------------------------------------------- */
801
802 /* emit_op inp_flags.
803 WRITE_BACK must be the first, since it is a flag. */
804 #define WRITE_BACK 0x01
805 #define ALLOW_IMM 0x02
806 #define ALLOW_INV_IMM 0x04
807 #define ALLOW_ANY_IMM (ALLOW_IMM | ALLOW_INV_IMM)
808 #define ARG_TEST 0x08
809
810 /* Creates an index in data_transfer_insts array. */
811 #define WORD_DATA 0x00
812 #define BYTE_DATA 0x10
813 #define HALF_DATA 0x20
814 #define SIGNED_DATA 0x40
815 #define LOAD_DATA 0x80
816
817 /* Condition: AL. */
818 #define EMIT_DATA_PROCESS_INS(opcode, set_flags, dst, src1, src2) \
819 (0xe0000000 | ((opcode) << 21) | (set_flags) | RD(dst) | RN(src1) | (src2))
820
821 static sljit_si emit_op(struct sljit_compiler *compiler, sljit_si op, sljit_si inp_flags,
822 sljit_si dst, sljit_sw dstw,
823 sljit_si src1, sljit_sw src1w,
824 sljit_si src2, sljit_sw src2w);
825
826 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_enter(struct sljit_compiler *compiler,
827 sljit_si args, sljit_si scratches, sljit_si saveds,
828 sljit_si fscratches, sljit_si fsaveds, sljit_si local_size)
829 {
830 sljit_si size, i, tmp;
831 sljit_uw push;
832
833 CHECK_ERROR();
834 check_sljit_emit_enter(compiler, args, scratches, saveds, fscratches, fsaveds, local_size);
835
836 compiler->scratches = scratches;
837 compiler->saveds = saveds;
838 compiler->fscratches = fscratches;
839 compiler->fsaveds = fsaveds;
840 #if (defined SLJIT_DEBUG && SLJIT_DEBUG)
841 compiler->logical_local_size = local_size;
842 #endif
843
844 /* Push saved registers, temporary registers
845 stmdb sp!, {..., lr} */
846 push = PUSH | (1 << 14);
847
848 tmp = saveds < SLJIT_NUMBER_OF_SAVED_REGISTERS ? (SLJIT_S0 + 1 - saveds) : SLJIT_FIRST_SAVED_REG;
849 for (i = SLJIT_S0; i >= tmp; i--)
850 push |= 1 << reg_map[i];
851
852 for (i = scratches; i >= SLJIT_FIRST_SAVED_REG; i--)
853 push |= 1 << reg_map[i];
854
855 FAIL_IF(push_inst(compiler, push));
856
857 /* Stack must be aligned to 8 bytes: */
858 size = GET_SAVED_REGISTERS_SIZE(scratches, saveds, 1);
859 local_size = ((size + local_size + 7) & ~7) - size;
860 compiler->local_size = local_size;
861 if (local_size > 0)
862 FAIL_IF(emit_op(compiler, SLJIT_SUB, ALLOW_IMM, SLJIT_SP, 0, SLJIT_SP, 0, SLJIT_IMM, local_size));
863
864 if (args >= 1)
865 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, SLJIT_S0, SLJIT_UNUSED, RM(SLJIT_R0))));
866 if (args >= 2)
867 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, SLJIT_S1, SLJIT_UNUSED, RM(SLJIT_R1))));
868 if (args >= 3)
869 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, SLJIT_S2, SLJIT_UNUSED, RM(SLJIT_R2))));
870
871 return SLJIT_SUCCESS;
872 }
873
874 SLJIT_API_FUNC_ATTRIBUTE void sljit_set_context(struct sljit_compiler *compiler,
875 sljit_si args, sljit_si scratches, sljit_si saveds,
876 sljit_si fscratches, sljit_si fsaveds, sljit_si local_size)
877 {
878 sljit_si size;
879
880 CHECK_ERROR_VOID();
881 check_sljit_set_context(compiler, args, scratches, saveds, fscratches, fsaveds, local_size);
882
883 compiler->scratches = scratches;
884 compiler->saveds = saveds;
885 compiler->fscratches = fscratches;
886 compiler->fsaveds = fsaveds;
887 #if (defined SLJIT_DEBUG && SLJIT_DEBUG)
888 compiler->logical_local_size = local_size;
889 #endif
890
891 size = GET_SAVED_REGISTERS_SIZE(scratches, saveds, 1);
892 compiler->local_size = ((size + local_size + 7) & ~7) - size;
893 }
894
895 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_return(struct sljit_compiler *compiler, sljit_si op, sljit_si src, sljit_sw srcw)
896 {
897 sljit_si i, tmp;
898 sljit_uw pop;
899
900 CHECK_ERROR();
901 check_sljit_emit_return(compiler, op, src, srcw);
902
903 FAIL_IF(emit_mov_before_return(compiler, op, src, srcw));
904
905 if (compiler->local_size > 0)
906 FAIL_IF(emit_op(compiler, SLJIT_ADD, ALLOW_IMM, SLJIT_SP, 0, SLJIT_SP, 0, SLJIT_IMM, compiler->local_size));
907
908 /* Push saved registers, temporary registers
909 ldmia sp!, {..., pc} */
910 pop = POP | (1 << 15);
911
912 tmp = compiler->saveds < SLJIT_NUMBER_OF_SAVED_REGISTERS ? (SLJIT_S0 + 1 - compiler->saveds) : SLJIT_FIRST_SAVED_REG;
913 for (i = SLJIT_S0; i >= tmp; i--)
914 pop |= 1 << reg_map[i];
915
916 for (i = compiler->scratches; i >= SLJIT_FIRST_SAVED_REG; i--)
917 pop |= 1 << reg_map[i];
918
919 return push_inst(compiler, pop);
920 }
921
922 /* --------------------------------------------------------------------- */
923 /* Operators */
924 /* --------------------------------------------------------------------- */
925
926 /* s/l - store/load (1 bit)
927 u/s - signed/unsigned (1 bit)
928 w/b/h/N - word/byte/half/NOT allowed (2 bit)
929 It contans 16 items, but not all are different. */
930
931 static sljit_sw data_transfer_insts[16] = {
932 /* s u w */ 0xe5000000 /* str */,
933 /* s u b */ 0xe5400000 /* strb */,
934 /* s u h */ 0xe10000b0 /* strh */,
935 /* s u N */ 0x00000000 /* not allowed */,
936 /* s s w */ 0xe5000000 /* str */,
937 /* s s b */ 0xe5400000 /* strb */,
938 /* s s h */ 0xe10000b0 /* strh */,
939 /* s s N */ 0x00000000 /* not allowed */,
940
941 /* l u w */ 0xe5100000 /* ldr */,
942 /* l u b */ 0xe5500000 /* ldrb */,
943 /* l u h */ 0xe11000b0 /* ldrh */,
944 /* l u N */ 0x00000000 /* not allowed */,
945 /* l s w */ 0xe5100000 /* ldr */,
946 /* l s b */ 0xe11000d0 /* ldrsb */,
947 /* l s h */ 0xe11000f0 /* ldrsh */,
948 /* l s N */ 0x00000000 /* not allowed */,
949 };
950
951 #define EMIT_DATA_TRANSFER(type, add, wb, target, base1, base2) \
952 (data_transfer_insts[(type) >> 4] | ((add) << 23) | ((wb) << 21) | (reg_map[target] << 12) | (reg_map[base1] << 16) | (base2))
953 /* Normal ldr/str instruction.
954 Type2: ldrsb, ldrh, ldrsh */
955 #define IS_TYPE1_TRANSFER(type) \
956 (data_transfer_insts[(type) >> 4] & 0x04000000)
957 #define TYPE2_TRANSFER_IMM(imm) \
958 (((imm) & 0xf) | (((imm) & 0xf0) << 4) | (1 << 22))
959
960 /* flags: */
961 /* Arguments are swapped. */
962 #define ARGS_SWAPPED 0x01
963 /* Inverted immediate. */
964 #define INV_IMM 0x02
965 /* Source and destination is register. */
966 #define REG_DEST 0x04
967 #define REG_SOURCE 0x08
968 /* One instruction is enough. */
969 #define FAST_DEST 0x10
970 /* Multiple instructions are required. */
971 #define SLOW_DEST 0x20
972 /* SET_FLAGS must be (1 << 20) as it is also the value of S bit (can be used for optimization). */
973 #define SET_FLAGS (1 << 20)
974 /* dst: reg
975 src1: reg
976 src2: reg or imm (if allowed)
977 SRC2_IMM must be (1 << 25) as it is also the value of I bit (can be used for optimization). */
978 #define SRC2_IMM (1 << 25)
979
980 #define EMIT_DATA_PROCESS_INS_AND_RETURN(opcode) \
981 return push_inst(compiler, EMIT_DATA_PROCESS_INS(opcode, flags & SET_FLAGS, dst, src1, (src2 & SRC2_IMM) ? src2 : RM(src2)))
982
983 #define EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(opcode, dst, src1, src2) \
984 return push_inst(compiler, EMIT_DATA_PROCESS_INS(opcode, flags & SET_FLAGS, dst, src1, src2))
985
986 #define EMIT_SHIFT_INS_AND_RETURN(opcode) \
987 SLJIT_ASSERT(!(flags & INV_IMM) && !(src2 & SRC2_IMM)); \
988 if (compiler->shift_imm != 0x20) { \
989 SLJIT_ASSERT(src1 == TMP_REG1); \
990 SLJIT_ASSERT(!(flags & ARGS_SWAPPED)); \
991 if (compiler->shift_imm != 0) \
992 return push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, flags & SET_FLAGS, dst, SLJIT_UNUSED, (compiler->shift_imm << 7) | (opcode << 5) | reg_map[src2])); \
993 return push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, flags & SET_FLAGS, dst, SLJIT_UNUSED, reg_map[src2])); \
994 } \
995 return push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, flags & SET_FLAGS, dst, SLJIT_UNUSED, (reg_map[(flags & ARGS_SWAPPED) ? src1 : src2] << 8) | (opcode << 5) | 0x10 | ((flags & ARGS_SWAPPED) ? reg_map[src2] : reg_map[src1])));
996
997 static SLJIT_INLINE sljit_si emit_single_op(struct sljit_compiler *compiler, sljit_si op, sljit_si flags,
998 sljit_si dst, sljit_si src1, sljit_si src2)
999 {
1000 sljit_sw mul_inst;
1001
1002 switch (GET_OPCODE(op)) {
1003 case SLJIT_MOV:
1004 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & ARGS_SWAPPED));
1005 if (dst != src2) {
1006 if (src2 & SRC2_IMM) {
1007 if (flags & INV_IMM)
1008 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MVN_DP, dst, SLJIT_UNUSED, src2);
1009 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MOV_DP, dst, SLJIT_UNUSED, src2);
1010 }
1011 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MOV_DP, dst, SLJIT_UNUSED, reg_map[src2]);
1012 }
1013 return SLJIT_SUCCESS;
1014
1015 case SLJIT_MOV_UB:
1016 case SLJIT_MOV_SB:
1017 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & ARGS_SWAPPED));
1018 if ((flags & (REG_DEST | REG_SOURCE)) == (REG_DEST | REG_SOURCE)) {
1019 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
1020 if (op == SLJIT_MOV_UB)
1021 return push_inst(compiler, EMIT_DATA_PROCESS_INS(AND_DP, 0, dst, src2, SRC2_IMM | 0xff));
1022 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, dst, SLJIT_UNUSED, (24 << 7) | reg_map[src2])));
1023 return push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, dst, SLJIT_UNUSED, (24 << 7) | (op == SLJIT_MOV_UB ? 0x20 : 0x40) | reg_map[dst]));
1024 #else
1025 return push_inst(compiler, (op == SLJIT_MOV_UB ? UXTB : SXTB) | RD(dst) | RM(src2));
1026 #endif
1027 }
1028 else if (dst != src2) {
1029 SLJIT_ASSERT(src2 & SRC2_IMM);
1030 if (flags & INV_IMM)
1031 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MVN_DP, dst, SLJIT_UNUSED, src2);
1032 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MOV_DP, dst, SLJIT_UNUSED, src2);
1033 }
1034 return SLJIT_SUCCESS;
1035
1036 case SLJIT_MOV_UH:
1037 case SLJIT_MOV_SH:
1038 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & ARGS_SWAPPED));
1039 if ((flags & (REG_DEST | REG_SOURCE)) == (REG_DEST | REG_SOURCE)) {
1040 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
1041 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, dst, SLJIT_UNUSED, (16 << 7) | reg_map[src2])));
1042 return push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, dst, SLJIT_UNUSED, (16 << 7) | (op == SLJIT_MOV_UH ? 0x20 : 0x40) | reg_map[dst]));
1043 #else
1044 return push_inst(compiler, (op == SLJIT_MOV_UH ? UXTH : SXTH) | RD(dst) | RM(src2));
1045 #endif
1046 }
1047 else if (dst != src2) {
1048 SLJIT_ASSERT(src2 & SRC2_IMM);
1049 if (flags & INV_IMM)
1050 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MVN_DP, dst, SLJIT_UNUSED, src2);
1051 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MOV_DP, dst, SLJIT_UNUSED, src2);
1052 }
1053 return SLJIT_SUCCESS;
1054
1055 case SLJIT_NOT:
1056 if (src2 & SRC2_IMM) {
1057 if (flags & INV_IMM)
1058 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MOV_DP, dst, SLJIT_UNUSED, src2);
1059 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MVN_DP, dst, SLJIT_UNUSED, src2);
1060 }
1061 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MVN_DP, dst, SLJIT_UNUSED, RM(src2));
1062
1063 case SLJIT_CLZ:
1064 SLJIT_ASSERT(!(flags & INV_IMM));
1065 SLJIT_ASSERT(!(src2 & SRC2_IMM));
1066 FAIL_IF(push_inst(compiler, CLZ | RD(dst) | RM(src2)));
1067 if (flags & SET_FLAGS)
1068 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(CMP_DP, SLJIT_UNUSED, dst, SRC2_IMM);
1069 return SLJIT_SUCCESS;
1070
1071 case SLJIT_ADD:
1072 SLJIT_ASSERT(!(flags & INV_IMM));
1073 EMIT_DATA_PROCESS_INS_AND_RETURN(ADD_DP);
1074
1075 case SLJIT_ADDC:
1076 SLJIT_ASSERT(!(flags & INV_IMM));
1077 EMIT_DATA_PROCESS_INS_AND_RETURN(ADC_DP);
1078
1079 case SLJIT_SUB:
1080 SLJIT_ASSERT(!(flags & INV_IMM));
1081 if (!(flags & ARGS_SWAPPED))
1082 EMIT_DATA_PROCESS_INS_AND_RETURN(SUB_DP);
1083 EMIT_DATA_PROCESS_INS_AND_RETURN(RSB_DP);
1084
1085 case SLJIT_SUBC:
1086 SLJIT_ASSERT(!(flags & INV_IMM));
1087 if (!(flags & ARGS_SWAPPED))
1088 EMIT_DATA_PROCESS_INS_AND_RETURN(SBC_DP);
1089 EMIT_DATA_PROCESS_INS_AND_RETURN(RSC_DP);
1090
1091 case SLJIT_MUL:
1092 SLJIT_ASSERT(!(flags & INV_IMM));
1093 SLJIT_ASSERT(!(src2 & SRC2_IMM));
1094 if (SLJIT_UNLIKELY(op & SLJIT_SET_O))
1095 mul_inst = SMULL | (reg_map[TMP_REG3] << 16) | (reg_map[dst] << 12);
1096 else
1097 mul_inst = MUL | (reg_map[dst] << 16);
1098
1099 if (dst != src2)
1100 FAIL_IF(push_inst(compiler, mul_inst | (reg_map[src1] << 8) | reg_map[src2]));
1101 else if (dst != src1)
1102 FAIL_IF(push_inst(compiler, mul_inst | (reg_map[src2] << 8) | reg_map[src1]));
1103 else {
1104 /* Rm and Rd must not be the same register. */
1105 SLJIT_ASSERT(dst != TMP_REG1);
1106 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, TMP_REG1, SLJIT_UNUSED, reg_map[src2])));
1107 FAIL_IF(push_inst(compiler, mul_inst | (reg_map[src2] << 8) | reg_map[TMP_REG1]));
1108 }
1109
1110 if (!(op & SLJIT_SET_O))
1111 return SLJIT_SUCCESS;
1112
1113 /* We need to use TMP_REG3. */
1114 compiler->cache_arg = 0;
1115 compiler->cache_argw = 0;
1116 /* cmp TMP_REG2, dst asr #31. */
1117 return push_inst(compiler, EMIT_DATA_PROCESS_INS(CMP_DP, SET_FLAGS, SLJIT_UNUSED, TMP_REG3, RM(dst) | 0xfc0));
1118
1119 case SLJIT_AND:
1120 if (!(flags & INV_IMM))
1121 EMIT_DATA_PROCESS_INS_AND_RETURN(AND_DP);
1122 EMIT_DATA_PROCESS_INS_AND_RETURN(BIC_DP);
1123
1124 case SLJIT_OR:
1125 SLJIT_ASSERT(!(flags & INV_IMM));
1126 EMIT_DATA_PROCESS_INS_AND_RETURN(ORR_DP);
1127
1128 case SLJIT_XOR:
1129 SLJIT_ASSERT(!(flags & INV_IMM));
1130 EMIT_DATA_PROCESS_INS_AND_RETURN(EOR_DP);
1131
1132 case SLJIT_SHL:
1133 EMIT_SHIFT_INS_AND_RETURN(0);
1134
1135 case SLJIT_LSHR:
1136 EMIT_SHIFT_INS_AND_RETURN(1);
1137
1138 case SLJIT_ASHR:
1139 EMIT_SHIFT_INS_AND_RETURN(2);
1140 }
1141 SLJIT_ASSERT_STOP();
1142 return SLJIT_SUCCESS;
1143 }
1144
1145 #undef EMIT_DATA_PROCESS_INS_AND_RETURN
1146 #undef EMIT_FULL_DATA_PROCESS_INS_AND_RETURN
1147 #undef EMIT_SHIFT_INS_AND_RETURN
1148
1149 /* Tests whether the immediate can be stored in the 12 bit imm field.
1150 Returns with 0 if not possible. */
1151 static sljit_uw get_imm(sljit_uw imm)
1152 {
1153 sljit_si rol;
1154
1155 if (imm <= 0xff)
1156 return SRC2_IMM | imm;
1157
1158 if (!(imm & 0xff000000)) {
1159 imm <<= 8;
1160 rol = 8;
1161 }
1162 else {
1163 imm = (imm << 24) | (imm >> 8);
1164 rol = 0;
1165 }
1166
1167 if (!(imm & 0xff000000)) {
1168 imm <<= 8;
1169 rol += 4;
1170 }
1171
1172 if (!(imm & 0xf0000000)) {
1173 imm <<= 4;
1174 rol += 2;
1175 }
1176
1177 if (!(imm & 0xc0000000)) {
1178 imm <<= 2;
1179 rol += 1;
1180 }
1181
1182 if (!(imm & 0x00ffffff))
1183 return SRC2_IMM | (imm >> 24) | (rol << 8);
1184 else
1185 return 0;
1186 }
1187
1188 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
1189 static sljit_si generate_int(struct sljit_compiler *compiler, sljit_si reg, sljit_uw imm, sljit_si positive)
1190 {
1191 sljit_uw mask;
1192 sljit_uw imm1;
1193 sljit_uw imm2;
1194 sljit_si rol;
1195
1196 /* Step1: Search a zero byte (8 continous zero bit). */
1197 mask = 0xff000000;
1198 rol = 8;
1199 while(1) {
1200 if (!(imm & mask)) {
1201 /* Rol imm by rol. */
1202 imm = (imm << rol) | (imm >> (32 - rol));
1203 /* Calculate arm rol. */
1204 rol = 4 + (rol >> 1);
1205 break;
1206 }
1207 rol += 2;
1208 mask >>= 2;
1209 if (mask & 0x3) {
1210 /* rol by 8. */
1211 imm = (imm << 8) | (imm >> 24);
1212 mask = 0xff00;
1213 rol = 24;
1214 while (1) {
1215 if (!(imm & mask)) {
1216 /* Rol imm by rol. */
1217 imm = (imm << rol) | (imm >> (32 - rol));
1218 /* Calculate arm rol. */
1219 rol = (rol >> 1) - 8;
1220 break;
1221 }
1222 rol += 2;
1223 mask >>= 2;
1224 if (mask & 0x3)
1225 return 0;
1226 }
1227 break;
1228 }
1229 }
1230
1231 /* The low 8 bit must be zero. */
1232 SLJIT_ASSERT(!(imm & 0xff));
1233
1234 if (!(imm & 0xff000000)) {
1235 imm1 = SRC2_IMM | ((imm >> 16) & 0xff) | (((rol + 4) & 0xf) << 8);
1236 imm2 = SRC2_IMM | ((imm >> 8) & 0xff) | (((rol + 8) & 0xf) << 8);
1237 }
1238 else if (imm & 0xc0000000) {
1239 imm1 = SRC2_IMM | ((imm >> 24) & 0xff) | ((rol & 0xf) << 8);
1240 imm <<= 8;
1241 rol += 4;
1242
1243 if (!(imm & 0xff000000)) {
1244 imm <<= 8;
1245 rol += 4;
1246 }
1247
1248 if (!(imm & 0xf0000000)) {
1249 imm <<= 4;
1250 rol += 2;
1251 }
1252
1253 if (!(imm & 0xc0000000)) {
1254 imm <<= 2;
1255 rol += 1;
1256 }
1257
1258 if (!(imm & 0x00ffffff))
1259 imm2 = SRC2_IMM | (imm >> 24) | ((rol & 0xf) << 8);
1260 else
1261 return 0;
1262 }
1263 else {
1264 if (!(imm & 0xf0000000)) {
1265 imm <<= 4;
1266 rol += 2;
1267 }
1268
1269 if (!(imm & 0xc0000000)) {
1270 imm <<= 2;
1271 rol += 1;
1272 }
1273
1274 imm1 = SRC2_IMM | ((imm >> 24) & 0xff) | ((rol & 0xf) << 8);
1275 imm <<= 8;
1276 rol += 4;
1277
1278 if (!(imm & 0xf0000000)) {
1279 imm <<= 4;
1280 rol += 2;
1281 }
1282
1283 if (!(imm & 0xc0000000)) {
1284 imm <<= 2;
1285 rol += 1;
1286 }
1287
1288 if (!(imm & 0x00ffffff))
1289 imm2 = SRC2_IMM | (imm >> 24) | ((rol & 0xf) << 8);
1290 else
1291 return 0;
1292 }
1293
1294 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(positive ? MOV_DP : MVN_DP, 0, reg, SLJIT_UNUSED, imm1)));
1295 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(positive ? ORR_DP : BIC_DP, 0, reg, reg, imm2)));
1296 return 1;
1297 }
1298 #endif
1299
1300 static sljit_si load_immediate(struct sljit_compiler *compiler, sljit_si reg, sljit_uw imm)
1301 {
1302 sljit_uw tmp;
1303
1304 #if (defined SLJIT_CONFIG_ARM_V7 && SLJIT_CONFIG_ARM_V7)
1305 if (!(imm & ~0xffff))
1306 return push_inst(compiler, MOVW | RD(reg) | ((imm << 4) & 0xf0000) | (imm & 0xfff));
1307 #endif
1308
1309 /* Create imm by 1 inst. */
1310 tmp = get_imm(imm);
1311 if (tmp)
1312 return push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, reg, SLJIT_UNUSED, tmp));
1313
1314 tmp = get_imm(~imm);
1315 if (tmp)
1316 return push_inst(compiler, EMIT_DATA_PROCESS_INS(MVN_DP, 0, reg, SLJIT_UNUSED, tmp));
1317
1318 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
1319 /* Create imm by 2 inst. */
1320 FAIL_IF(generate_int(compiler, reg, imm, 1));
1321 FAIL_IF(generate_int(compiler, reg, ~imm, 0));
1322
1323 /* Load integer. */
1324 return push_inst_with_literal(compiler, EMIT_DATA_TRANSFER(WORD_DATA | LOAD_DATA, 1, 0, reg, TMP_PC, 0), imm);
1325 #else
1326 return emit_imm(compiler, reg, imm);
1327 #endif
1328 }
1329
1330 /* Helper function. Dst should be reg + value, using at most 1 instruction, flags does not set. */
1331 static sljit_si emit_set_delta(struct sljit_compiler *compiler, sljit_si dst, sljit_si reg, sljit_sw value)
1332 {
1333 if (value >= 0) {
1334 value = get_imm(value);
1335 if (value)
1336 return push_inst(compiler, EMIT_DATA_PROCESS_INS(ADD_DP, 0, dst, reg, value));
1337 }
1338 else {
1339 value = get_imm(-value);
1340 if (value)
1341 return push_inst(compiler, EMIT_DATA_PROCESS_INS(SUB_DP, 0, dst, reg, value));
1342 }
1343 return SLJIT_ERR_UNSUPPORTED;
1344 }
1345
1346 /* Can perform an operation using at most 1 instruction. */
1347 static sljit_si getput_arg_fast(struct sljit_compiler *compiler, sljit_si inp_flags, sljit_si reg, sljit_si arg, sljit_sw argw)
1348 {
1349 sljit_uw imm;
1350
1351 if (arg & SLJIT_IMM) {
1352 imm = get_imm(argw);
1353 if (imm) {
1354 if (inp_flags & ARG_TEST)
1355 return 1;
1356 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, reg, SLJIT_UNUSED, imm)));
1357 return -1;
1358 }
1359 imm = get_imm(~argw);
1360 if (imm) {
1361 if (inp_flags & ARG_TEST)
1362 return 1;
1363 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(MVN_DP, 0, reg, SLJIT_UNUSED, imm)));
1364 return -1;
1365 }
1366 return 0;
1367 }
1368
1369 SLJIT_ASSERT(arg & SLJIT_MEM);
1370
1371 /* Fast loads/stores. */
1372 if (!(arg & REG_MASK))
1373 return 0;
1374
1375 if (arg & OFFS_REG_MASK) {
1376 if ((argw & 0x3) != 0 && !IS_TYPE1_TRANSFER(inp_flags))
1377 return 0;
1378
1379 if (inp_flags & ARG_TEST)
1380 return 1;
1381 FAIL_IF(push_inst(compiler, EMIT_DATA_TRANSFER(inp_flags, 1, inp_flags & WRITE_BACK, reg, arg & REG_MASK,
1382 RM(OFFS_REG(arg)) | (IS_TYPE1_TRANSFER(inp_flags) ? SRC2_IMM : 0) | ((argw & 0x3) << 7))));
1383 return -1;
1384 }
1385
1386 if (IS_TYPE1_TRANSFER(inp_flags)) {
1387 if (argw >= 0 && argw <= 0xfff) {
1388 if (inp_flags & ARG_TEST)
1389 return 1;
1390 FAIL_IF(push_inst(compiler, EMIT_DATA_TRANSFER(inp_flags, 1, inp_flags & WRITE_BACK, reg, arg & REG_MASK, argw)));
1391 return -1;
1392 }
1393 if (argw < 0 && argw >= -0xfff) {
1394 if (inp_flags & ARG_TEST)
1395 return 1;
1396 FAIL_IF(push_inst(compiler, EMIT_DATA_TRANSFER(inp_flags, 0, inp_flags & WRITE_BACK, reg, arg & REG_MASK, -argw)));
1397 return -1;
1398 }
1399 }
1400 else {
1401 if (argw >= 0 && argw <= 0xff) {
1402 if (inp_flags & ARG_TEST)
1403 return 1;
1404 FAIL_IF(push_inst(compiler, EMIT_DATA_TRANSFER(inp_flags, 1, inp_flags & WRITE_BACK, reg, arg & REG_MASK, TYPE2_TRANSFER_IMM(argw))));
1405 return -1;
1406 }
1407 if (argw < 0 && argw >= -0xff) {
1408 if (inp_flags & ARG_TEST)
1409 return 1;
1410 argw = -argw;
1411 FAIL_IF(push_inst(compiler, EMIT_DATA_TRANSFER(inp_flags, 0, inp_flags & WRITE_BACK, reg, arg & REG_MASK, TYPE2_TRANSFER_IMM(argw))));
1412 return -1;
1413 }
1414 }
1415
1416 return 0;
1417 }
1418
1419 /* See getput_arg below.
1420 Note: can_cache is called only for binary operators. Those
1421 operators always uses word arguments without write back. */
1422 static sljit_si can_cache(sljit_si arg, sljit_sw argw, sljit_si next_arg, sljit_sw next_argw)
1423 {
1424 /* Immediate caching is not supported as it would be an operation on constant arguments. */
1425 if (arg & SLJIT_IMM)
1426 return 0;
1427
1428 /* Always a simple operation. */
1429 if (arg & OFFS_REG_MASK)
1430 return 0;
1431
1432 if (!(arg & REG_MASK)) {
1433 /* Immediate access. */
1434 if ((next_arg & SLJIT_MEM) && ((sljit_uw)argw - (sljit_uw)next_argw <= 0xfff || (sljit_uw)next_argw - (sljit_uw)argw <= 0xfff))
1435 return 1;
1436 return 0;
1437 }
1438
1439 if (argw <= 0xfffff && argw >= -0xfffff)
1440 return 0;
1441
1442 if (argw == next_argw && (next_arg & SLJIT_MEM))
1443 return 1;
1444
1445 if (arg == next_arg && ((sljit_uw)argw - (sljit_uw)next_argw <= 0xfff || (sljit_uw)next_argw - (sljit_uw)argw <= 0xfff))
1446 return 1;
1447
1448 return 0;
1449 }
1450
1451 #define GETPUT_ARG_DATA_TRANSFER(add, wb, target, base, imm) \
1452 if (max_delta & 0xf00) \
1453 FAIL_IF(push_inst(compiler, EMIT_DATA_TRANSFER(inp_flags, add, wb, target, base, imm))); \
1454 else \
1455 FAIL_IF(push_inst(compiler, EMIT_DATA_TRANSFER(inp_flags, add, wb, target, base, TYPE2_TRANSFER_IMM(imm))));
1456
1457 #define TEST_WRITE_BACK() \
1458 if (inp_flags & WRITE_BACK) { \
1459 tmp_r = arg & REG_MASK; \
1460 if (reg == tmp_r) { \
1461 /* This can only happen for stores */ \
1462 /* since ldr reg, [reg, ...]! has no meaning */ \
1463 SLJIT_ASSERT(!(inp_flags & LOAD_DATA)); \
1464 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, TMP_REG3, SLJIT_UNUSED, RM(reg)))); \
1465 reg = TMP_REG3; \
1466 } \
1467 }
1468
1469 /* Emit the necessary instructions. See can_cache above. */
1470 static sljit_si getput_arg(struct sljit_compiler *compiler, sljit_si inp_flags, sljit_si reg, sljit_si arg, sljit_sw argw, sljit_si next_arg, sljit_sw next_argw)
1471 {
1472 sljit_si tmp_r;
1473 sljit_sw max_delta;
1474 sljit_sw sign;
1475 sljit_uw imm;
1476
1477 if (arg & SLJIT_IMM) {
1478 SLJIT_ASSERT(inp_flags & LOAD_DATA);
1479 return load_immediate(compiler, reg, argw);
1480 }
1481
1482 SLJIT_ASSERT(arg & SLJIT_MEM);
1483
1484 tmp_r = (inp_flags & LOAD_DATA) ? reg : TMP_REG3;
1485 max_delta = IS_TYPE1_TRANSFER(inp_flags) ? 0xfff : 0xff;
1486
1487 if ((arg & REG_MASK) == SLJIT_UNUSED) {
1488 /* Write back is not used. */
1489 imm = (sljit_uw)(argw - compiler->cache_argw);
1490 if ((compiler->cache_arg & SLJIT_IMM) && (imm <= (sljit_uw)max_delta || imm >= (sljit_uw)-max_delta)) {
1491 if (imm <= (sljit_uw)max_delta) {
1492 sign = 1;
1493 argw = argw - compiler->cache_argw;
1494 }
1495 else {
1496 sign = 0;
1497 argw = compiler->cache_argw - argw;
1498 }
1499
1500 GETPUT_ARG_DATA_TRANSFER(sign, 0, reg, TMP_REG3, argw);
1501 return SLJIT_SUCCESS;
1502 }
1503
1504 /* With write back, we can create some sophisticated loads, but
1505 it is hard to decide whether we should convert downward (0s) or upward (1s). */
1506 imm = (sljit_uw)(argw - next_argw);
1507 if ((next_arg & SLJIT_MEM) && (imm <= (sljit_uw)max_delta || imm >= (sljit_uw)-max_delta)) {
1508 SLJIT_ASSERT(inp_flags & LOAD_DATA);
1509
1510 compiler->cache_arg = SLJIT_IMM;
1511 compiler->cache_argw = argw;
1512 tmp_r = TMP_REG3;
1513 }
1514
1515 FAIL_IF(load_immediate(compiler, tmp_r, argw));
1516 GETPUT_ARG_DATA_TRANSFER(1, 0, reg, tmp_r, 0);
1517 return SLJIT_SUCCESS;
1518 }
1519
1520 if (arg & OFFS_REG_MASK) {
1521 SLJIT_ASSERT((argw & 0x3) && !(max_delta & 0xf00));
1522 if (inp_flags & WRITE_BACK)
1523 tmp_r = arg & REG_MASK;
1524 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(ADD_DP, 0, tmp_r, arg & REG_MASK, RM(OFFS_REG(arg)) | ((argw & 0x3) << 7))));
1525 return push_inst(compiler, EMIT_DATA_TRANSFER(inp_flags, 1, 0, reg, tmp_r, TYPE2_TRANSFER_IMM(0)));
1526 }
1527
1528 imm = (sljit_uw)(argw - compiler->cache_argw);
1529 if (compiler->cache_arg == arg && imm <= (sljit_uw)max_delta) {
1530 SLJIT_ASSERT(!(inp_flags & WRITE_BACK));
1531 GETPUT_ARG_DATA_TRANSFER(1, 0, reg, TMP_REG3, imm);
1532 return SLJIT_SUCCESS;
1533 }
1534 if (compiler->cache_arg == arg && imm >= (sljit_uw)-max_delta) {
1535 SLJIT_ASSERT(!(inp_flags & WRITE_BACK));
1536 imm = (sljit_uw)-(sljit_sw)imm;
1537 GETPUT_ARG_DATA_TRANSFER(0, 0, reg, TMP_REG3, imm);
1538 return SLJIT_SUCCESS;
1539 }
1540
1541 imm = get_imm(argw & ~max_delta);
1542 if (imm) {
1543 TEST_WRITE_BACK();
1544 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(ADD_DP, 0, tmp_r, arg & REG_MASK, imm)));
1545 GETPUT_ARG_DATA_TRANSFER(1, inp_flags & WRITE_BACK, reg, tmp_r, argw & max_delta);
1546 return SLJIT_SUCCESS;
1547 }
1548
1549 imm = get_imm(-argw & ~max_delta);
1550 if (imm) {
1551 argw = -argw;
1552 TEST_WRITE_BACK();
1553 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(SUB_DP, 0, tmp_r, arg & REG_MASK, imm)));
1554 GETPUT_ARG_DATA_TRANSFER(0, inp_flags & WRITE_BACK, reg, tmp_r, argw & max_delta);
1555 return SLJIT_SUCCESS;
1556 }
1557
1558 if ((compiler->cache_arg & SLJIT_IMM) && compiler->cache_argw == argw) {
1559 TEST_WRITE_BACK();
1560 return push_inst(compiler, EMIT_DATA_TRANSFER(inp_flags, 1, inp_flags & WRITE_BACK, reg, arg & REG_MASK, RM(TMP_REG3) | (max_delta & 0xf00 ? SRC2_IMM : 0)));
1561 }
1562
1563 if (argw == next_argw && (next_arg & SLJIT_MEM)) {
1564 SLJIT_ASSERT(inp_flags & LOAD_DATA);
1565 FAIL_IF(load_immediate(compiler, TMP_REG3, argw));
1566
1567 compiler->cache_arg = SLJIT_IMM;
1568 compiler->cache_argw = argw;
1569
1570 TEST_WRITE_BACK();
1571 return push_inst(compiler, EMIT_DATA_TRANSFER(inp_flags, 1, inp_flags & WRITE_BACK, reg, arg & REG_MASK, RM(TMP_REG3) | (max_delta & 0xf00 ? SRC2_IMM : 0)));
1572 }
1573
1574 imm = (sljit_uw)(argw - next_argw);
1575 if (arg == next_arg && !(inp_flags & WRITE_BACK) && (imm <= (sljit_uw)max_delta || imm >= (sljit_uw)-max_delta)) {
1576 SLJIT_ASSERT(inp_flags & LOAD_DATA);
1577 FAIL_IF(load_immediate(compiler, TMP_REG3, argw));
1578 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(ADD_DP, 0, TMP_REG3, TMP_REG3, reg_map[arg & REG_MASK])));
1579
1580 compiler->cache_arg = arg;
1581 compiler->cache_argw = argw;
1582
1583 GETPUT_ARG_DATA_TRANSFER(1, 0, reg, TMP_REG3, 0);
1584 return SLJIT_SUCCESS;
1585 }
1586
1587 if ((arg & REG_MASK) == tmp_r) {
1588 compiler->cache_arg = SLJIT_IMM;
1589 compiler->cache_argw = argw;
1590 tmp_r = TMP_REG3;
1591 }
1592
1593 FAIL_IF(load_immediate(compiler, tmp_r, argw));
1594 return push_inst(compiler, EMIT_DATA_TRANSFER(inp_flags, 1, inp_flags & WRITE_BACK, reg, arg & REG_MASK, reg_map[tmp_r] | (max_delta & 0xf00 ? SRC2_IMM : 0)));
1595 }
1596
1597 static SLJIT_INLINE sljit_si emit_op_mem(struct sljit_compiler *compiler, sljit_si flags, sljit_si reg, sljit_si arg, sljit_sw argw)
1598 {
1599 if (getput_arg_fast(compiler, flags, reg, arg, argw))
1600 return compiler->error;
1601 compiler->cache_arg = 0;
1602 compiler->cache_argw = 0;
1603 return getput_arg(compiler, flags, reg, arg, argw, 0, 0);
1604 }
1605
1606 static SLJIT_INLINE sljit_si emit_op_mem2(struct sljit_compiler *compiler, sljit_si flags, sljit_si reg, sljit_si arg1, sljit_sw arg1w, sljit_si arg2, sljit_sw arg2w)
1607 {
1608 if (getput_arg_fast(compiler, flags, reg, arg1, arg1w))
1609 return compiler->error;
1610 return getput_arg(compiler, flags, reg, arg1, arg1w, arg2, arg2w);
1611 }
1612
1613 static sljit_si emit_op(struct sljit_compiler *compiler, sljit_si op, sljit_si inp_flags,
1614 sljit_si dst, sljit_sw dstw,
1615 sljit_si src1, sljit_sw src1w,
1616 sljit_si src2, sljit_sw src2w)
1617 {
1618 /* arg1 goes to TMP_REG1 or src reg
1619 arg2 goes to TMP_REG2, imm or src reg
1620 TMP_REG3 can be used for caching
1621 result goes to TMP_REG2, so put result can use TMP_REG1 and TMP_REG3. */
1622
1623 /* We prefers register and simple consts. */
1624 sljit_si dst_r;
1625 sljit_si src1_r;
1626 sljit_si src2_r = 0;
1627 sljit_si sugg_src2_r = TMP_REG2;
1628 sljit_si flags = GET_FLAGS(op) ? SET_FLAGS : 0;
1629
1630 compiler->cache_arg = 0;
1631 compiler->cache_argw = 0;
1632
1633 /* Destination check. */
1634 if (SLJIT_UNLIKELY(dst == SLJIT_UNUSED)) {
1635 if (op >= SLJIT_MOV && op <= SLJIT_MOVU_SI && !(src2 & SLJIT_MEM))
1636 return SLJIT_SUCCESS;
1637 dst_r = TMP_REG2;
1638 }
1639 else if (FAST_IS_REG(dst)) {
1640 dst_r = dst;
1641 flags |= REG_DEST;
1642 if (op >= SLJIT_MOV && op <= SLJIT_MOVU_SI)
1643 sugg_src2_r = dst_r;
1644 }
1645 else {
1646 SLJIT_ASSERT(dst & SLJIT_MEM);
1647 if (getput_arg_fast(compiler, inp_flags | ARG_TEST, TMP_REG2, dst, dstw)) {
1648 flags |= FAST_DEST;
1649 dst_r = TMP_REG2;
1650 }
1651 else {
1652 flags |= SLOW_DEST;
1653 dst_r = 0;
1654 }
1655 }
1656
1657 /* Source 1. */
1658 if (FAST_IS_REG(src1))
1659 src1_r = src1;
1660 else if (FAST_IS_REG(src2)) {
1661 flags |= ARGS_SWAPPED;
1662 src1_r = src2;
1663 src2 = src1;
1664 src2w = src1w;
1665 }
1666 else do { /* do { } while(0) is used because of breaks. */
1667 src1_r = 0;
1668 if ((inp_flags & ALLOW_ANY_IMM) && (src1 & SLJIT_IMM)) {
1669 /* The second check will generate a hit. */
1670 src2_r = get_imm(src1w);
1671 if (src2_r) {
1672 flags |= ARGS_SWAPPED;
1673 src1 = src2;
1674 src1w = src2w;
1675 break;
1676 }
1677 if (inp_flags & ALLOW_INV_IMM) {
1678 src2_r = get_imm(~src1w);
1679 if (src2_r) {
1680 flags |= ARGS_SWAPPED | INV_IMM;
1681 src1 = src2;
1682 src1w = src2w;
1683 break;
1684 }
1685 }
1686 if (GET_OPCODE(op) == SLJIT_ADD) {
1687 src2_r = get_imm(-src1w);
1688 if (src2_r) {
1689 /* Note: ARGS_SWAPPED is intentionally not applied! */
1690 src1 = src2;
1691 src1w = src2w;
1692 op = SLJIT_SUB | GET_ALL_FLAGS(op);
1693 break;
1694 }
1695 }
1696 }
1697
1698 if (getput_arg_fast(compiler, inp_flags | LOAD_DATA, TMP_REG1, src1, src1w)) {
1699 FAIL_IF(compiler->error);
1700 src1_r = TMP_REG1;
1701 }
1702 } while (0);
1703
1704 /* Source 2. */
1705 if (src2_r == 0) {
1706 if (FAST_IS_REG(src2)) {
1707 src2_r = src2;
1708 flags |= REG_SOURCE;
1709 if (!(flags & REG_DEST) && op >= SLJIT_MOV && op <= SLJIT_MOVU_SI)
1710 dst_r = src2_r;
1711 }
1712 else do { /* do { } while(0) is used because of breaks. */
1713 if ((inp_flags & ALLOW_ANY_IMM) && (src2 & SLJIT_IMM)) {
1714 src2_r = get_imm(src2w);
1715 if (src2_r)
1716 break;
1717 if (inp_flags & ALLOW_INV_IMM) {
1718 src2_r = get_imm(~src2w);
1719 if (src2_r) {
1720 flags |= INV_IMM;
1721 break;
1722 }
1723 }
1724 if (GET_OPCODE(op) == SLJIT_ADD) {
1725 src2_r = get_imm(-src2w);
1726 if (src2_r) {
1727 op = SLJIT_SUB | GET_ALL_FLAGS(op);
1728 flags &= ~ARGS_SWAPPED;
1729 break;
1730 }
1731 }
1732 if (GET_OPCODE(op) == SLJIT_SUB && !(flags & ARGS_SWAPPED)) {
1733 src2_r = get_imm(-src2w);
1734 if (src2_r) {
1735 op = SLJIT_ADD | GET_ALL_FLAGS(op);
1736 flags &= ~ARGS_SWAPPED;
1737 break;
1738 }
1739 }
1740 }
1741
1742 /* src2_r is 0. */
1743 if (getput_arg_fast(compiler, inp_flags | LOAD_DATA, sugg_src2_r, src2, src2w)) {
1744 FAIL_IF(compiler->error);
1745 src2_r = sugg_src2_r;
1746 }
1747 } while (0);
1748 }
1749
1750 /* src1_r, src2_r and dst_r can be zero (=unprocessed) or non-zero.
1751 If they are zero, they must not be registers. */
1752 if (src1_r == 0 && src2_r == 0 && dst_r == 0) {
1753 if (!can_cache(src1, src1w, src2, src2w) && can_cache(src1, src1w, dst, dstw)) {
1754 SLJIT_ASSERT(!(flags & ARGS_SWAPPED));
1755 flags |= ARGS_SWAPPED;
1756 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, TMP_REG1, src2, src2w, src1, src1w));
1757 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, TMP_REG2, src1, src1w, dst, dstw));
1758 }
1759 else {
1760 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, TMP_REG1, src1, src1w, src2, src2w));
1761 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, TMP_REG2, src2, src2w, dst, dstw));
1762 }
1763 src1_r = TMP_REG1;
1764 src2_r = TMP_REG2;
1765 }
1766 else if (src1_r == 0 && src2_r == 0) {
1767 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, TMP_REG1, src1, src1w, src2, src2w));
1768 src1_r = TMP_REG1;
1769 }
1770 else if (src1_r == 0 && dst_r == 0) {
1771 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, TMP_REG1, src1, src1w, dst, dstw));
1772 src1_r = TMP_REG1;
1773 }
1774 else if (src2_r == 0 && dst_r == 0) {
1775 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, sugg_src2_r, src2, src2w, dst, dstw));
1776 src2_r = sugg_src2_r;
1777 }
1778
1779 if (dst_r == 0)
1780 dst_r = TMP_REG2;
1781
1782 if (src1_r == 0) {
1783 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, TMP_REG1, src1, src1w, 0, 0));
1784 src1_r = TMP_REG1;
1785 }
1786
1787 if (src2_r == 0) {
1788 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, sugg_src2_r, src2, src2w, 0, 0));
1789 src2_r = sugg_src2_r;
1790 }
1791
1792 FAIL_IF(emit_single_op(compiler, op, flags, dst_r, src1_r, src2_r));
1793
1794 if (flags & (FAST_DEST | SLOW_DEST)) {
1795 if (flags & FAST_DEST)
1796 FAIL_IF(getput_arg_fast(compiler, inp_flags, dst_r, dst, dstw));
1797 else
1798 FAIL_IF(getput_arg(compiler, inp_flags, dst_r, dst, dstw, 0, 0));
1799 }
1800 return SLJIT_SUCCESS;
1801 }
1802
1803 #ifdef __cplusplus
1804 extern "C" {
1805 #endif
1806
1807 #if defined(__GNUC__)
1808 extern unsigned int __aeabi_uidivmod(unsigned int numerator, unsigned int denominator);
1809 extern int __aeabi_idivmod(int numerator, int denominator);
1810 #else
1811 #error "Software divmod functions are needed"
1812 #endif
1813
1814 #ifdef __cplusplus
1815 }
1816 #endif
1817
1818 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_op0(struct sljit_compiler *compiler, sljit_si op)
1819 {
1820 CHECK_ERROR();
1821 check_sljit_emit_op0(compiler, op);
1822
1823 op = GET_OPCODE(op);
1824 switch (op) {
1825 case SLJIT_BREAKPOINT:
1826 FAIL_IF(push_inst(compiler, BKPT));
1827 break;
1828 case SLJIT_NOP:
1829 FAIL_IF(push_inst(compiler, NOP));
1830 break;
1831 case SLJIT_UMUL:
1832 case SLJIT_SMUL:
1833 #if (defined SLJIT_CONFIG_ARM_V7 && SLJIT_CONFIG_ARM_V7)
1834 return push_inst(compiler, (op == SLJIT_UMUL ? UMULL : SMULL)
1835 | (reg_map[SLJIT_R1] << 16)
1836 | (reg_map[SLJIT_R0] << 12)
1837 | (reg_map[SLJIT_R0] << 8)
1838 | reg_map[SLJIT_R1]);
1839 #else
1840 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, TMP_REG1, SLJIT_UNUSED, RM(SLJIT_R1))));
1841 return push_inst(compiler, (op == SLJIT_UMUL ? UMULL : SMULL)
1842 | (reg_map[SLJIT_R1] << 16)
1843 | (reg_map[SLJIT_R0] << 12)
1844 | (reg_map[SLJIT_R0] << 8)
1845 | reg_map[TMP_REG1]);
1846 #endif
1847 case SLJIT_UDIV:
1848 case SLJIT_SDIV:
1849 if (compiler->scratches >= 3)
1850 FAIL_IF(push_inst(compiler, 0xe52d2008 /* str r2, [sp, #-8]! */));
1851 #if defined(__GNUC__)
1852 FAIL_IF(sljit_emit_ijump(compiler, SLJIT_FAST_CALL, SLJIT_IMM,
1853 (op == SLJIT_UDIV ? SLJIT_FUNC_OFFSET(__aeabi_uidivmod) : SLJIT_FUNC_OFFSET(__aeabi_idivmod))));
1854 #else
1855 #error "Software divmod functions are needed"
1856 #endif
1857 if (compiler->scratches >= 3)
1858 return push_inst(compiler, 0xe49d2008 /* ldr r2, [sp], #8 */);
1859 return SLJIT_SUCCESS;
1860 }
1861
1862 return SLJIT_SUCCESS;
1863 }
1864
1865 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_op1(struct sljit_compiler *compiler, sljit_si op,
1866 sljit_si dst, sljit_sw dstw,
1867 sljit_si src, sljit_sw srcw)
1868 {
1869 CHECK_ERROR();
1870 check_sljit_emit_op1(compiler, op, dst, dstw, src, srcw);
1871 ADJUST_LOCAL_OFFSET(dst, dstw);
1872 ADJUST_LOCAL_OFFSET(src, srcw);
1873
1874 switch (GET_OPCODE(op)) {
1875 case SLJIT_MOV:
1876 case SLJIT_MOV_UI:
1877 case SLJIT_MOV_SI:
1878 case SLJIT_MOV_P:
1879 return emit_op(compiler, SLJIT_MOV, ALLOW_ANY_IMM, dst, dstw, TMP_REG1, 0, src, srcw);
1880
1881 case SLJIT_MOV_UB:
1882 return emit_op(compiler, SLJIT_MOV_UB, ALLOW_ANY_IMM | BYTE_DATA, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_ub)srcw : srcw);
1883
1884 case SLJIT_MOV_SB:
1885 return emit_op(compiler, SLJIT_MOV_SB, ALLOW_ANY_IMM | SIGNED_DATA | BYTE_DATA, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_sb)srcw : srcw);
1886
1887 case SLJIT_MOV_UH:
1888 return emit_op(compiler, SLJIT_MOV_UH, ALLOW_ANY_IMM | HALF_DATA, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_uh)srcw : srcw);
1889
1890 case SLJIT_MOV_SH:
1891 return emit_op(compiler, SLJIT_MOV_SH, ALLOW_ANY_IMM | SIGNED_DATA | HALF_DATA, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_sh)srcw : srcw);
1892
1893 case SLJIT_MOVU:
1894 case SLJIT_MOVU_UI:
1895 case SLJIT_MOVU_SI:
1896 case SLJIT_MOVU_P:
1897 return emit_op(compiler, SLJIT_MOV, ALLOW_ANY_IMM | WRITE_BACK, dst, dstw, TMP_REG1, 0, src, srcw);
1898
1899 case SLJIT_MOVU_UB:
1900 return emit_op(compiler, SLJIT_MOV_UB, ALLOW_ANY_IMM | BYTE_DATA | WRITE_BACK, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_ub)srcw : srcw);
1901
1902 case SLJIT_MOVU_SB:
1903 return emit_op(compiler, SLJIT_MOV_SB, ALLOW_ANY_IMM | SIGNED_DATA | BYTE_DATA | WRITE_BACK, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_sb)srcw : srcw);
1904
1905 case SLJIT_MOVU_UH:
1906 return emit_op(compiler, SLJIT_MOV_UH, ALLOW_ANY_IMM | HALF_DATA | WRITE_BACK, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_uh)srcw : srcw);
1907
1908 case SLJIT_MOVU_SH:
1909 return emit_op(compiler, SLJIT_MOV_SH, ALLOW_ANY_IMM | SIGNED_DATA | HALF_DATA | WRITE_BACK, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_sh)srcw : srcw);
1910
1911 case SLJIT_NOT:
1912 return emit_op(compiler, op, ALLOW_ANY_IMM, dst, dstw, TMP_REG1, 0, src, srcw);
1913
1914 case SLJIT_NEG:
1915 #if (defined SLJIT_VERBOSE && SLJIT_VERBOSE) || (defined SLJIT_DEBUG && SLJIT_DEBUG)
1916 compiler->skip_checks = 1;
1917 #endif
1918 return sljit_emit_op2(compiler, SLJIT_SUB | GET_ALL_FLAGS(op), dst, dstw, SLJIT_IMM, 0, src, srcw);
1919
1920 case SLJIT_CLZ:
1921 return emit_op(compiler, op, 0, dst, dstw, TMP_REG1, 0, src, srcw);
1922 }
1923
1924 return SLJIT_SUCCESS;
1925 }
1926
1927 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_op2(struct sljit_compiler *compiler, sljit_si op,
1928 sljit_si dst, sljit_sw dstw,
1929 sljit_si src1, sljit_sw src1w,
1930 sljit_si src2, sljit_sw src2w)
1931 {
1932 CHECK_ERROR();
1933 check_sljit_emit_op2(compiler, op, dst, dstw, src1, src1w, src2, src2w);
1934 ADJUST_LOCAL_OFFSET(dst, dstw);
1935 ADJUST_LOCAL_OFFSET(src1, src1w);
1936 ADJUST_LOCAL_OFFSET(src2, src2w);
1937
1938 switch (GET_OPCODE(op)) {
1939 case SLJIT_ADD:
1940 case SLJIT_ADDC:
1941 case SLJIT_SUB:
1942 case SLJIT_SUBC:
1943 case SLJIT_OR:
1944 case SLJIT_XOR:
1945 return emit_op(compiler, op, ALLOW_IMM, dst, dstw, src1, src1w, src2, src2w);
1946
1947 case SLJIT_MUL:
1948 return emit_op(compiler, op, 0, dst, dstw, src1, src1w, src2, src2w);
1949
1950 case SLJIT_AND:
1951 return emit_op(compiler, op, ALLOW_ANY_IMM, dst, dstw, src1, src1w, src2, src2w);
1952
1953 case SLJIT_SHL:
1954 case SLJIT_LSHR:
1955 case SLJIT_ASHR:
1956 if (src2 & SLJIT_IMM) {
1957 compiler->shift_imm = src2w & 0x1f;
1958 return emit_op(compiler, op, 0, dst, dstw, TMP_REG1, 0, src1, src1w);
1959 }
1960 else {
1961 compiler->shift_imm = 0x20;
1962 return emit_op(compiler, op, 0, dst, dstw, src1, src1w, src2, src2w);
1963 }
1964 }
1965
1966 return SLJIT_SUCCESS;
1967 }
1968
1969 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_get_register_index(sljit_si reg)
1970 {
1971 check_sljit_get_register_index(reg);
1972 return reg_map[reg];
1973 }
1974
1975 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_get_float_register_index(sljit_si reg)
1976 {
1977 check_sljit_get_float_register_index(reg);
1978 return reg << 1;
1979 }
1980
1981 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_op_custom(struct sljit_compiler *compiler,
1982 void *instruction, sljit_si size)
1983 {
1984 CHECK_ERROR();
1985 check_sljit_emit_op_custom(compiler, instruction, size);
1986 SLJIT_ASSERT(size == 4);
1987
1988 return push_inst(compiler, *(sljit_uw*)instruction);
1989 }
1990
1991 /* --------------------------------------------------------------------- */
1992 /* Floating point operators */
1993 /* --------------------------------------------------------------------- */
1994
1995 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
1996
1997 /* 0 - no fpu
1998 1 - vfp */
1999 static sljit_si arm_fpu_type = -1;
2000
2001 static void init_compiler(void)
2002 {
2003 if (arm_fpu_type != -1)
2004 return;
2005
2006 /* TODO: Only the OS can help to determine the correct fpu type. */
2007 arm_fpu_type = 1;
2008 }
2009
2010 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_is_fpu_available(void)
2011 {
2012 #ifdef SLJIT_IS_FPU_AVAILABLE
2013 return SLJIT_IS_FPU_AVAILABLE;
2014 #else
2015 if (arm_fpu_type == -1)
2016 init_compiler();
2017 return arm_fpu_type;
2018 #endif
2019 }
2020
2021 #else
2022
2023 #define arm_fpu_type 1
2024
2025 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_is_fpu_available(void)
2026 {
2027 /* Always available. */
2028 return 1;
2029 }
2030
2031 #endif
2032
2033 #define FPU_LOAD (1 << 20)
2034 #define EMIT_FPU_DATA_TRANSFER(inst, add, base, freg, offs) \
2035 ((inst) | ((add) << 23) | (reg_map[base] << 16) | (freg << 12) | (offs))
2036 #define EMIT_FPU_OPERATION(opcode, mode, dst, src1, src2) \
2037 ((opcode) | (mode) | ((dst) << 12) | (src1) | ((src2) << 16))
2038
2039 static sljit_si emit_fop_mem(struct sljit_compiler *compiler, sljit_si flags, sljit_si reg, sljit_si arg, sljit_sw argw)
2040 {
2041 sljit_sw tmp;
2042 sljit_uw imm;
2043 sljit_sw inst = VSTR_F32 | (flags & (SLJIT_SINGLE_OP | FPU_LOAD));
2044 SLJIT_ASSERT(arg & SLJIT_MEM);
2045
2046 if (SLJIT_UNLIKELY(arg & OFFS_REG_MASK)) {
2047 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(ADD_DP, 0, TMP_REG1, arg & REG_MASK, RM(OFFS_REG(arg)) | ((argw & 0x3) << 7))));
2048 arg = SLJIT_MEM | TMP_REG1;
2049 argw = 0;
2050 }
2051
2052 /* Fast loads and stores. */
2053 if ((arg & REG_MASK)) {
2054 if (!(argw & ~0x3fc))
2055 return push_inst(compiler, EMIT_FPU_DATA_TRANSFER(inst, 1, arg & REG_MASK, reg, argw >> 2));
2056 if (!(-argw & ~0x3fc))
2057 return push_inst(compiler, EMIT_FPU_DATA_TRANSFER(inst, 0, arg & REG_MASK, reg, (-argw) >> 2));
2058 }
2059
2060 if (compiler->cache_arg == arg) {
2061 tmp = argw - compiler->cache_argw;
2062 if (!(tmp & ~0x3fc))
2063 return push_inst(compiler, EMIT_FPU_DATA_TRANSFER(inst, 1, TMP_REG3, reg, tmp >> 2));
2064 if (!(-tmp & ~0x3fc))
2065 return push_inst(compiler, EMIT_FPU_DATA_TRANSFER(inst, 0, TMP_REG3, reg, -tmp >> 2));
2066 if (emit_set_delta(compiler, TMP_REG3, TMP_REG3, tmp) != SLJIT_ERR_UNSUPPORTED) {
2067 FAIL_IF(compiler->error);
2068 compiler->cache_argw = argw;
2069 return push_inst(compiler, EMIT_FPU_DATA_TRANSFER(inst, 1, TMP_REG3, reg, 0));
2070 }
2071 }
2072
2073 if (arg & REG_MASK) {
2074 if (emit_set_delta(compiler, TMP_REG1, arg & REG_MASK, argw) != SLJIT_ERR_UNSUPPORTED) {
2075 FAIL_IF(compiler->error);
2076 return push_inst(compiler, EMIT_FPU_DATA_TRANSFER(inst, 1, TMP_REG1, reg, 0));
2077 }
2078 imm = get_imm(argw & ~0x3fc);
2079 if (imm) {
2080 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(ADD_DP, 0, TMP_REG1, arg & REG_MASK, imm)));
2081 return push_inst(compiler, EMIT_FPU_DATA_TRANSFER(inst, 1, TMP_REG1, reg, (argw & 0x3fc) >> 2));
2082 }
2083 imm = get_imm(-argw & ~0x3fc);
2084 if (imm) {
2085 argw = -argw;
2086 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(SUB_DP, 0, TMP_REG1, arg & REG_MASK, imm)));
2087 return push_inst(compiler, EMIT_FPU_DATA_TRANSFER(inst, 0, TMP_REG1, reg, (argw & 0x3fc) >> 2));
2088 }
2089 }
2090
2091 compiler->cache_arg = arg;
2092 compiler->cache_argw = argw;
2093 if (arg & REG_MASK) {
2094 FAIL_IF(load_immediate(compiler, TMP_REG1, argw));
2095 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(ADD_DP, 0, TMP_REG3, arg & REG_MASK, reg_map[TMP_REG1])));
2096 }
2097 else
2098 FAIL_IF(load_immediate(compiler, TMP_REG3, argw));
2099
2100 return push_inst(compiler, EMIT_FPU_DATA_TRANSFER(inst, 1, TMP_REG3, reg, 0));
2101 }
2102
2103 static SLJIT_INLINE sljit_si sljit_emit_fop1_convw_fromd(struct sljit_compiler *compiler, sljit_si op,
2104 sljit_si dst, sljit_sw dstw,
2105 sljit_si src, sljit_sw srcw)
2106 {
2107 if (src & SLJIT_MEM) {
2108 FAIL_IF(emit_fop_mem(compiler, (op & SLJIT_SINGLE_OP) | FPU_LOAD, TMP_FREG1, src, srcw));
2109 src = TMP_FREG1;
2110 }
2111
2112 FAIL_IF(push_inst(compiler, EMIT_FPU_OPERATION(VCVT_S32_F32, op & SLJIT_SINGLE_OP, TMP_FREG1, src, 0)));
2113
2114 if (dst == SLJIT_UNUSED)
2115 return SLJIT_SUCCESS;
2116
2117 if (FAST_IS_REG(dst))
2118 return push_inst(compiler, VMOV | (1 << 20) | RD(dst) | (TMP_FREG1 << 16));
2119
2120 /* Store the integer value from a VFP register. */
2121 return emit_fop_mem(compiler, 0, TMP_FREG1, dst, dstw);
2122 }
2123
2124 static SLJIT_INLINE sljit_si sljit_emit_fop1_convd_fromw(struct sljit_compiler *compiler, sljit_si op,
2125 sljit_si dst, sljit_sw dstw,
2126 sljit_si src, sljit_sw srcw)
2127 {
2128 sljit_si dst_r = FAST_IS_REG(dst) ? dst : TMP_FREG1;
2129
2130 if (FAST_IS_REG(src))
2131 FAIL_IF(push_inst(compiler, VMOV | RD(src) | (TMP_FREG1 << 16)));
2132 else if (src & SLJIT_MEM) {
2133 /* Load the integer value into a VFP register. */
2134 FAIL_IF(emit_fop_mem(compiler, FPU_LOAD, TMP_FREG1, src, srcw));
2135 }
2136 else {
2137 FAIL_IF(load_immediate(compiler, TMP_REG1, srcw));
2138 FAIL_IF(push_inst(compiler, VMOV | RD(TMP_REG1) | (TMP_FREG1 << 16)));
2139 }
2140
2141 FAIL_IF(push_inst(compiler, EMIT_FPU_OPERATION(VCVT_F32_S32, op & SLJIT_SINGLE_OP, dst_r, TMP_FREG1, 0)));
2142
2143 if (dst & SLJIT_MEM)
2144 return emit_fop_mem(compiler, (op & SLJIT_SINGLE_OP), TMP_FREG1, dst, dstw);
2145 return SLJIT_SUCCESS;
2146 }
2147
2148 static SLJIT_INLINE sljit_si sljit_emit_fop1_cmp(struct sljit_compiler *compiler, sljit_si op,
2149 sljit_si src1, sljit_sw src1w,
2150 sljit_si src2, sljit_sw src2w)
2151 {
2152 if (src1 & SLJIT_MEM) {
2153 FAIL_IF(emit_fop_mem(compiler, (op & SLJIT_SINGLE_OP) | FPU_LOAD, TMP_FREG1, src1, src1w));
2154 src1 = TMP_FREG1;
2155 }
2156
2157 if (src2 & SLJIT_MEM) {
2158 FAIL_IF(emit_fop_mem(compiler, (op & SLJIT_SINGLE_OP) | FPU_LOAD, TMP_FREG2, src2, src2w));
2159 src2 = TMP_FREG2;
2160 }
2161
2162 FAIL_IF(push_inst(compiler, EMIT_FPU_OPERATION(VCMP_F32, op & SLJIT_SINGLE_OP, src1, src2, 0)));
2163 return push_inst(compiler, VMRS);
2164 }
2165
2166 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_fop1(struct sljit_compiler *compiler, sljit_si op,
2167 sljit_si dst, sljit_sw dstw,
2168 sljit_si src, sljit_sw srcw)
2169 {
2170 sljit_si dst_r;
2171
2172 CHECK_ERROR();
2173 compiler->cache_arg = 0;
2174 compiler->cache_argw = 0;
2175 if (GET_OPCODE(op) != SLJIT_CONVD_FROMS)
2176 op ^= SLJIT_SINGLE_OP;
2177
2178 SLJIT_COMPILE_ASSERT((SLJIT_SINGLE_OP == 0x100), float_transfer_bit_error);
2179 SELECT_FOP1_OPERATION_WITH_CHECKS(compiler, op, dst, dstw, src, srcw);
2180
2181 dst_r = FAST_IS_REG(dst) ? dst : TMP_FREG1;
2182
2183 if (src & SLJIT_MEM) {
2184 FAIL_IF(emit_fop_mem(compiler, (op & SLJIT_SINGLE_OP) | FPU_LOAD, dst_r, src, srcw));
2185 src = dst_r;
2186 }
2187
2188 switch (GET_OPCODE(op)) {
2189 case SLJIT_MOVD:
2190 if (src != dst_r) {
2191 if (dst_r != TMP_FREG1)
2192 FAIL_IF(push_inst(compiler, EMIT_FPU_OPERATION(VMOV_F32, op & SLJIT_SINGLE_OP, dst_r, src, 0)));
2193 else
2194 dst_r = src;
2195 }
2196 break;
2197 case SLJIT_NEGD:
2198 FAIL_IF(push_inst(compiler, EMIT_FPU_OPERATION(VNEG_F32, op & SLJIT_SINGLE_OP, dst_r, src, 0)));
2199 break;
2200 case SLJIT_ABSD:
2201 FAIL_IF(push_inst(compiler, EMIT_FPU_OPERATION(VABS_F32, op & SLJIT_SINGLE_OP, dst_r, src, 0)));
2202 break;
2203 case SLJIT_CONVD_FROMS:
2204 FAIL_IF(push_inst(compiler, EMIT_FPU_OPERATION(VCVT_F64_F32, op & SLJIT_SINGLE_OP, dst_r, src, 0)));
2205 op ^= SLJIT_SINGLE_OP;
2206 break;
2207 }
2208
2209 if (dst & SLJIT_MEM)
2210 return emit_fop_mem(compiler, (op & SLJIT_SINGLE_OP), dst_r, dst, dstw);
2211 return SLJIT_SUCCESS;
2212 }
2213
2214 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_fop2(struct sljit_compiler *compiler, sljit_si op,
2215 sljit_si dst, sljit_sw dstw,
2216 sljit_si src1, sljit_sw src1w,
2217 sljit_si src2, sljit_sw src2w)
2218 {
2219 sljit_si dst_r;
2220
2221 CHECK_ERROR();
2222 check_sljit_emit_fop2(compiler, op, dst, dstw, src1, src1w, src2, src2w);
2223 ADJUST_LOCAL_OFFSET(dst, dstw);
2224 ADJUST_LOCAL_OFFSET(src1, src1w);
2225 ADJUST_LOCAL_OFFSET(src2, src2w);
2226
2227 compiler->cache_arg = 0;
2228 compiler->cache_argw = 0;
2229 op ^= SLJIT_SINGLE_OP;
2230
2231 dst_r = FAST_IS_REG(dst) ? dst : TMP_FREG1;
2232
2233 if (src2 & SLJIT_MEM) {
2234 FAIL_IF(emit_fop_mem(compiler, (op & SLJIT_SINGLE_OP) | FPU_LOAD, TMP_FREG2, src2, src2w));
2235 src2 = TMP_FREG2;
2236 }
2237
2238 if (src1 & SLJIT_MEM) {
2239 FAIL_IF(emit_fop_mem(compiler, (op & SLJIT_SINGLE_OP) | FPU_LOAD, TMP_FREG1, src1, src1w));
2240 src1 = TMP_FREG1;
2241 }
2242
2243 switch (GET_OPCODE(op)) {
2244 case SLJIT_ADDD:
2245 FAIL_IF(push_inst(compiler, EMIT_FPU_OPERATION(VADD_F32, op & SLJIT_SINGLE_OP, dst_r, src2, src1)));
2246 break;
2247
2248 case SLJIT_SUBD:
2249 FAIL_IF(push_inst(compiler, EMIT_FPU_OPERATION(VSUB_F32, op & SLJIT_SINGLE_OP, dst_r, src2, src1)));
2250 break;
2251
2252 case SLJIT_MULD:
2253 FAIL_IF(push_inst(compiler, EMIT_FPU_OPERATION(VMUL_F32, op & SLJIT_SINGLE_OP, dst_r, src2, src1)));
2254 break;
2255
2256 case SLJIT_DIVD:
2257 FAIL_IF(push_inst(compiler, EMIT_FPU_OPERATION(VDIV_F32, op & SLJIT_SINGLE_OP, dst_r, src2, src1)));
2258 break;
2259 }
2260
2261 if (dst_r == TMP_FREG1)
2262 FAIL_IF(emit_fop_mem(compiler, (op & SLJIT_SINGLE_OP), TMP_FREG1, dst, dstw));
2263
2264 return SLJIT_SUCCESS;
2265 }
2266
2267 #undef FPU_LOAD
2268 #undef EMIT_FPU_DATA_TRANSFER
2269 #undef EMIT_FPU_OPERATION
2270
2271 /* --------------------------------------------------------------------- */
2272 /* Other instructions */
2273 /* --------------------------------------------------------------------- */
2274
2275 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_fast_enter(struct sljit_compiler *compiler, sljit_si dst, sljit_sw dstw)
2276 {
2277 CHECK_ERROR();
2278 check_sljit_emit_fast_enter(compiler, dst, dstw);
2279 ADJUST_LOCAL_OFFSET(dst, dstw);
2280
2281 /* For UNUSED dst. Uncommon, but possible. */
2282 if (dst == SLJIT_UNUSED)
2283 return SLJIT_SUCCESS;
2284
2285 if (FAST_IS_REG(dst))
2286 return push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, dst, SLJIT_UNUSED, RM(TMP_REG3)));
2287
2288 /* Memory. */
2289 if (getput_arg_fast(compiler, WORD_DATA, TMP_REG3, dst, dstw))
2290 return compiler->error;
2291 /* TMP_REG3 is used for caching. */
2292 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, TMP_REG2, SLJIT_UNUSED, RM(TMP_REG3))));
2293 compiler->cache_arg = 0;
2294 compiler->cache_argw = 0;
2295 return getput_arg(compiler, WORD_DATA, TMP_REG2, dst, dstw, 0, 0);
2296 }
2297
2298 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_fast_return(struct sljit_compiler *compiler, sljit_si src, sljit_sw srcw)
2299 {
2300 CHECK_ERROR();
2301 check_sljit_emit_fast_return(compiler, src, srcw);
2302 ADJUST_LOCAL_OFFSET(src, srcw);
2303
2304 if (FAST_IS_REG(src))
2305 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, TMP_REG3, SLJIT_UNUSED, RM(src))));
2306 else if (src & SLJIT_MEM) {
2307 if (getput_arg_fast(compiler, WORD_DATA | LOAD_DATA, TMP_REG3, src, srcw))
2308 FAIL_IF(compiler->error);
2309 else {
2310 compiler->cache_arg = 0;
2311 compiler->cache_argw = 0;
2312 FAIL_IF(getput_arg(compiler, WORD_DATA | LOAD_DATA, TMP_REG2, src, srcw, 0, 0));
2313 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, TMP_REG3, SLJIT_UNUSED, RM(TMP_REG2))));
2314 }
2315 }
2316 else if (src & SLJIT_IMM)
2317 FAIL_IF(load_immediate(compiler, TMP_REG3, srcw));
2318 return push_inst(compiler, BLX | RM(TMP_REG3));
2319 }
2320
2321 /* --------------------------------------------------------------------- */
2322 /* Conditional instructions */
2323 /* --------------------------------------------------------------------- */
2324
2325 static sljit_uw get_cc(sljit_si type)
2326 {
2327 switch (type) {
2328 case SLJIT_C_EQUAL:
2329 case SLJIT_C_MUL_NOT_OVERFLOW:
2330 case SLJIT_C_FLOAT_EQUAL:
2331 return 0x00000000;
2332
2333 case SLJIT_C_NOT_EQUAL:
2334 case SLJIT_C_MUL_OVERFLOW:
2335 case SLJIT_C_FLOAT_NOT_EQUAL:
2336 return 0x10000000;
2337
2338 case SLJIT_C_LESS:
2339 case SLJIT_C_FLOAT_LESS:
2340 return 0x30000000;
2341
2342 case SLJIT_C_GREATER_EQUAL:
2343 case SLJIT_C_FLOAT_GREATER_EQUAL:
2344 return 0x20000000;
2345
2346 case SLJIT_C_GREATER:
2347 case SLJIT_C_FLOAT_GREATER:
2348 return 0x80000000;
2349
2350 case SLJIT_C_LESS_EQUAL:
2351 case SLJIT_C_FLOAT_LESS_EQUAL:
2352 return 0x90000000;
2353
2354 case SLJIT_C_SIG_LESS:
2355 return 0xb0000000;
2356
2357 case SLJIT_C_SIG_GREATER_EQUAL:
2358 return 0xa0000000;
2359
2360 case SLJIT_C_SIG_GREATER:
2361 return 0xc0000000;
2362
2363 case SLJIT_C_SIG_LESS_EQUAL:
2364 return 0xd0000000;
2365
2366 case SLJIT_C_OVERFLOW:
2367 case SLJIT_C_FLOAT_UNORDERED:
2368 return 0x60000000;
2369
2370 case SLJIT_C_NOT_OVERFLOW:
2371 case SLJIT_C_FLOAT_ORDERED:
2372 return 0x70000000;
2373
2374 default: /* SLJIT_JUMP */
2375 return 0xe0000000;
2376 }
2377 }
2378
2379 SLJIT_API_FUNC_ATTRIBUTE struct sljit_label* sljit_emit_label(struct sljit_compiler *compiler)
2380 {
2381 struct sljit_label *label;
2382
2383 CHECK_ERROR_PTR();
2384 check_sljit_emit_label(compiler);
2385
2386 if (compiler->last_label && compiler->last_label->size == compiler->size)
2387 return compiler->last_label;
2388
2389 label = (struct sljit_label*)ensure_abuf(compiler, sizeof(struct sljit_label));
2390 PTR_FAIL_IF(!label);
2391 set_label(label, compiler);
2392 return label;
2393 }
2394
2395 SLJIT_API_FUNC_ATTRIBUTE struct sljit_jump* sljit_emit_jump(struct sljit_compiler *compiler, sljit_si type)
2396 {
2397 struct sljit_jump *jump;
2398
2399 CHECK_ERROR_PTR();
2400 check_sljit_emit_jump(compiler, type);
2401
2402 jump = (struct sljit_jump*)ensure_abuf(compiler, sizeof(struct sljit_jump));
2403 PTR_FAIL_IF(!jump);
2404 set_jump(jump, compiler, type & SLJIT_REWRITABLE_JUMP);
2405 type &= 0xff;
2406
2407 /* In ARM, we don't need to touch the arguments. */
2408 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
2409 if (type >= SLJIT_FAST_CALL)
2410 PTR_FAIL_IF(prepare_blx(compiler));
2411 PTR_FAIL_IF(push_inst_with_unique_literal(compiler, ((EMIT_DATA_TRANSFER(WORD_DATA | LOAD_DATA, 1, 0,
2412 type <= SLJIT_JUMP ? TMP_PC : TMP_REG1, TMP_PC, 0)) & ~COND_MASK) | get_cc(type), 0));
2413
2414 if (jump->flags & SLJIT_REWRITABLE_JUMP) {
2415 jump->addr = compiler->size;
2416 compiler->patches++;
2417 }
2418
2419 if (type >= SLJIT_FAST_CALL) {
2420 jump->flags |= IS_BL;
2421 PTR_FAIL_IF(emit_blx(compiler));
2422 }
2423
2424 if (!(jump->flags & SLJIT_REWRITABLE_JUMP))
2425 jump->addr = compiler->size;
2426 #else
2427 if (type >= SLJIT_FAST_CALL)
2428 jump->flags |= IS_BL;
2429 PTR_FAIL_IF(emit_imm(compiler, TMP_REG1, 0));
2430 PTR_FAIL_IF(push_inst(compiler, (((type <= SLJIT_JUMP ? BX : BLX) | RM(TMP_REG1)) & ~COND_MASK) | get_cc(type)));
2431 jump->addr = compiler->size;
2432 #endif
2433 return jump;
2434 }
2435
2436 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_ijump(struct sljit_compiler *compiler, sljit_si type, sljit_si src, sljit_sw srcw)
2437 {
2438 struct sljit_jump *jump;
2439
2440 CHECK_ERROR();
2441 check_sljit_emit_ijump(compiler, type, src, srcw);
2442 ADJUST_LOCAL_OFFSET(src, srcw);
2443
2444 /* In ARM, we don't need to touch the arguments. */
2445 if (!(src & SLJIT_IMM)) {
2446 if (FAST_IS_REG(src))
2447 return push_inst(compiler, (type <= SLJIT_JUMP ? BX : BLX) | RM(src));
2448
2449 SLJIT_ASSERT(src & SLJIT_MEM);
2450 FAIL_IF(emit_op_mem(compiler, WORD_DATA | LOAD_DATA, TMP_REG2, src, srcw));
2451 return push_inst(compiler, (type <= SLJIT_JUMP ? BX : BLX) | RM(TMP_REG2));
2452 }
2453
2454 jump = (struct sljit_jump*)ensure_abuf(compiler, sizeof(struct sljit_jump));
2455 FAIL_IF(!jump);
2456 set_jump(jump, compiler, JUMP_ADDR | ((type >= SLJIT_FAST_CALL) ? IS_BL : 0));
2457 jump->u.target = srcw;
2458
2459 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
2460 if (type >= SLJIT_FAST_CALL)
2461 FAIL_IF(prepare_blx(compiler));
2462 FAIL_IF(push_inst_with_unique_literal(compiler, EMIT_DATA_TRANSFER(WORD_DATA | LOAD_DATA, 1, 0, type <= SLJIT_JUMP ? TMP_PC : TMP_REG1, TMP_PC, 0), 0));
2463 if (type >= SLJIT_FAST_CALL)
2464 FAIL_IF(emit_blx(compiler));
2465 #else
2466 FAIL_IF(emit_imm(compiler, TMP_REG1, 0));
2467 FAIL_IF(push_inst(compiler, (type <= SLJIT_JUMP ? BX : BLX) | RM(TMP_REG1)));
2468 #endif
2469 jump->addr = compiler->size;
2470 return SLJIT_SUCCESS;
2471 }
2472
2473 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_op_flags(struct sljit_compiler *compiler, sljit_si op,
2474 sljit_si dst, sljit_sw dstw,
2475 sljit_si src, sljit_sw srcw,
2476 sljit_si type)
2477 {
2478 sljit_si dst_r, flags = GET_ALL_FLAGS(op);
2479 sljit_uw cc, ins;
2480
2481 CHECK_ERROR();
2482 check_sljit_emit_op_flags(compiler, op, dst, dstw, src, srcw, type);
2483 ADJUST_LOCAL_OFFSET(dst, dstw);
2484 ADJUST_LOCAL_OFFSET(src, srcw);
2485
2486 if (dst == SLJIT_UNUSED)
2487 return SLJIT_SUCCESS;
2488
2489 op = GET_OPCODE(op);
2490 cc = get_cc(type);
2491 dst_r = FAST_IS_REG(dst) ? dst : TMP_REG2;
2492
2493 if (op < SLJIT_ADD) {
2494 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, dst_r, SLJIT_UNUSED, SRC2_IMM | 0)));
2495 FAIL_IF(push_inst(compiler, (EMIT_DATA_PROCESS_INS(MOV_DP, 0, dst_r, SLJIT_UNUSED, SRC2_IMM | 1) & ~COND_MASK) | cc));
2496 return (dst_r == TMP_REG2) ? emit_op_mem(compiler, WORD_DATA, TMP_REG2, dst, dstw) : SLJIT_SUCCESS;
2497 }
2498
2499 ins = (op == SLJIT_AND ? AND_DP : (op == SLJIT_OR ? ORR_DP : EOR_DP));
2500 if ((op == SLJIT_OR || op == SLJIT_XOR) && FAST_IS_REG(dst) && dst == src) {
2501 FAIL_IF(push_inst(compiler, (EMIT_DATA_PROCESS_INS(ins, 0, dst, dst, SRC2_IMM | 1) & ~COND_MASK) | cc));
2502 /* The condition must always be set, even if the ORR/EOR is not executed above. */
2503 return (flags & SLJIT_SET_E) ? push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, SET_FLAGS, TMP_REG1, SLJIT_UNUSED, RM(dst))) : SLJIT_SUCCESS;
2504 }
2505
2506 compiler->cache_arg = 0;
2507 compiler->cache_argw = 0;
2508 if (src & SLJIT_MEM) {
2509 FAIL_IF(emit_op_mem2(compiler, WORD_DATA | LOAD_DATA, TMP_REG1, src, srcw, dst, dstw));
2510 src = TMP_REG1;
2511 srcw = 0;
2512 } else if (src & SLJIT_IMM) {
2513 FAIL_IF(load_immediate(compiler, TMP_REG1, srcw));
2514 src = TMP_REG1;
2515 srcw = 0;
2516 }
2517
2518 FAIL_IF(push_inst(compiler, (EMIT_DATA_PROCESS_INS(ins, 0, dst_r, src, SRC2_IMM | 1) & ~COND_MASK) | cc));
2519 FAIL_IF(push_inst(compiler, (EMIT_DATA_PROCESS_INS(ins, 0, dst_r, src, SRC2_IMM | 0) & ~COND_MASK) | (cc ^ 0x10000000)));
2520 if (dst_r == TMP_REG2)
2521 FAIL_IF(emit_op_mem2(compiler, WORD_DATA, TMP_REG2, dst, dstw, 0, 0));
2522
2523 return (flags & SLJIT_SET_E) ? push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, SET_FLAGS, TMP_REG1, SLJIT_UNUSED, RM(dst_r))) : SLJIT_SUCCESS;
2524 }
2525
2526 SLJIT_API_FUNC_ATTRIBUTE struct sljit_const* sljit_emit_const(struct sljit_compiler *compiler, sljit_si dst, sljit_sw dstw, sljit_sw init_value)
2527 {
2528 struct sljit_const *const_;
2529 sljit_si reg;
2530
2531 CHECK_ERROR_PTR();
2532 check_sljit_emit_const(compiler, dst, dstw, init_value);
2533 ADJUST_LOCAL_OFFSET(dst, dstw);
2534
2535 const_ = (struct sljit_const*)ensure_abuf(compiler, sizeof(struct sljit_const));
2536 PTR_FAIL_IF(!const_);
2537
2538 reg = SLOW_IS_REG(dst) ? dst : TMP_REG2;
2539
2540 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
2541 PTR_FAIL_IF(push_inst_with_unique_literal(compiler, EMIT_DATA_TRANSFER(WORD_DATA | LOAD_DATA, 1, 0, reg, TMP_PC, 0), init_value));
2542 compiler->patches++;
2543 #else
2544 PTR_FAIL_IF(emit_imm(compiler, reg, init_value));
2545 #endif
2546 set_const(const_, compiler);
2547
2548 if (dst & SLJIT_MEM)
2549 PTR_FAIL_IF(emit_op_mem(compiler, WORD_DATA, TMP_REG2, dst, dstw));
2550 return const_;
2551 }
2552
2553 SLJIT_API_FUNC_ATTRIBUTE void sljit_set_jump_addr(sljit_uw addr, sljit_uw new_addr)
2554 {
2555 inline_set_jump_addr(addr, new_addr, 1);
2556 }
2557
2558 SLJIT_API_FUNC_ATTRIBUTE void sljit_set_const(sljit_uw addr, sljit_sw new_constant)
2559 {
2560 inline_set_const(addr, new_constant, 1);
2561 }

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