/[pcre]/code/trunk/sljit/sljitNativeARM_T2_32.c
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Contents of /code/trunk/sljit/sljitNativeARM_T2_32.c

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Revision 1506 - (show annotations)
Sat Sep 27 06:25:26 2014 UTC (4 years, 10 months ago) by zherczeg
File MIME type: text/plain
File size: 64737 byte(s)
Major JIT compiler update.
1 /*
2 * Stack-less Just-In-Time compiler
3 *
4 * Copyright 2009-2012 Zoltan Herczeg (hzmester@freemail.hu). All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without modification, are
7 * permitted provided that the following conditions are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright notice, this list of
10 * conditions and the following disclaimer.
11 *
12 * 2. Redistributions in binary form must reproduce the above copyright notice, this list
13 * of conditions and the following disclaimer in the documentation and/or other materials
14 * provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER(S) AND CONTRIBUTORS ``AS IS'' AND ANY
17 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
19 * SHALL THE COPYRIGHT HOLDER(S) OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
21 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
22 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
24 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 */
26
27 SLJIT_API_FUNC_ATTRIBUTE SLJIT_CONST char* sljit_get_platform_name(void)
28 {
29 return "ARM-Thumb2" SLJIT_CPUINFO;
30 }
31
32 /* Length of an instruction word. */
33 typedef sljit_ui sljit_ins;
34
35 /* Last register + 1. */
36 #define TMP_REG1 (SLJIT_NUMBER_OF_REGISTERS + 2)
37 #define TMP_REG2 (SLJIT_NUMBER_OF_REGISTERS + 3)
38 #define TMP_REG3 (SLJIT_NUMBER_OF_REGISTERS + 4)
39 #define TMP_PC (SLJIT_NUMBER_OF_REGISTERS + 5)
40
41 #define TMP_FREG1 (0)
42 #define TMP_FREG2 (SLJIT_NUMBER_OF_FLOAT_REGISTERS + 1)
43
44 /* See sljit_emit_enter and sljit_emit_op0 if you want to change them. */
45 static SLJIT_CONST sljit_ub reg_map[SLJIT_NUMBER_OF_REGISTERS + 6] = {
46 0, 0, 1, 2, 12, 11, 10, 9, 8, 7, 6, 5, 13, 3, 4, 14, 15
47 };
48
49 #define COPY_BITS(src, from, to, bits) \
50 ((from >= to ? (src >> (from - to)) : (src << (to - from))) & (((1 << bits) - 1) << to))
51
52 /* Thumb16 encodings. */
53 #define RD3(rd) (reg_map[rd])
54 #define RN3(rn) (reg_map[rn] << 3)
55 #define RM3(rm) (reg_map[rm] << 6)
56 #define RDN3(rdn) (reg_map[rdn] << 8)
57 #define IMM3(imm) (imm << 6)
58 #define IMM8(imm) (imm)
59
60 /* Thumb16 helpers. */
61 #define SET_REGS44(rd, rn) \
62 ((reg_map[rn] << 3) | (reg_map[rd] & 0x7) | ((reg_map[rd] & 0x8) << 4))
63 #define IS_2_LO_REGS(reg1, reg2) \
64 (reg_map[reg1] <= 7 && reg_map[reg2] <= 7)
65 #define IS_3_LO_REGS(reg1, reg2, reg3) \
66 (reg_map[reg1] <= 7 && reg_map[reg2] <= 7 && reg_map[reg3] <= 7)
67
68 /* Thumb32 encodings. */
69 #define RD4(rd) (reg_map[rd] << 8)
70 #define RN4(rn) (reg_map[rn] << 16)
71 #define RM4(rm) (reg_map[rm])
72 #define RT4(rt) (reg_map[rt] << 12)
73 #define DD4(dd) ((dd) << 12)
74 #define DN4(dn) ((dn) << 16)
75 #define DM4(dm) (dm)
76 #define IMM5(imm) \
77 (COPY_BITS(imm, 2, 12, 3) | ((imm & 0x3) << 6))
78 #define IMM12(imm) \
79 (COPY_BITS(imm, 11, 26, 1) | COPY_BITS(imm, 8, 12, 3) | (imm & 0xff))
80
81 /* --------------------------------------------------------------------- */
82 /* Instrucion forms */
83 /* --------------------------------------------------------------------- */
84
85 /* dot '.' changed to _
86 I immediate form (possibly followed by number of immediate bits). */
87 #define ADCI 0xf1400000
88 #define ADCS 0x4140
89 #define ADC_W 0xeb400000
90 #define ADD 0x4400
91 #define ADDS 0x1800
92 #define ADDSI3 0x1c00
93 #define ADDSI8 0x3000
94 #define ADD_W 0xeb000000
95 #define ADDWI 0xf2000000
96 #define ADD_SP 0xb000
97 #define ADD_W 0xeb000000
98 #define ADD_WI 0xf1000000
99 #define ANDI 0xf0000000
100 #define ANDS 0x4000
101 #define AND_W 0xea000000
102 #define ASRS 0x4100
103 #define ASRSI 0x1000
104 #define ASR_W 0xfa40f000
105 #define ASR_WI 0xea4f0020
106 #define BICI 0xf0200000
107 #define BKPT 0xbe00
108 #define BLX 0x4780
109 #define BX 0x4700
110 #define CLZ 0xfab0f080
111 #define CMPI 0x2800
112 #define CMP_W 0xebb00f00
113 #define EORI 0xf0800000
114 #define EORS 0x4040
115 #define EOR_W 0xea800000
116 #define IT 0xbf00
117 #define LSLS 0x4080
118 #define LSLSI 0x0000
119 #define LSL_W 0xfa00f000
120 #define LSL_WI 0xea4f0000
121 #define LSRS 0x40c0
122 #define LSRSI 0x0800
123 #define LSR_W 0xfa20f000
124 #define LSR_WI 0xea4f0010
125 #define MOV 0x4600
126 #define MOVS 0x0000
127 #define MOVSI 0x2000
128 #define MOVT 0xf2c00000
129 #define MOVW 0xf2400000
130 #define MOV_W 0xea4f0000
131 #define MOV_WI 0xf04f0000
132 #define MUL 0xfb00f000
133 #define MVNS 0x43c0
134 #define MVN_W 0xea6f0000
135 #define MVN_WI 0xf06f0000
136 #define NOP 0xbf00
137 #define ORNI 0xf0600000
138 #define ORRI 0xf0400000
139 #define ORRS 0x4300
140 #define ORR_W 0xea400000
141 #define POP 0xbc00
142 #define POP_W 0xe8bd0000
143 #define PUSH 0xb400
144 #define PUSH_W 0xe92d0000
145 #define RSB_WI 0xf1c00000
146 #define RSBSI 0x4240
147 #define SBCI 0xf1600000
148 #define SBCS 0x4180
149 #define SBC_W 0xeb600000
150 #define SMULL 0xfb800000
151 #define STR_SP 0x9000
152 #define SUBS 0x1a00
153 #define SUBSI3 0x1e00
154 #define SUBSI8 0x3800
155 #define SUB_W 0xeba00000
156 #define SUBWI 0xf2a00000
157 #define SUB_SP 0xb080
158 #define SUB_WI 0xf1a00000
159 #define SXTB 0xb240
160 #define SXTB_W 0xfa4ff080
161 #define SXTH 0xb200
162 #define SXTH_W 0xfa0ff080
163 #define TST 0x4200
164 #define UMULL 0xfba00000
165 #define UXTB 0xb2c0
166 #define UXTB_W 0xfa5ff080
167 #define UXTH 0xb280
168 #define UXTH_W 0xfa1ff080
169 #define VABS_F32 0xeeb00ac0
170 #define VADD_F32 0xee300a00
171 #define VCMP_F32 0xeeb40a40
172 #define VCVT_F32_S32 0xeeb80ac0
173 #define VCVT_F64_F32 0xeeb70ac0
174 #define VCVT_S32_F32 0xeebd0ac0
175 #define VDIV_F32 0xee800a00
176 #define VMOV_F32 0xeeb00a40
177 #define VMOV 0xee000a10
178 #define VMRS 0xeef1fa10
179 #define VMUL_F32 0xee200a00
180 #define VNEG_F32 0xeeb10a40
181 #define VSTR_F32 0xed000a00
182 #define VSUB_F32 0xee300a40
183
184 static sljit_si push_inst16(struct sljit_compiler *compiler, sljit_ins inst)
185 {
186 sljit_uh *ptr;
187 SLJIT_ASSERT(!(inst & 0xffff0000));
188
189 ptr = (sljit_uh*)ensure_buf(compiler, sizeof(sljit_uh));
190 FAIL_IF(!ptr);
191 *ptr = inst;
192 compiler->size++;
193 return SLJIT_SUCCESS;
194 }
195
196 static sljit_si push_inst32(struct sljit_compiler *compiler, sljit_ins inst)
197 {
198 sljit_uh *ptr = (sljit_uh*)ensure_buf(compiler, sizeof(sljit_ins));
199 FAIL_IF(!ptr);
200 *ptr++ = inst >> 16;
201 *ptr = inst;
202 compiler->size += 2;
203 return SLJIT_SUCCESS;
204 }
205
206 static SLJIT_INLINE sljit_si emit_imm32_const(struct sljit_compiler *compiler, sljit_si dst, sljit_uw imm)
207 {
208 FAIL_IF(push_inst32(compiler, MOVW | RD4(dst) |
209 COPY_BITS(imm, 12, 16, 4) | COPY_BITS(imm, 11, 26, 1) | COPY_BITS(imm, 8, 12, 3) | (imm & 0xff)));
210 return push_inst32(compiler, MOVT | RD4(dst) |
211 COPY_BITS(imm, 12 + 16, 16, 4) | COPY_BITS(imm, 11 + 16, 26, 1) | COPY_BITS(imm, 8 + 16, 12, 3) | ((imm & 0xff0000) >> 16));
212 }
213
214 static SLJIT_INLINE void modify_imm32_const(sljit_uh *inst, sljit_uw new_imm)
215 {
216 sljit_si dst = inst[1] & 0x0f00;
217 SLJIT_ASSERT(((inst[0] & 0xfbf0) == (MOVW >> 16)) && ((inst[2] & 0xfbf0) == (MOVT >> 16)) && dst == (inst[3] & 0x0f00));
218 inst[0] = (MOVW >> 16) | COPY_BITS(new_imm, 12, 0, 4) | COPY_BITS(new_imm, 11, 10, 1);
219 inst[1] = dst | COPY_BITS(new_imm, 8, 12, 3) | (new_imm & 0xff);
220 inst[2] = (MOVT >> 16) | COPY_BITS(new_imm, 12 + 16, 0, 4) | COPY_BITS(new_imm, 11 + 16, 10, 1);
221 inst[3] = dst | COPY_BITS(new_imm, 8 + 16, 12, 3) | ((new_imm & 0xff0000) >> 16);
222 }
223
224 static SLJIT_INLINE sljit_si detect_jump_type(struct sljit_jump *jump, sljit_uh *code_ptr, sljit_uh *code)
225 {
226 sljit_sw diff;
227
228 if (jump->flags & SLJIT_REWRITABLE_JUMP)
229 return 0;
230
231 if (jump->flags & JUMP_ADDR) {
232 /* Branch to ARM code is not optimized yet. */
233 if (!(jump->u.target & 0x1))
234 return 0;
235 diff = ((sljit_sw)jump->u.target - (sljit_sw)(code_ptr + 2)) >> 1;
236 }
237 else {
238 SLJIT_ASSERT(jump->flags & JUMP_LABEL);
239 diff = ((sljit_sw)(code + jump->u.label->size) - (sljit_sw)(code_ptr + 2)) >> 1;
240 }
241
242 if (jump->flags & IS_COND) {
243 SLJIT_ASSERT(!(jump->flags & IS_BL));
244 if (diff <= 127 && diff >= -128) {
245 jump->flags |= PATCH_TYPE1;
246 return 5;
247 }
248 if (diff <= 524287 && diff >= -524288) {
249 jump->flags |= PATCH_TYPE2;
250 return 4;
251 }
252 /* +1 comes from the prefix IT instruction. */
253 diff--;
254 if (diff <= 8388607 && diff >= -8388608) {
255 jump->flags |= PATCH_TYPE3;
256 return 3;
257 }
258 }
259 else if (jump->flags & IS_BL) {
260 if (diff <= 8388607 && diff >= -8388608) {
261 jump->flags |= PATCH_BL;
262 return 3;
263 }
264 }
265 else {
266 if (diff <= 1023 && diff >= -1024) {
267 jump->flags |= PATCH_TYPE4;
268 return 4;
269 }
270 if (diff <= 8388607 && diff >= -8388608) {
271 jump->flags |= PATCH_TYPE5;
272 return 3;
273 }
274 }
275
276 return 0;
277 }
278
279 static SLJIT_INLINE void set_jump_instruction(struct sljit_jump *jump)
280 {
281 sljit_si type = (jump->flags >> 4) & 0xf;
282 sljit_sw diff;
283 sljit_uh *jump_inst;
284 sljit_si s, j1, j2;
285
286 if (SLJIT_UNLIKELY(type == 0)) {
287 modify_imm32_const((sljit_uh*)jump->addr, (jump->flags & JUMP_LABEL) ? jump->u.label->addr : jump->u.target);
288 return;
289 }
290
291 if (jump->flags & JUMP_ADDR) {
292 SLJIT_ASSERT(jump->u.target & 0x1);
293 diff = ((sljit_sw)jump->u.target - (sljit_sw)(jump->addr + 4)) >> 1;
294 }
295 else
296 diff = ((sljit_sw)(jump->u.label->addr) - (sljit_sw)(jump->addr + 4)) >> 1;
297 jump_inst = (sljit_uh*)jump->addr;
298
299 switch (type) {
300 case 1:
301 /* Encoding T1 of 'B' instruction */
302 SLJIT_ASSERT(diff <= 127 && diff >= -128 && (jump->flags & IS_COND));
303 jump_inst[0] = 0xd000 | (jump->flags & 0xf00) | (diff & 0xff);
304 return;
305 case 2:
306 /* Encoding T3 of 'B' instruction */
307 SLJIT_ASSERT(diff <= 524287 && diff >= -524288 && (jump->flags & IS_COND));
308 jump_inst[0] = 0xf000 | COPY_BITS(jump->flags, 8, 6, 4) | COPY_BITS(diff, 11, 0, 6) | COPY_BITS(diff, 19, 10, 1);
309 jump_inst[1] = 0x8000 | COPY_BITS(diff, 17, 13, 1) | COPY_BITS(diff, 18, 11, 1) | (diff & 0x7ff);
310 return;
311 case 3:
312 SLJIT_ASSERT(jump->flags & IS_COND);
313 *jump_inst++ = IT | ((jump->flags >> 4) & 0xf0) | 0x8;
314 diff--;
315 type = 5;
316 break;
317 case 4:
318 /* Encoding T2 of 'B' instruction */
319 SLJIT_ASSERT(diff <= 1023 && diff >= -1024 && !(jump->flags & IS_COND));
320 jump_inst[0] = 0xe000 | (diff & 0x7ff);
321 return;
322 }
323
324 SLJIT_ASSERT(diff <= 8388607 && diff >= -8388608);
325
326 /* Really complex instruction form for branches. */
327 s = (diff >> 23) & 0x1;
328 j1 = (~(diff >> 21) ^ s) & 0x1;
329 j2 = (~(diff >> 22) ^ s) & 0x1;
330 jump_inst[0] = 0xf000 | (s << 10) | COPY_BITS(diff, 11, 0, 10);
331 jump_inst[1] = (j1 << 13) | (j2 << 11) | (diff & 0x7ff);
332
333 /* The others have a common form. */
334 if (type == 5) /* Encoding T4 of 'B' instruction */
335 jump_inst[1] |= 0x9000;
336 else if (type == 6) /* Encoding T1 of 'BL' instruction */
337 jump_inst[1] |= 0xd000;
338 else
339 SLJIT_ASSERT_STOP();
340 }
341
342 SLJIT_API_FUNC_ATTRIBUTE void* sljit_generate_code(struct sljit_compiler *compiler)
343 {
344 struct sljit_memory_fragment *buf;
345 sljit_uh *code;
346 sljit_uh *code_ptr;
347 sljit_uh *buf_ptr;
348 sljit_uh *buf_end;
349 sljit_uw half_count;
350
351 struct sljit_label *label;
352 struct sljit_jump *jump;
353 struct sljit_const *const_;
354
355 CHECK_ERROR_PTR();
356 CHECK_PTR(check_sljit_generate_code(compiler));
357 reverse_buf(compiler);
358
359 code = (sljit_uh*)SLJIT_MALLOC_EXEC(compiler->size * sizeof(sljit_uh));
360 PTR_FAIL_WITH_EXEC_IF(code);
361 buf = compiler->buf;
362
363 code_ptr = code;
364 half_count = 0;
365 label = compiler->labels;
366 jump = compiler->jumps;
367 const_ = compiler->consts;
368
369 do {
370 buf_ptr = (sljit_uh*)buf->memory;
371 buf_end = buf_ptr + (buf->used_size >> 1);
372 do {
373 *code_ptr = *buf_ptr++;
374 /* These structures are ordered by their address. */
375 SLJIT_ASSERT(!label || label->size >= half_count);
376 SLJIT_ASSERT(!jump || jump->addr >= half_count);
377 SLJIT_ASSERT(!const_ || const_->addr >= half_count);
378 if (label && label->size == half_count) {
379 label->addr = ((sljit_uw)code_ptr) | 0x1;
380 label->size = code_ptr - code;
381 label = label->next;
382 }
383 if (jump && jump->addr == half_count) {
384 jump->addr = (sljit_uw)code_ptr - ((jump->flags & IS_COND) ? 10 : 8);
385 code_ptr -= detect_jump_type(jump, code_ptr, code);
386 jump = jump->next;
387 }
388 if (const_ && const_->addr == half_count) {
389 const_->addr = (sljit_uw)code_ptr;
390 const_ = const_->next;
391 }
392 code_ptr ++;
393 half_count ++;
394 } while (buf_ptr < buf_end);
395
396 buf = buf->next;
397 } while (buf);
398
399 if (label && label->size == half_count) {
400 label->addr = ((sljit_uw)code_ptr) | 0x1;
401 label->size = code_ptr - code;
402 label = label->next;
403 }
404
405 SLJIT_ASSERT(!label);
406 SLJIT_ASSERT(!jump);
407 SLJIT_ASSERT(!const_);
408 SLJIT_ASSERT(code_ptr - code <= (sljit_sw)compiler->size);
409
410 jump = compiler->jumps;
411 while (jump) {
412 set_jump_instruction(jump);
413 jump = jump->next;
414 }
415
416 compiler->error = SLJIT_ERR_COMPILED;
417 compiler->executable_size = (code_ptr - code) * sizeof(sljit_uh);
418 SLJIT_CACHE_FLUSH(code, code_ptr);
419 /* Set thumb mode flag. */
420 return (void*)((sljit_uw)code | 0x1);
421 }
422
423 /* --------------------------------------------------------------------- */
424 /* Core code generator functions. */
425 /* --------------------------------------------------------------------- */
426
427 #define INVALID_IMM 0x80000000
428 static sljit_uw get_imm(sljit_uw imm)
429 {
430 /* Thumb immediate form. */
431 sljit_si counter;
432
433 if (imm <= 0xff)
434 return imm;
435
436 if ((imm & 0xffff) == (imm >> 16)) {
437 /* Some special cases. */
438 if (!(imm & 0xff00))
439 return (1 << 12) | (imm & 0xff);
440 if (!(imm & 0xff))
441 return (2 << 12) | ((imm >> 8) & 0xff);
442 if ((imm & 0xff00) == ((imm & 0xff) << 8))
443 return (3 << 12) | (imm & 0xff);
444 }
445
446 /* Assembly optimization: count leading zeroes? */
447 counter = 8;
448 if (!(imm & 0xffff0000)) {
449 counter += 16;
450 imm <<= 16;
451 }
452 if (!(imm & 0xff000000)) {
453 counter += 8;
454 imm <<= 8;
455 }
456 if (!(imm & 0xf0000000)) {
457 counter += 4;
458 imm <<= 4;
459 }
460 if (!(imm & 0xc0000000)) {
461 counter += 2;
462 imm <<= 2;
463 }
464 if (!(imm & 0x80000000)) {
465 counter += 1;
466 imm <<= 1;
467 }
468 /* Since imm >= 128, this must be true. */
469 SLJIT_ASSERT(counter <= 31);
470
471 if (imm & 0x00ffffff)
472 return INVALID_IMM; /* Cannot be encoded. */
473
474 return ((imm >> 24) & 0x7f) | COPY_BITS(counter, 4, 26, 1) | COPY_BITS(counter, 1, 12, 3) | COPY_BITS(counter, 0, 7, 1);
475 }
476
477 static sljit_si load_immediate(struct sljit_compiler *compiler, sljit_si dst, sljit_uw imm)
478 {
479 sljit_uw tmp;
480
481 if (imm >= 0x10000) {
482 tmp = get_imm(imm);
483 if (tmp != INVALID_IMM)
484 return push_inst32(compiler, MOV_WI | RD4(dst) | tmp);
485 tmp = get_imm(~imm);
486 if (tmp != INVALID_IMM)
487 return push_inst32(compiler, MVN_WI | RD4(dst) | tmp);
488 }
489
490 /* set low 16 bits, set hi 16 bits to 0. */
491 FAIL_IF(push_inst32(compiler, MOVW | RD4(dst) |
492 COPY_BITS(imm, 12, 16, 4) | COPY_BITS(imm, 11, 26, 1) | COPY_BITS(imm, 8, 12, 3) | (imm & 0xff)));
493
494 /* set hi 16 bit if needed. */
495 if (imm >= 0x10000)
496 return push_inst32(compiler, MOVT | RD4(dst) |
497 COPY_BITS(imm, 12 + 16, 16, 4) | COPY_BITS(imm, 11 + 16, 26, 1) | COPY_BITS(imm, 8 + 16, 12, 3) | ((imm & 0xff0000) >> 16));
498 return SLJIT_SUCCESS;
499 }
500
501 #define ARG1_IMM 0x0010000
502 #define ARG2_IMM 0x0020000
503 #define KEEP_FLAGS 0x0040000
504 /* SET_FLAGS must be 0x100000 as it is also the value of S bit (can be used for optimization). */
505 #define SET_FLAGS 0x0100000
506 #define UNUSED_RETURN 0x0200000
507 #define SLOW_DEST 0x0400000
508 #define SLOW_SRC1 0x0800000
509 #define SLOW_SRC2 0x1000000
510
511 static sljit_si emit_op_imm(struct sljit_compiler *compiler, sljit_si flags, sljit_si dst, sljit_uw arg1, sljit_uw arg2)
512 {
513 /* dst must be register, TMP_REG1
514 arg1 must be register, TMP_REG1, imm
515 arg2 must be register, TMP_REG2, imm */
516 sljit_si reg;
517 sljit_uw imm, nimm;
518
519 if (SLJIT_UNLIKELY((flags & (ARG1_IMM | ARG2_IMM)) == (ARG1_IMM | ARG2_IMM))) {
520 /* Both are immediates. */
521 flags &= ~ARG1_IMM;
522 FAIL_IF(load_immediate(compiler, TMP_REG1, arg1));
523 arg1 = TMP_REG1;
524 }
525
526 if (flags & (ARG1_IMM | ARG2_IMM)) {
527 reg = (flags & ARG2_IMM) ? arg1 : arg2;
528 imm = (flags & ARG2_IMM) ? arg2 : arg1;
529
530 switch (flags & 0xffff) {
531 case SLJIT_CLZ:
532 case SLJIT_MUL:
533 /* No form with immediate operand. */
534 break;
535 case SLJIT_MOV:
536 SLJIT_ASSERT(!(flags & SET_FLAGS) && (flags & ARG2_IMM) && arg1 == TMP_REG1);
537 return load_immediate(compiler, dst, imm);
538 case SLJIT_NOT:
539 if (!(flags & SET_FLAGS))
540 return load_immediate(compiler, dst, ~imm);
541 /* Since the flags should be set, we just fallback to the register mode.
542 Although some clever things could be done here, "NOT IMM" does not worth the efforts. */
543 break;
544 case SLJIT_ADD:
545 nimm = -imm;
546 if (!(flags & KEEP_FLAGS) && IS_2_LO_REGS(reg, dst)) {
547 if (imm <= 0x7)
548 return push_inst16(compiler, ADDSI3 | IMM3(imm) | RD3(dst) | RN3(reg));
549 if (nimm <= 0x7)
550 return push_inst16(compiler, SUBSI3 | IMM3(nimm) | RD3(dst) | RN3(reg));
551 if (reg == dst) {
552 if (imm <= 0xff)
553 return push_inst16(compiler, ADDSI8 | IMM8(imm) | RDN3(dst));
554 if (nimm <= 0xff)
555 return push_inst16(compiler, SUBSI8 | IMM8(nimm) | RDN3(dst));
556 }
557 }
558 if (!(flags & SET_FLAGS)) {
559 if (imm <= 0xfff)
560 return push_inst32(compiler, ADDWI | RD4(dst) | RN4(reg) | IMM12(imm));
561 if (nimm <= 0xfff)
562 return push_inst32(compiler, SUBWI | RD4(dst) | RN4(reg) | IMM12(nimm));
563 }
564 imm = get_imm(imm);
565 if (imm != INVALID_IMM)
566 return push_inst32(compiler, ADD_WI | (flags & SET_FLAGS) | RD4(dst) | RN4(reg) | imm);
567 break;
568 case SLJIT_ADDC:
569 imm = get_imm(imm);
570 if (imm != INVALID_IMM)
571 return push_inst32(compiler, ADCI | (flags & SET_FLAGS) | RD4(dst) | RN4(reg) | imm);
572 break;
573 case SLJIT_SUB:
574 if (flags & ARG1_IMM) {
575 if (!(flags & KEEP_FLAGS) && imm == 0 && IS_2_LO_REGS(reg, dst))
576 return push_inst16(compiler, RSBSI | RD3(dst) | RN3(reg));
577 imm = get_imm(imm);
578 if (imm != INVALID_IMM)
579 return push_inst32(compiler, RSB_WI | (flags & SET_FLAGS) | RD4(dst) | RN4(reg) | imm);
580 break;
581 }
582 nimm = -imm;
583 if (!(flags & KEEP_FLAGS) && IS_2_LO_REGS(reg, dst)) {
584 if (imm <= 0x7)
585 return push_inst16(compiler, SUBSI3 | IMM3(imm) | RD3(dst) | RN3(reg));
586 if (nimm <= 0x7)
587 return push_inst16(compiler, ADDSI3 | IMM3(nimm) | RD3(dst) | RN3(reg));
588 if (reg == dst) {
589 if (imm <= 0xff)
590 return push_inst16(compiler, SUBSI8 | IMM8(imm) | RDN3(dst));
591 if (nimm <= 0xff)
592 return push_inst16(compiler, ADDSI8 | IMM8(nimm) | RDN3(dst));
593 }
594 if (imm <= 0xff && (flags & UNUSED_RETURN))
595 return push_inst16(compiler, CMPI | IMM8(imm) | RDN3(reg));
596 }
597 if (!(flags & SET_FLAGS)) {
598 if (imm <= 0xfff)
599 return push_inst32(compiler, SUBWI | RD4(dst) | RN4(reg) | IMM12(imm));
600 if (nimm <= 0xfff)
601 return push_inst32(compiler, ADDWI | RD4(dst) | RN4(reg) | IMM12(nimm));
602 }
603 imm = get_imm(imm);
604 if (imm != INVALID_IMM)
605 return push_inst32(compiler, SUB_WI | (flags & SET_FLAGS) | RD4(dst) | RN4(reg) | imm);
606 break;
607 case SLJIT_SUBC:
608 if (flags & ARG1_IMM)
609 break;
610 imm = get_imm(imm);
611 if (imm != INVALID_IMM)
612 return push_inst32(compiler, SBCI | (flags & SET_FLAGS) | RD4(dst) | RN4(reg) | imm);
613 break;
614 case SLJIT_AND:
615 nimm = get_imm(imm);
616 if (nimm != INVALID_IMM)
617 return push_inst32(compiler, ANDI | (flags & SET_FLAGS) | RD4(dst) | RN4(reg) | nimm);
618 imm = get_imm(imm);
619 if (imm != INVALID_IMM)
620 return push_inst32(compiler, BICI | (flags & SET_FLAGS) | RD4(dst) | RN4(reg) | imm);
621 break;
622 case SLJIT_OR:
623 nimm = get_imm(imm);
624 if (nimm != INVALID_IMM)
625 return push_inst32(compiler, ORRI | (flags & SET_FLAGS) | RD4(dst) | RN4(reg) | nimm);
626 imm = get_imm(imm);
627 if (imm != INVALID_IMM)
628 return push_inst32(compiler, ORNI | (flags & SET_FLAGS) | RD4(dst) | RN4(reg) | imm);
629 break;
630 case SLJIT_XOR:
631 imm = get_imm(imm);
632 if (imm != INVALID_IMM)
633 return push_inst32(compiler, EORI | (flags & SET_FLAGS) | RD4(dst) | RN4(reg) | imm);
634 break;
635 case SLJIT_SHL:
636 case SLJIT_LSHR:
637 case SLJIT_ASHR:
638 if (flags & ARG1_IMM)
639 break;
640 imm &= 0x1f;
641 if (imm == 0) {
642 if (!(flags & SET_FLAGS))
643 return push_inst16(compiler, MOV | SET_REGS44(dst, reg));
644 if (IS_2_LO_REGS(dst, reg))
645 return push_inst16(compiler, MOVS | RD3(dst) | RN3(reg));
646 return push_inst32(compiler, MOV_W | SET_FLAGS | RD4(dst) | RM4(reg));
647 }
648 switch (flags & 0xffff) {
649 case SLJIT_SHL:
650 if (!(flags & KEEP_FLAGS) && IS_2_LO_REGS(dst, reg))
651 return push_inst16(compiler, LSLSI | RD3(dst) | RN3(reg) | (imm << 6));
652 return push_inst32(compiler, LSL_WI | (flags & SET_FLAGS) | RD4(dst) | RM4(reg) | IMM5(imm));
653 case SLJIT_LSHR:
654 if (!(flags & KEEP_FLAGS) && IS_2_LO_REGS(dst, reg))
655 return push_inst16(compiler, LSRSI | RD3(dst) | RN3(reg) | (imm << 6));
656 return push_inst32(compiler, LSR_WI | (flags & SET_FLAGS) | RD4(dst) | RM4(reg) | IMM5(imm));
657 default: /* SLJIT_ASHR */
658 if (!(flags & KEEP_FLAGS) && IS_2_LO_REGS(dst, reg))
659 return push_inst16(compiler, ASRSI | RD3(dst) | RN3(reg) | (imm << 6));
660 return push_inst32(compiler, ASR_WI | (flags & SET_FLAGS) | RD4(dst) | RM4(reg) | IMM5(imm));
661 }
662 default:
663 SLJIT_ASSERT_STOP();
664 break;
665 }
666
667 if (flags & ARG2_IMM) {
668 FAIL_IF(load_immediate(compiler, TMP_REG2, arg2));
669 arg2 = TMP_REG2;
670 }
671 else {
672 FAIL_IF(load_immediate(compiler, TMP_REG1, arg1));
673 arg1 = TMP_REG1;
674 }
675 }
676
677 /* Both arguments are registers. */
678 switch (flags & 0xffff) {
679 case SLJIT_MOV:
680 case SLJIT_MOV_UI:
681 case SLJIT_MOV_SI:
682 case SLJIT_MOV_P:
683 case SLJIT_MOVU:
684 case SLJIT_MOVU_UI:
685 case SLJIT_MOVU_SI:
686 case SLJIT_MOVU_P:
687 SLJIT_ASSERT(!(flags & SET_FLAGS) && arg1 == TMP_REG1);
688 if (dst == arg2)
689 return SLJIT_SUCCESS;
690 return push_inst16(compiler, MOV | SET_REGS44(dst, arg2));
691 case SLJIT_MOV_UB:
692 case SLJIT_MOVU_UB:
693 SLJIT_ASSERT(!(flags & SET_FLAGS) && arg1 == TMP_REG1);
694 if (IS_2_LO_REGS(dst, arg2))
695 return push_inst16(compiler, UXTB | RD3(dst) | RN3(arg2));
696 return push_inst32(compiler, UXTB_W | RD4(dst) | RM4(arg2));
697 case SLJIT_MOV_SB:
698 case SLJIT_MOVU_SB:
699 SLJIT_ASSERT(!(flags & SET_FLAGS) && arg1 == TMP_REG1);
700 if (IS_2_LO_REGS(dst, arg2))
701 return push_inst16(compiler, SXTB | RD3(dst) | RN3(arg2));
702 return push_inst32(compiler, SXTB_W | RD4(dst) | RM4(arg2));
703 case SLJIT_MOV_UH:
704 case SLJIT_MOVU_UH:
705 SLJIT_ASSERT(!(flags & SET_FLAGS) && arg1 == TMP_REG1);
706 if (IS_2_LO_REGS(dst, arg2))
707 return push_inst16(compiler, UXTH | RD3(dst) | RN3(arg2));
708 return push_inst32(compiler, UXTH_W | RD4(dst) | RM4(arg2));
709 case SLJIT_MOV_SH:
710 case SLJIT_MOVU_SH:
711 SLJIT_ASSERT(!(flags & SET_FLAGS) && arg1 == TMP_REG1);
712 if (IS_2_LO_REGS(dst, arg2))
713 return push_inst16(compiler, SXTH | RD3(dst) | RN3(arg2));
714 return push_inst32(compiler, SXTH_W | RD4(dst) | RM4(arg2));
715 case SLJIT_NOT:
716 SLJIT_ASSERT(arg1 == TMP_REG1);
717 if (!(flags & KEEP_FLAGS) && IS_2_LO_REGS(dst, arg2))
718 return push_inst16(compiler, MVNS | RD3(dst) | RN3(arg2));
719 return push_inst32(compiler, MVN_W | (flags & SET_FLAGS) | RD4(dst) | RM4(arg2));
720 case SLJIT_CLZ:
721 SLJIT_ASSERT(arg1 == TMP_REG1);
722 FAIL_IF(push_inst32(compiler, CLZ | RN4(arg2) | RD4(dst) | RM4(arg2)));
723 if (flags & SET_FLAGS) {
724 if (reg_map[dst] <= 7)
725 return push_inst16(compiler, CMPI | RDN3(dst));
726 return push_inst32(compiler, ADD_WI | SET_FLAGS | RN4(dst) | RD4(dst));
727 }
728 return SLJIT_SUCCESS;
729 case SLJIT_ADD:
730 if (!(flags & KEEP_FLAGS) && IS_3_LO_REGS(dst, arg1, arg2))
731 return push_inst16(compiler, ADDS | RD3(dst) | RN3(arg1) | RM3(arg2));
732 if (dst == arg1 && !(flags & SET_FLAGS))
733 return push_inst16(compiler, ADD | SET_REGS44(dst, arg2));
734 return push_inst32(compiler, ADD_W | (flags & SET_FLAGS) | RD4(dst) | RN4(arg1) | RM4(arg2));
735 case SLJIT_ADDC:
736 if (dst == arg1 && !(flags & KEEP_FLAGS) && IS_2_LO_REGS(dst, arg2))
737 return push_inst16(compiler, ADCS | RD3(dst) | RN3(arg2));
738 return push_inst32(compiler, ADC_W | (flags & SET_FLAGS) | RD4(dst) | RN4(arg1) | RM4(arg2));
739 case SLJIT_SUB:
740 if (!(flags & KEEP_FLAGS) && IS_3_LO_REGS(dst, arg1, arg2))
741 return push_inst16(compiler, SUBS | RD3(dst) | RN3(arg1) | RM3(arg2));
742 return push_inst32(compiler, SUB_W | (flags & SET_FLAGS) | RD4(dst) | RN4(arg1) | RM4(arg2));
743 case SLJIT_SUBC:
744 if (dst == arg1 && !(flags & KEEP_FLAGS) && IS_2_LO_REGS(dst, arg2))
745 return push_inst16(compiler, SBCS | RD3(dst) | RN3(arg2));
746 return push_inst32(compiler, SBC_W | (flags & SET_FLAGS) | RD4(dst) | RN4(arg1) | RM4(arg2));
747 case SLJIT_MUL:
748 if (!(flags & SET_FLAGS))
749 return push_inst32(compiler, MUL | RD4(dst) | RN4(arg1) | RM4(arg2));
750 SLJIT_ASSERT(reg_map[TMP_REG2] <= 7 && dst != TMP_REG2);
751 FAIL_IF(push_inst32(compiler, SMULL | RT4(dst) | RD4(TMP_REG2) | RN4(arg1) | RM4(arg2)));
752 /* cmp TMP_REG2, dst asr #31. */
753 return push_inst32(compiler, CMP_W | RN4(TMP_REG2) | 0x70e0 | RM4(dst));
754 case SLJIT_AND:
755 if (!(flags & KEEP_FLAGS)) {
756 if (dst == arg1 && IS_2_LO_REGS(dst, arg2))
757 return push_inst16(compiler, ANDS | RD3(dst) | RN3(arg2));
758 if ((flags & UNUSED_RETURN) && IS_2_LO_REGS(arg1, arg2))
759 return push_inst16(compiler, TST | RD3(arg1) | RN3(arg2));
760 }
761 return push_inst32(compiler, AND_W | (flags & SET_FLAGS) | RD4(dst) | RN4(arg1) | RM4(arg2));
762 case SLJIT_OR:
763 if (dst == arg1 && !(flags & KEEP_FLAGS) && IS_2_LO_REGS(dst, arg2))
764 return push_inst16(compiler, ORRS | RD3(dst) | RN3(arg2));
765 return push_inst32(compiler, ORR_W | (flags & SET_FLAGS) | RD4(dst) | RN4(arg1) | RM4(arg2));
766 case SLJIT_XOR:
767 if (dst == arg1 && !(flags & KEEP_FLAGS) && IS_2_LO_REGS(dst, arg2))
768 return push_inst16(compiler, EORS | RD3(dst) | RN3(arg2));
769 return push_inst32(compiler, EOR_W | (flags & SET_FLAGS) | RD4(dst) | RN4(arg1) | RM4(arg2));
770 case SLJIT_SHL:
771 if (dst == arg1 && !(flags & KEEP_FLAGS) && IS_2_LO_REGS(dst, arg2))
772 return push_inst16(compiler, LSLS | RD3(dst) | RN3(arg2));
773 return push_inst32(compiler, LSL_W | (flags & SET_FLAGS) | RD4(dst) | RN4(arg1) | RM4(arg2));
774 case SLJIT_LSHR:
775 if (dst == arg1 && !(flags & KEEP_FLAGS) && IS_2_LO_REGS(dst, arg2))
776 return push_inst16(compiler, LSRS | RD3(dst) | RN3(arg2));
777 return push_inst32(compiler, LSR_W | (flags & SET_FLAGS) | RD4(dst) | RN4(arg1) | RM4(arg2));
778 case SLJIT_ASHR:
779 if (dst == arg1 && !(flags & KEEP_FLAGS) && IS_2_LO_REGS(dst, arg2))
780 return push_inst16(compiler, ASRS | RD3(dst) | RN3(arg2));
781 return push_inst32(compiler, ASR_W | (flags & SET_FLAGS) | RD4(dst) | RN4(arg1) | RM4(arg2));
782 }
783
784 SLJIT_ASSERT_STOP();
785 return SLJIT_SUCCESS;
786 }
787
788 #define STORE 0x01
789 #define SIGNED 0x02
790
791 #define WORD_SIZE 0x00
792 #define BYTE_SIZE 0x04
793 #define HALF_SIZE 0x08
794
795 #define UPDATE 0x10
796 #define ARG_TEST 0x20
797
798 #define IS_WORD_SIZE(flags) (!(flags & (BYTE_SIZE | HALF_SIZE)))
799 #define OFFSET_CHECK(imm, shift) (!(argw & ~(imm << shift)))
800
801 /*
802 1st letter:
803 w = word
804 b = byte
805 h = half
806
807 2nd letter:
808 s = signed
809 u = unsigned
810
811 3rd letter:
812 l = load
813 s = store
814 */
815
816 static SLJIT_CONST sljit_ins sljit_mem16[12] = {
817 /* w u l */ 0x5800 /* ldr */,
818 /* w u s */ 0x5000 /* str */,
819 /* w s l */ 0x5800 /* ldr */,
820 /* w s s */ 0x5000 /* str */,
821
822 /* b u l */ 0x5c00 /* ldrb */,
823 /* b u s */ 0x5400 /* strb */,
824 /* b s l */ 0x5600 /* ldrsb */,
825 /* b s s */ 0x5400 /* strb */,
826
827 /* h u l */ 0x5a00 /* ldrh */,
828 /* h u s */ 0x5200 /* strh */,
829 /* h s l */ 0x5e00 /* ldrsh */,
830 /* h s s */ 0x5200 /* strh */,
831 };
832
833 static SLJIT_CONST sljit_ins sljit_mem16_imm5[12] = {
834 /* w u l */ 0x6800 /* ldr imm5 */,
835 /* w u s */ 0x6000 /* str imm5 */,
836 /* w s l */ 0x6800 /* ldr imm5 */,
837 /* w s s */ 0x6000 /* str imm5 */,
838
839 /* b u l */ 0x7800 /* ldrb imm5 */,
840 /* b u s */ 0x7000 /* strb imm5 */,
841 /* b s l */ 0x0000 /* not allowed */,
842 /* b s s */ 0x7000 /* strb imm5 */,
843
844 /* h u l */ 0x8800 /* ldrh imm5 */,
845 /* h u s */ 0x8000 /* strh imm5 */,
846 /* h s l */ 0x0000 /* not allowed */,
847 /* h s s */ 0x8000 /* strh imm5 */,
848 };
849
850 #define MEM_IMM8 0xc00
851 #define MEM_IMM12 0x800000
852 static SLJIT_CONST sljit_ins sljit_mem32[12] = {
853 /* w u l */ 0xf8500000 /* ldr.w */,
854 /* w u s */ 0xf8400000 /* str.w */,
855 /* w s l */ 0xf8500000 /* ldr.w */,
856 /* w s s */ 0xf8400000 /* str.w */,
857
858 /* b u l */ 0xf8100000 /* ldrb.w */,
859 /* b u s */ 0xf8000000 /* strb.w */,
860 /* b s l */ 0xf9100000 /* ldrsb.w */,
861 /* b s s */ 0xf8000000 /* strb.w */,
862
863 /* h u l */ 0xf8300000 /* ldrh.w */,
864 /* h u s */ 0xf8200000 /* strsh.w */,
865 /* h s l */ 0xf9300000 /* ldrsh.w */,
866 /* h s s */ 0xf8200000 /* strsh.w */,
867 };
868
869 /* Helper function. Dst should be reg + value, using at most 1 instruction, flags does not set. */
870 static sljit_si emit_set_delta(struct sljit_compiler *compiler, sljit_si dst, sljit_si reg, sljit_sw value)
871 {
872 if (value >= 0) {
873 if (value <= 0xfff)
874 return push_inst32(compiler, ADDWI | RD4(dst) | RN4(reg) | IMM12(value));
875 value = get_imm(value);
876 if (value != INVALID_IMM)
877 return push_inst32(compiler, ADD_WI | RD4(dst) | RN4(reg) | value);
878 }
879 else {
880 value = -value;
881 if (value <= 0xfff)
882 return push_inst32(compiler, SUBWI | RD4(dst) | RN4(reg) | IMM12(value));
883 value = get_imm(value);
884 if (value != INVALID_IMM)
885 return push_inst32(compiler, SUB_WI | RD4(dst) | RN4(reg) | value);
886 }
887 return SLJIT_ERR_UNSUPPORTED;
888 }
889
890 /* Can perform an operation using at most 1 instruction. */
891 static sljit_si getput_arg_fast(struct sljit_compiler *compiler, sljit_si flags, sljit_si reg, sljit_si arg, sljit_sw argw)
892 {
893 sljit_si other_r, shift;
894
895 SLJIT_ASSERT(arg & SLJIT_MEM);
896
897 if (SLJIT_UNLIKELY(flags & UPDATE)) {
898 if ((arg & REG_MASK) && !(arg & OFFS_REG_MASK) && argw <= 0xff && argw >= -0xff) {
899 if (SLJIT_UNLIKELY(flags & ARG_TEST))
900 return 1;
901
902 flags &= ~UPDATE;
903 arg &= 0xf;
904 if (argw >= 0)
905 argw |= 0x200;
906 else {
907 argw = -argw;
908 }
909
910 SLJIT_ASSERT(argw >= 0 && (argw & 0xff) <= 0xff);
911 FAIL_IF(push_inst32(compiler, sljit_mem32[flags] | MEM_IMM8 | RT4(reg) | RN4(arg) | 0x100 | argw));
912 return -1;
913 }
914 return 0;
915 }
916
917 if (SLJIT_UNLIKELY(arg & OFFS_REG_MASK)) {
918 if (SLJIT_UNLIKELY(flags & ARG_TEST))
919 return 1;
920
921 argw &= 0x3;
922 other_r = OFFS_REG(arg);
923 arg &= 0xf;
924
925 if (!argw && IS_3_LO_REGS(reg, arg, other_r))
926 FAIL_IF(push_inst16(compiler, sljit_mem16[flags] | RD3(reg) | RN3(arg) | RM3(other_r)));
927 else
928 FAIL_IF(push_inst32(compiler, sljit_mem32[flags] | RT4(reg) | RN4(arg) | RM4(other_r) | (argw << 4)));
929 return -1;
930 }
931
932 if (!(arg & REG_MASK) || argw > 0xfff || argw < -0xff)
933 return 0;
934
935 if (SLJIT_UNLIKELY(flags & ARG_TEST))
936 return 1;
937
938 arg &= 0xf;
939 if (IS_2_LO_REGS(reg, arg) && sljit_mem16_imm5[flags]) {
940 shift = 3;
941 if (IS_WORD_SIZE(flags)) {
942 if (OFFSET_CHECK(0x1f, 2))
943 shift = 2;
944 }
945 else if (flags & BYTE_SIZE)
946 {
947 if (OFFSET_CHECK(0x1f, 0))
948 shift = 0;
949 }
950 else {
951 SLJIT_ASSERT(flags & HALF_SIZE);
952 if (OFFSET_CHECK(0x1f, 1))
953 shift = 1;
954 }
955
956 if (shift != 3) {
957 FAIL_IF(push_inst16(compiler, sljit_mem16_imm5[flags] | RD3(reg) | RN3(arg) | (argw << (6 - shift))));
958 return -1;
959 }
960 }
961
962 /* SP based immediate. */
963 if (SLJIT_UNLIKELY(arg == SLJIT_SP) && OFFSET_CHECK(0xff, 2) && IS_WORD_SIZE(flags) && reg_map[reg] <= 7) {
964 FAIL_IF(push_inst16(compiler, STR_SP | ((flags & STORE) ? 0 : 0x800) | RDN3(reg) | (argw >> 2)));
965 return -1;
966 }
967
968 if (argw >= 0)
969 FAIL_IF(push_inst32(compiler, sljit_mem32[flags] | MEM_IMM12 | RT4(reg) | RN4(arg) | argw));
970 else
971 FAIL_IF(push_inst32(compiler, sljit_mem32[flags] | MEM_IMM8 | RT4(reg) | RN4(arg) | -argw));
972 return -1;
973 }
974
975 /* see getput_arg below.
976 Note: can_cache is called only for binary operators. Those
977 operators always uses word arguments without write back. */
978 static sljit_si can_cache(sljit_si arg, sljit_sw argw, sljit_si next_arg, sljit_sw next_argw)
979 {
980 sljit_sw diff;
981 if ((arg & OFFS_REG_MASK) || !(next_arg & SLJIT_MEM))
982 return 0;
983
984 if (!(arg & REG_MASK)) {
985 diff = argw - next_argw;
986 if (diff <= 0xfff && diff >= -0xfff)
987 return 1;
988 return 0;
989 }
990
991 if (argw == next_argw)
992 return 1;
993
994 diff = argw - next_argw;
995 if (arg == next_arg && diff <= 0xfff && diff >= -0xfff)
996 return 1;
997
998 return 0;
999 }
1000
1001 /* Emit the necessary instructions. See can_cache above. */
1002 static sljit_si getput_arg(struct sljit_compiler *compiler, sljit_si flags, sljit_si reg,
1003 sljit_si arg, sljit_sw argw, sljit_si next_arg, sljit_sw next_argw)
1004 {
1005 sljit_si tmp_r, other_r;
1006 sljit_sw diff;
1007
1008 SLJIT_ASSERT(arg & SLJIT_MEM);
1009 if (!(next_arg & SLJIT_MEM)) {
1010 next_arg = 0;
1011 next_argw = 0;
1012 }
1013
1014 tmp_r = (flags & STORE) ? TMP_REG3 : reg;
1015
1016 if (SLJIT_UNLIKELY((flags & UPDATE) && (arg & REG_MASK))) {
1017 /* Update only applies if a base register exists. */
1018 /* There is no caching here. */
1019 other_r = OFFS_REG(arg);
1020 arg &= 0xf;
1021 flags &= ~UPDATE;
1022
1023 if (!other_r) {
1024 if (!(argw & ~0xfff)) {
1025 FAIL_IF(push_inst32(compiler, sljit_mem32[flags] | MEM_IMM12 | RT4(reg) | RN4(arg) | argw));
1026 return push_inst32(compiler, ADDWI | RD4(arg) | RN4(arg) | IMM12(argw));
1027 }
1028
1029 if (compiler->cache_arg == SLJIT_MEM) {
1030 if (argw == compiler->cache_argw) {
1031 other_r = TMP_REG3;
1032 argw = 0;
1033 }
1034 else if (emit_set_delta(compiler, TMP_REG3, TMP_REG3, argw - compiler->cache_argw) != SLJIT_ERR_UNSUPPORTED) {
1035 FAIL_IF(compiler->error);
1036 compiler->cache_argw = argw;
1037 other_r = TMP_REG3;
1038 argw = 0;
1039 }
1040 }
1041
1042 if (argw) {
1043 FAIL_IF(load_immediate(compiler, TMP_REG3, argw));
1044 compiler->cache_arg = SLJIT_MEM;
1045 compiler->cache_argw = argw;
1046 other_r = TMP_REG3;
1047 argw = 0;
1048 }
1049 }
1050
1051 argw &= 0x3;
1052 if (!argw && IS_3_LO_REGS(reg, arg, other_r)) {
1053 FAIL_IF(push_inst16(compiler, sljit_mem16[flags] | RD3(reg) | RN3(arg) | RM3(other_r)));
1054 return push_inst16(compiler, ADD | SET_REGS44(arg, other_r));
1055 }
1056 FAIL_IF(push_inst32(compiler, sljit_mem32[flags] | RT4(reg) | RN4(arg) | RM4(other_r) | (argw << 4)));
1057 return push_inst32(compiler, ADD_W | RD4(arg) | RN4(arg) | RM4(other_r) | (argw << 6));
1058 }
1059 flags &= ~UPDATE;
1060
1061 SLJIT_ASSERT(!(arg & OFFS_REG_MASK));
1062
1063 if (compiler->cache_arg == arg) {
1064 diff = argw - compiler->cache_argw;
1065 if (!(diff & ~0xfff))
1066 return push_inst32(compiler, sljit_mem32[flags] | MEM_IMM12 | RT4(reg) | RN4(TMP_REG3) | diff);
1067 if (!((compiler->cache_argw - argw) & ~0xff))
1068 return push_inst32(compiler, sljit_mem32[flags] | MEM_IMM8 | RT4(reg) | RN4(TMP_REG3) | (compiler->cache_argw - argw));
1069 if (emit_set_delta(compiler, TMP_REG3, TMP_REG3, diff) != SLJIT_ERR_UNSUPPORTED) {
1070 FAIL_IF(compiler->error);
1071 return push_inst32(compiler, sljit_mem32[flags] | MEM_IMM12 | RT4(reg) | RN4(TMP_REG3) | 0);
1072 }
1073 }
1074
1075 next_arg = (arg & REG_MASK) && (arg == next_arg) && (argw != next_argw);
1076 arg &= 0xf;
1077 if (arg && compiler->cache_arg == SLJIT_MEM) {
1078 if (compiler->cache_argw == argw)
1079 return push_inst32(compiler, sljit_mem32[flags] | RT4(reg) | RN4(arg) | RM4(TMP_REG3));
1080 if (emit_set_delta(compiler, TMP_REG3, TMP_REG3, argw - compiler->cache_argw) != SLJIT_ERR_UNSUPPORTED) {
1081 FAIL_IF(compiler->error);
1082 compiler->cache_argw = argw;
1083 return push_inst32(compiler, sljit_mem32[flags] | RT4(reg) | RN4(arg) | RM4(TMP_REG3));
1084 }
1085 }
1086
1087 compiler->cache_argw = argw;
1088 if (next_arg && emit_set_delta(compiler, TMP_REG3, arg, argw) != SLJIT_ERR_UNSUPPORTED) {
1089 FAIL_IF(compiler->error);
1090 compiler->cache_arg = SLJIT_MEM | arg;
1091 arg = 0;
1092 }
1093 else {
1094 FAIL_IF(load_immediate(compiler, TMP_REG3, argw));
1095 compiler->cache_arg = SLJIT_MEM;
1096
1097 diff = argw - next_argw;
1098 if (next_arg && diff <= 0xfff && diff >= -0xfff) {
1099 FAIL_IF(push_inst16(compiler, ADD | SET_REGS44(TMP_REG3, arg)));
1100 compiler->cache_arg = SLJIT_MEM | arg;
1101 arg = 0;
1102 }
1103 }
1104
1105 if (arg)
1106 return push_inst32(compiler, sljit_mem32[flags] | RT4(reg) | RN4(arg) | RM4(TMP_REG3));
1107 return push_inst32(compiler, sljit_mem32[flags] | MEM_IMM12 | RT4(reg) | RN4(TMP_REG3) | 0);
1108 }
1109
1110 static SLJIT_INLINE sljit_si emit_op_mem(struct sljit_compiler *compiler, sljit_si flags, sljit_si reg, sljit_si arg, sljit_sw argw)
1111 {
1112 if (getput_arg_fast(compiler, flags, reg, arg, argw))
1113 return compiler->error;
1114 compiler->cache_arg = 0;
1115 compiler->cache_argw = 0;
1116 return getput_arg(compiler, flags, reg, arg, argw, 0, 0);
1117 }
1118
1119 static SLJIT_INLINE sljit_si emit_op_mem2(struct sljit_compiler *compiler, sljit_si flags, sljit_si reg, sljit_si arg1, sljit_sw arg1w, sljit_si arg2, sljit_sw arg2w)
1120 {
1121 if (getput_arg_fast(compiler, flags, reg, arg1, arg1w))
1122 return compiler->error;
1123 return getput_arg(compiler, flags, reg, arg1, arg1w, arg2, arg2w);
1124 }
1125
1126 /* --------------------------------------------------------------------- */
1127 /* Entry, exit */
1128 /* --------------------------------------------------------------------- */
1129
1130 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_enter(struct sljit_compiler *compiler,
1131 sljit_si options, sljit_si args, sljit_si scratches, sljit_si saveds,
1132 sljit_si fscratches, sljit_si fsaveds, sljit_si local_size)
1133 {
1134 sljit_si size, i, tmp;
1135 sljit_ins push;
1136
1137 CHECK_ERROR();
1138 CHECK(check_sljit_emit_enter(compiler, options, args, scratches, saveds, fscratches, fsaveds, local_size));
1139 set_emit_enter(compiler, options, args, scratches, saveds, fscratches, fsaveds, local_size);
1140
1141 push = (1 << 4);
1142
1143 tmp = saveds < SLJIT_NUMBER_OF_SAVED_REGISTERS ? (SLJIT_S0 + 1 - saveds) : SLJIT_FIRST_SAVED_REG;
1144 for (i = SLJIT_S0; i >= tmp; i--)
1145 push |= 1 << reg_map[i];
1146
1147 for (i = scratches; i >= SLJIT_FIRST_SAVED_REG; i--)
1148 push |= 1 << reg_map[i];
1149
1150 FAIL_IF((push & 0xff00)
1151 ? push_inst32(compiler, PUSH_W | (1 << 14) | push)
1152 : push_inst16(compiler, PUSH | (1 << 8) | push));
1153
1154 /* Stack must be aligned to 8 bytes: (LR, R4) */
1155 size = GET_SAVED_REGISTERS_SIZE(scratches, saveds, 2);
1156 local_size = ((size + local_size + 7) & ~7) - size;
1157 compiler->local_size = local_size;
1158 if (local_size > 0) {
1159 if (local_size <= (127 << 2))
1160 FAIL_IF(push_inst16(compiler, SUB_SP | (local_size >> 2)));
1161 else
1162 FAIL_IF(emit_op_imm(compiler, SLJIT_SUB | ARG2_IMM, SLJIT_SP, SLJIT_SP, local_size));
1163 }
1164
1165 if (args >= 1)
1166 FAIL_IF(push_inst16(compiler, MOV | SET_REGS44(SLJIT_S0, SLJIT_R0)));
1167 if (args >= 2)
1168 FAIL_IF(push_inst16(compiler, MOV | SET_REGS44(SLJIT_S1, SLJIT_R1)));
1169 if (args >= 3)
1170 FAIL_IF(push_inst16(compiler, MOV | SET_REGS44(SLJIT_S2, SLJIT_R2)));
1171
1172 return SLJIT_SUCCESS;
1173 }
1174
1175 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_set_context(struct sljit_compiler *compiler,
1176 sljit_si options, sljit_si args, sljit_si scratches, sljit_si saveds,
1177 sljit_si fscratches, sljit_si fsaveds, sljit_si local_size)
1178 {
1179 sljit_si size;
1180
1181 CHECK_ERROR();
1182 CHECK(check_sljit_set_context(compiler, options, args, scratches, saveds, fscratches, fsaveds, local_size));
1183 set_set_context(compiler, options, args, scratches, saveds, fscratches, fsaveds, local_size);
1184
1185 size = GET_SAVED_REGISTERS_SIZE(scratches, saveds, 2);
1186 compiler->local_size = ((size + local_size + 7) & ~7) - size;
1187 return SLJIT_SUCCESS;
1188 }
1189
1190 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_return(struct sljit_compiler *compiler, sljit_si op, sljit_si src, sljit_sw srcw)
1191 {
1192 sljit_si i, tmp;
1193 sljit_ins pop;
1194
1195 CHECK_ERROR();
1196 CHECK(check_sljit_emit_return(compiler, op, src, srcw));
1197
1198 FAIL_IF(emit_mov_before_return(compiler, op, src, srcw));
1199
1200 if (compiler->local_size > 0) {
1201 if (compiler->local_size <= (127 << 2))
1202 FAIL_IF(push_inst16(compiler, ADD_SP | (compiler->local_size >> 2)));
1203 else
1204 FAIL_IF(emit_op_imm(compiler, SLJIT_ADD | ARG2_IMM, SLJIT_SP, SLJIT_SP, compiler->local_size));
1205 }
1206
1207 pop = (1 << 4);
1208
1209 tmp = compiler->saveds < SLJIT_NUMBER_OF_SAVED_REGISTERS ? (SLJIT_S0 + 1 - compiler->saveds) : SLJIT_FIRST_SAVED_REG;
1210 for (i = SLJIT_S0; i >= tmp; i--)
1211 pop |= 1 << reg_map[i];
1212
1213 for (i = compiler->scratches; i >= SLJIT_FIRST_SAVED_REG; i--)
1214 pop |= 1 << reg_map[i];
1215
1216 return (pop & 0xff00)
1217 ? push_inst32(compiler, POP_W | (1 << 15) | pop)
1218 : push_inst16(compiler, POP | (1 << 8) | pop);
1219 }
1220
1221 /* --------------------------------------------------------------------- */
1222 /* Operators */
1223 /* --------------------------------------------------------------------- */
1224
1225 #ifdef __cplusplus
1226 extern "C" {
1227 #endif
1228
1229 #if defined(__GNUC__)
1230 extern unsigned int __aeabi_uidivmod(unsigned int numerator, int unsigned denominator);
1231 extern int __aeabi_idivmod(int numerator, int denominator);
1232 #else
1233 #error "Software divmod functions are needed"
1234 #endif
1235
1236 #ifdef __cplusplus
1237 }
1238 #endif
1239
1240 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_op0(struct sljit_compiler *compiler, sljit_si op)
1241 {
1242 CHECK_ERROR();
1243 CHECK(check_sljit_emit_op0(compiler, op));
1244
1245 op = GET_OPCODE(op);
1246 switch (op) {
1247 case SLJIT_BREAKPOINT:
1248 return push_inst16(compiler, BKPT);
1249 case SLJIT_NOP:
1250 return push_inst16(compiler, NOP);
1251 case SLJIT_LUMUL:
1252 case SLJIT_LSMUL:
1253 return push_inst32(compiler, (op == SLJIT_LUMUL ? UMULL : SMULL)
1254 | (reg_map[SLJIT_R1] << 8)
1255 | (reg_map[SLJIT_R0] << 12)
1256 | (reg_map[SLJIT_R0] << 16)
1257 | reg_map[SLJIT_R1]);
1258 case SLJIT_LUDIV:
1259 case SLJIT_LSDIV:
1260 if (compiler->scratches >= 4) {
1261 FAIL_IF(push_inst32(compiler, 0xf84d2d04 /* str r2, [sp, #-4]! */));
1262 FAIL_IF(push_inst32(compiler, 0xf84dcd04 /* str ip, [sp, #-4]! */));
1263 } else if (compiler->scratches >= 3)
1264 FAIL_IF(push_inst32(compiler, 0xf84d2d08 /* str r2, [sp, #-8]! */));
1265 #if defined(__GNUC__)
1266 FAIL_IF(sljit_emit_ijump(compiler, SLJIT_FAST_CALL, SLJIT_IMM,
1267 (op == SLJIT_LUDIV ? SLJIT_FUNC_OFFSET(__aeabi_uidivmod) : SLJIT_FUNC_OFFSET(__aeabi_idivmod))));
1268 #else
1269 #error "Software divmod functions are needed"
1270 #endif
1271 if (compiler->scratches >= 4) {
1272 FAIL_IF(push_inst32(compiler, 0xf85dcb04 /* ldr ip, [sp], #4 */));
1273 return push_inst32(compiler, 0xf85d2b04 /* ldr r2, [sp], #4 */);
1274 } else if (compiler->scratches >= 3)
1275 return push_inst32(compiler, 0xf85d2b08 /* ldr r2, [sp], #8 */);
1276 return SLJIT_SUCCESS;
1277 }
1278
1279 return SLJIT_SUCCESS;
1280 }
1281
1282 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_op1(struct sljit_compiler *compiler, sljit_si op,
1283 sljit_si dst, sljit_sw dstw,
1284 sljit_si src, sljit_sw srcw)
1285 {
1286 sljit_si dst_r, flags;
1287 sljit_si op_flags = GET_ALL_FLAGS(op);
1288
1289 CHECK_ERROR();
1290 CHECK(check_sljit_emit_op1(compiler, op, dst, dstw, src, srcw));
1291 ADJUST_LOCAL_OFFSET(dst, dstw);
1292 ADJUST_LOCAL_OFFSET(src, srcw);
1293
1294 compiler->cache_arg = 0;
1295 compiler->cache_argw = 0;
1296
1297 dst_r = SLOW_IS_REG(dst) ? dst : TMP_REG1;
1298
1299 op = GET_OPCODE(op);
1300 if (op >= SLJIT_MOV && op <= SLJIT_MOVU_P) {
1301 switch (op) {
1302 case SLJIT_MOV:
1303 case SLJIT_MOV_UI:
1304 case SLJIT_MOV_SI:
1305 case SLJIT_MOV_P:
1306 flags = WORD_SIZE;
1307 break;
1308 case SLJIT_MOV_UB:
1309 flags = BYTE_SIZE;
1310 if (src & SLJIT_IMM)
1311 srcw = (sljit_ub)srcw;
1312 break;
1313 case SLJIT_MOV_SB:
1314 flags = BYTE_SIZE | SIGNED;
1315 if (src & SLJIT_IMM)
1316 srcw = (sljit_sb)srcw;
1317 break;
1318 case SLJIT_MOV_UH:
1319 flags = HALF_SIZE;
1320 if (src & SLJIT_IMM)
1321 srcw = (sljit_uh)srcw;
1322 break;
1323 case SLJIT_MOV_SH:
1324 flags = HALF_SIZE | SIGNED;
1325 if (src & SLJIT_IMM)
1326 srcw = (sljit_sh)srcw;
1327 break;
1328 case SLJIT_MOVU:
1329 case SLJIT_MOVU_UI:
1330 case SLJIT_MOVU_SI:
1331 case SLJIT_MOVU_P:
1332 flags = WORD_SIZE | UPDATE;
1333 break;
1334 case SLJIT_MOVU_UB:
1335 flags = BYTE_SIZE | UPDATE;
1336 if (src & SLJIT_IMM)
1337 srcw = (sljit_ub)srcw;
1338 break;
1339 case SLJIT_MOVU_SB:
1340 flags = BYTE_SIZE | SIGNED | UPDATE;
1341 if (src & SLJIT_IMM)
1342 srcw = (sljit_sb)srcw;
1343 break;
1344 case SLJIT_MOVU_UH:
1345 flags = HALF_SIZE | UPDATE;
1346 if (src & SLJIT_IMM)
1347 srcw = (sljit_uh)srcw;
1348 break;
1349 case SLJIT_MOVU_SH:
1350 flags = HALF_SIZE | SIGNED | UPDATE;
1351 if (src & SLJIT_IMM)
1352 srcw = (sljit_sh)srcw;
1353 break;
1354 default:
1355 SLJIT_ASSERT_STOP();
1356 flags = 0;
1357 break;
1358 }
1359
1360 if (src & SLJIT_IMM)
1361 FAIL_IF(emit_op_imm(compiler, SLJIT_MOV | ARG2_IMM, dst_r, TMP_REG1, srcw));
1362 else if (src & SLJIT_MEM) {
1363 if (getput_arg_fast(compiler, flags, dst_r, src, srcw))
1364 FAIL_IF(compiler->error);
1365 else
1366 FAIL_IF(getput_arg(compiler, flags, dst_r, src, srcw, dst, dstw));
1367 } else {
1368 if (dst_r != TMP_REG1)
1369 return emit_op_imm(compiler, op, dst_r, TMP_REG1, src);
1370 dst_r = src;
1371 }
1372
1373 if (dst & SLJIT_MEM) {
1374 if (getput_arg_fast(compiler, flags | STORE, dst_r, dst, dstw))
1375 return compiler->error;
1376 else
1377 return getput_arg(compiler, flags | STORE, dst_r, dst, dstw, 0, 0);
1378 }
1379 return SLJIT_SUCCESS;
1380 }
1381
1382 if (op == SLJIT_NEG) {
1383 #if (defined SLJIT_VERBOSE && SLJIT_VERBOSE) \
1384 || (defined SLJIT_ARGUMENT_CHECKS && SLJIT_ARGUMENT_CHECKS)
1385 compiler->skip_checks = 1;
1386 #endif
1387 return sljit_emit_op2(compiler, SLJIT_SUB | op_flags, dst, dstw, SLJIT_IMM, 0, src, srcw);
1388 }
1389
1390 flags = (GET_FLAGS(op_flags) ? SET_FLAGS : 0) | ((op_flags & SLJIT_KEEP_FLAGS) ? KEEP_FLAGS : 0);
1391 if (src & SLJIT_MEM) {
1392 if (getput_arg_fast(compiler, WORD_SIZE, TMP_REG2, src, srcw))
1393 FAIL_IF(compiler->error);
1394 else
1395 FAIL_IF(getput_arg(compiler, WORD_SIZE, TMP_REG2, src, srcw, dst, dstw));
1396 src = TMP_REG2;
1397 }
1398
1399 if (src & SLJIT_IMM)
1400 flags |= ARG2_IMM;
1401 else
1402 srcw = src;
1403
1404 emit_op_imm(compiler, flags | op, dst_r, TMP_REG1, srcw);
1405
1406 if (dst & SLJIT_MEM) {
1407 if (getput_arg_fast(compiler, flags | STORE, dst_r, dst, dstw))
1408 return compiler->error;
1409 else
1410 return getput_arg(compiler, flags | STORE, dst_r, dst, dstw, 0, 0);
1411 }
1412 return SLJIT_SUCCESS;
1413 }
1414
1415 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_op2(struct sljit_compiler *compiler, sljit_si op,
1416 sljit_si dst, sljit_sw dstw,
1417 sljit_si src1, sljit_sw src1w,
1418 sljit_si src2, sljit_sw src2w)
1419 {
1420 sljit_si dst_r, flags;
1421
1422 CHECK_ERROR();
1423 CHECK(check_sljit_emit_op2(compiler, op, dst, dstw, src1, src1w, src2, src2w));
1424 ADJUST_LOCAL_OFFSET(dst, dstw);
1425 ADJUST_LOCAL_OFFSET(src1, src1w);
1426 ADJUST_LOCAL_OFFSET(src2, src2w);
1427
1428 compiler->cache_arg = 0;
1429 compiler->cache_argw = 0;
1430
1431 dst_r = SLOW_IS_REG(dst) ? dst : TMP_REG1;
1432 flags = (GET_FLAGS(op) ? SET_FLAGS : 0) | ((op & SLJIT_KEEP_FLAGS) ? KEEP_FLAGS : 0);
1433
1434 if ((dst & SLJIT_MEM) && !getput_arg_fast(compiler, WORD_SIZE | STORE | ARG_TEST, TMP_REG1, dst, dstw))
1435 flags |= SLOW_DEST;
1436
1437 if (src1 & SLJIT_MEM) {
1438 if (getput_arg_fast(compiler, WORD_SIZE, TMP_REG1, src1, src1w))
1439 FAIL_IF(compiler->error);
1440 else
1441 flags |= SLOW_SRC1;
1442 }
1443 if (src2 & SLJIT_MEM) {
1444 if (getput_arg_fast(compiler, WORD_SIZE, TMP_REG2, src2, src2w))
1445 FAIL_IF(compiler->error);
1446 else
1447 flags |= SLOW_SRC2;
1448 }
1449
1450 if ((flags & (SLOW_SRC1 | SLOW_SRC2)) == (SLOW_SRC1 | SLOW_SRC2)) {
1451 if (!can_cache(src1, src1w, src2, src2w) && can_cache(src1, src1w, dst, dstw)) {
1452 FAIL_IF(getput_arg(compiler, WORD_SIZE, TMP_REG2, src2, src2w, src1, src1w));
1453 FAIL_IF(getput_arg(compiler, WORD_SIZE, TMP_REG1, src1, src1w, dst, dstw));
1454 }
1455 else {
1456 FAIL_IF(getput_arg(compiler, WORD_SIZE, TMP_REG1, src1, src1w, src2, src2w));
1457 FAIL_IF(getput_arg(compiler, WORD_SIZE, TMP_REG2, src2, src2w, dst, dstw));
1458 }
1459 }
1460 else if (flags & SLOW_SRC1)
1461 FAIL_IF(getput_arg(compiler, WORD_SIZE, TMP_REG1, src1, src1w, dst, dstw));
1462 else if (flags & SLOW_SRC2)
1463 FAIL_IF(getput_arg(compiler, WORD_SIZE, TMP_REG2, src2, src2w, dst, dstw));
1464
1465 if (src1 & SLJIT_MEM)
1466 src1 = TMP_REG1;
1467 if (src2 & SLJIT_MEM)
1468 src2 = TMP_REG2;
1469
1470 if (src1 & SLJIT_IMM)
1471 flags |= ARG1_IMM;
1472 else
1473 src1w = src1;
1474 if (src2 & SLJIT_IMM)
1475 flags |= ARG2_IMM;
1476 else
1477 src2w = src2;
1478
1479 if (dst == SLJIT_UNUSED)
1480 flags |= UNUSED_RETURN;
1481
1482 emit_op_imm(compiler, flags | GET_OPCODE(op), dst_r, src1w, src2w);
1483
1484 if (dst & SLJIT_MEM) {
1485 if (!(flags & SLOW_DEST)) {
1486 getput_arg_fast(compiler, WORD_SIZE | STORE, dst_r, dst, dstw);
1487 return compiler->error;
1488 }
1489 return getput_arg(compiler, WORD_SIZE | STORE, TMP_REG1, dst, dstw, 0, 0);
1490 }
1491 return SLJIT_SUCCESS;
1492 }
1493
1494 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_get_register_index(sljit_si reg)
1495 {
1496 CHECK_REG_INDEX(check_sljit_get_register_index(reg));
1497 return reg_map[reg];
1498 }
1499
1500 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_get_float_register_index(sljit_si reg)
1501 {
1502 CHECK_REG_INDEX(check_sljit_get_float_register_index(reg));
1503 return reg << 1;
1504 }
1505
1506 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_op_custom(struct sljit_compiler *compiler,
1507 void *instruction, sljit_si size)
1508 {
1509 CHECK_ERROR();
1510 CHECK(check_sljit_emit_op_custom(compiler, instruction, size));
1511
1512 if (size == 2)
1513 return push_inst16(compiler, *(sljit_uh*)instruction);
1514 return push_inst32(compiler, *(sljit_ins*)instruction);
1515 }
1516
1517 /* --------------------------------------------------------------------- */
1518 /* Floating point operators */
1519 /* --------------------------------------------------------------------- */
1520
1521 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_is_fpu_available(void)
1522 {
1523 #ifdef SLJIT_IS_FPU_AVAILABLE
1524 return SLJIT_IS_FPU_AVAILABLE;
1525 #else
1526 /* Available by default. */
1527 return 1;
1528 #endif
1529 }
1530
1531 #define FPU_LOAD (1 << 20)
1532
1533 static sljit_si emit_fop_mem(struct sljit_compiler *compiler, sljit_si flags, sljit_si reg, sljit_si arg, sljit_sw argw)
1534 {
1535 sljit_sw tmp;
1536 sljit_uw imm;
1537 sljit_sw inst = VSTR_F32 | (flags & (SLJIT_SINGLE_OP | FPU_LOAD));
1538
1539 SLJIT_ASSERT(arg & SLJIT_MEM);
1540
1541 /* Fast loads and stores. */
1542 if (SLJIT_UNLIKELY(arg & OFFS_REG_MASK)) {
1543 FAIL_IF(push_inst32(compiler, ADD_W | RD4(TMP_REG2) | RN4(arg & REG_MASK) | RM4(OFFS_REG(arg)) | ((argw & 0x3) << 6)));
1544 arg = SLJIT_MEM | TMP_REG2;
1545 argw = 0;
1546 }
1547
1548 if ((arg & REG_MASK) && (argw & 0x3) == 0) {
1549 if (!(argw & ~0x3fc))
1550 return push_inst32(compiler, inst | 0x800000 | RN4(arg & REG_MASK) | DD4(reg) | (argw >> 2));
1551 if (!(-argw & ~0x3fc))
1552 return push_inst32(compiler, inst | RN4(arg & REG_MASK) | DD4(reg) | (-argw >> 2));
1553 }
1554
1555 /* Slow cases */
1556 SLJIT_ASSERT(!(arg & OFFS_REG_MASK));
1557 if (compiler->cache_arg == arg) {
1558 tmp = argw - compiler->cache_argw;
1559 if (!(tmp & ~0x3fc))
1560 return push_inst32(compiler, inst | 0x800000 | RN4(TMP_REG3) | DD4(reg) | (tmp >> 2));
1561 if (!(-tmp & ~0x3fc))
1562 return push_inst32(compiler, inst | RN4(TMP_REG3) | DD4(reg) | (-tmp >> 2));
1563 if (emit_set_delta(compiler, TMP_REG3, TMP_REG3, tmp) != SLJIT_ERR_UNSUPPORTED) {
1564 FAIL_IF(compiler->error);
1565 compiler->cache_argw = argw;
1566 return push_inst32(compiler, inst | 0x800000 | RN4(TMP_REG3) | DD4(reg));
1567 }
1568 }
1569
1570 if (arg & REG_MASK) {
1571 if (emit_set_delta(compiler, TMP_REG1, arg & REG_MASK, argw) != SLJIT_ERR_UNSUPPORTED) {
1572 FAIL_IF(compiler->error);
1573 return push_inst32(compiler, inst | 0x800000 | RN4(TMP_REG1) | DD4(reg));
1574 }
1575 imm = get_imm(argw & ~0x3fc);
1576 if (imm != INVALID_IMM) {
1577 FAIL_IF(push_inst32(compiler, ADD_WI | RD4(TMP_REG1) | RN4(arg & REG_MASK) | imm));
1578 return push_inst32(compiler, inst | 0x800000 | RN4(TMP_REG1) | DD4(reg) | ((argw & 0x3fc) >> 2));
1579 }
1580 imm = get_imm(-argw & ~0x3fc);
1581 if (imm != INVALID_IMM) {
1582 argw = -argw;
1583 FAIL_IF(push_inst32(compiler, SUB_WI | RD4(TMP_REG1) | RN4(arg & REG_MASK) | imm));
1584 return push_inst32(compiler, inst | RN4(TMP_REG1) | DD4(reg) | ((argw & 0x3fc) >> 2));
1585 }
1586 }
1587
1588 compiler->cache_arg = arg;
1589 compiler->cache_argw = argw;
1590
1591 FAIL_IF(load_immediate(compiler, TMP_REG3, argw));
1592 if (arg & REG_MASK)
1593 FAIL_IF(push_inst16(compiler, ADD | SET_REGS44(TMP_REG3, (arg & REG_MASK))));
1594 return push_inst32(compiler, inst | 0x800000 | RN4(TMP_REG3) | DD4(reg));
1595 }
1596
1597 static SLJIT_INLINE sljit_si sljit_emit_fop1_convw_fromd(struct sljit_compiler *compiler, sljit_si op,
1598 sljit_si dst, sljit_sw dstw,
1599 sljit_si src, sljit_sw srcw)
1600 {
1601 if (src & SLJIT_MEM) {
1602 FAIL_IF(emit_fop_mem(compiler, (op & SLJIT_SINGLE_OP) | FPU_LOAD, TMP_FREG1, src, srcw));
1603 src = TMP_FREG1;
1604 }
1605
1606 FAIL_IF(push_inst32(compiler, VCVT_S32_F32 | (op & SLJIT_SINGLE_OP) | DD4(TMP_FREG1) | DM4(src)));
1607
1608 if (dst == SLJIT_UNUSED)
1609 return SLJIT_SUCCESS;
1610
1611 if (FAST_IS_REG(dst))
1612 return push_inst32(compiler, VMOV | (1 << 20) | RT4(dst) | DN4(TMP_FREG1));
1613
1614 /* Store the integer value from a VFP register. */
1615 return emit_fop_mem(compiler, 0, TMP_FREG1, dst, dstw);
1616 }
1617
1618 static SLJIT_INLINE sljit_si sljit_emit_fop1_convd_fromw(struct sljit_compiler *compiler, sljit_si op,
1619 sljit_si dst, sljit_sw dstw,
1620 sljit_si src, sljit_sw srcw)
1621 {
1622 sljit_si dst_r = FAST_IS_REG(dst) ? dst : TMP_FREG1;
1623
1624 if (FAST_IS_REG(src))
1625 FAIL_IF(push_inst32(compiler, VMOV | RT4(src) | DN4(TMP_FREG1)));
1626 else if (src & SLJIT_MEM) {
1627 /* Load the integer value into a VFP register. */
1628 FAIL_IF(emit_fop_mem(compiler, FPU_LOAD, TMP_FREG1, src, srcw));
1629 }
1630 else {
1631 FAIL_IF(load_immediate(compiler, TMP_REG1, srcw));
1632 FAIL_IF(push_inst32(compiler, VMOV | RT4(TMP_REG1) | DN4(TMP_FREG1)));
1633 }
1634
1635 FAIL_IF(push_inst32(compiler, VCVT_F32_S32 | (op & SLJIT_SINGLE_OP) | DD4(dst_r) | DM4(TMP_FREG1)));
1636
1637 if (dst & SLJIT_MEM)
1638 return emit_fop_mem(compiler, (op & SLJIT_SINGLE_OP), TMP_FREG1, dst, dstw);
1639 return SLJIT_SUCCESS;
1640 }
1641
1642 static SLJIT_INLINE sljit_si sljit_emit_fop1_cmp(struct sljit_compiler *compiler, sljit_si op,
1643 sljit_si src1, sljit_sw src1w,
1644 sljit_si src2, sljit_sw src2w)
1645 {
1646 if (src1 & SLJIT_MEM) {
1647 emit_fop_mem(compiler, (op & SLJIT_SINGLE_OP) | FPU_LOAD, TMP_FREG1, src1, src1w);
1648 src1 = TMP_FREG1;
1649 }
1650
1651 if (src2 & SLJIT_MEM) {
1652 emit_fop_mem(compiler, (op & SLJIT_SINGLE_OP) | FPU_LOAD, TMP_FREG2, src2, src2w);
1653 src2 = TMP_FREG2;
1654 }
1655
1656 FAIL_IF(push_inst32(compiler, VCMP_F32 | (op & SLJIT_SINGLE_OP) | DD4(src1) | DM4(src2)));
1657 return push_inst32(compiler, VMRS);
1658 }
1659
1660 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_fop1(struct sljit_compiler *compiler, sljit_si op,
1661 sljit_si dst, sljit_sw dstw,
1662 sljit_si src, sljit_sw srcw)
1663 {
1664 sljit_si dst_r;
1665
1666 CHECK_ERROR();
1667 compiler->cache_arg = 0;
1668 compiler->cache_argw = 0;
1669 if (GET_OPCODE(op) != SLJIT_CONVD_FROMS)
1670 op ^= SLJIT_SINGLE_OP;
1671
1672 SLJIT_COMPILE_ASSERT((SLJIT_SINGLE_OP == 0x100), float_transfer_bit_error);
1673 SELECT_FOP1_OPERATION_WITH_CHECKS(compiler, op, dst, dstw, src, srcw);
1674
1675 dst_r = FAST_IS_REG(dst) ? dst : TMP_FREG1;
1676
1677 if (src & SLJIT_MEM) {
1678 emit_fop_mem(compiler, (op & SLJIT_SINGLE_OP) | FPU_LOAD, dst_r, src, srcw);
1679 src = dst_r;
1680 }
1681
1682 switch (GET_OPCODE(op)) {
1683 case SLJIT_DMOV:
1684 if (src != dst_r) {
1685 if (dst_r != TMP_FREG1)
1686 FAIL_IF(push_inst32(compiler, VMOV_F32 | (op & SLJIT_SINGLE_OP) | DD4(dst_r) | DM4(src)));
1687 else
1688 dst_r = src;
1689 }
1690 break;
1691 case SLJIT_DNEG:
1692 FAIL_IF(push_inst32(compiler, VNEG_F32 | (op & SLJIT_SINGLE_OP) | DD4(dst_r) | DM4(src)));
1693 break;
1694 case SLJIT_DABS:
1695 FAIL_IF(push_inst32(compiler, VABS_F32 | (op & SLJIT_SINGLE_OP) | DD4(dst_r) | DM4(src)));
1696 break;
1697 case SLJIT_CONVD_FROMS:
1698 FAIL_IF(push_inst32(compiler, VCVT_F64_F32 | (op & SLJIT_SINGLE_OP) | DD4(dst_r) | DM4(src)));
1699 op ^= SLJIT_SINGLE_OP;
1700 break;
1701 }
1702
1703 if (dst & SLJIT_MEM)
1704 return emit_fop_mem(compiler, (op & SLJIT_SINGLE_OP), dst_r, dst, dstw);
1705 return SLJIT_SUCCESS;
1706 }
1707
1708 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_fop2(struct sljit_compiler *compiler, sljit_si op,
1709 sljit_si dst, sljit_sw dstw,
1710 sljit_si src1, sljit_sw src1w,
1711 sljit_si src2, sljit_sw src2w)
1712 {
1713 sljit_si dst_r;
1714
1715 CHECK_ERROR();
1716 CHECK(check_sljit_emit_fop2(compiler, op, dst, dstw, src1, src1w, src2, src2w));
1717 ADJUST_LOCAL_OFFSET(dst, dstw);
1718 ADJUST_LOCAL_OFFSET(src1, src1w);
1719 ADJUST_LOCAL_OFFSET(src2, src2w);
1720
1721 compiler->cache_arg = 0;
1722 compiler->cache_argw = 0;
1723 op ^= SLJIT_SINGLE_OP;
1724
1725 dst_r = FAST_IS_REG(dst) ? dst : TMP_FREG1;
1726 if (src1 & SLJIT_MEM) {
1727 emit_fop_mem(compiler, (op & SLJIT_SINGLE_OP) | FPU_LOAD, TMP_FREG1, src1, src1w);
1728 src1 = TMP_FREG1;
1729 }
1730 if (src2 & SLJIT_MEM) {
1731 emit_fop_mem(compiler, (op & SLJIT_SINGLE_OP) | FPU_LOAD, TMP_FREG2, src2, src2w);
1732 src2 = TMP_FREG2;
1733 }
1734
1735 switch (GET_OPCODE(op)) {
1736 case SLJIT_DADD:
1737 FAIL_IF(push_inst32(compiler, VADD_F32 | (op & SLJIT_SINGLE_OP) | DD4(dst_r) | DN4(src1) | DM4(src2)));
1738 break;
1739 case SLJIT_DSUB:
1740 FAIL_IF(push_inst32(compiler, VSUB_F32 | (op & SLJIT_SINGLE_OP) | DD4(dst_r) | DN4(src1) | DM4(src2)));
1741 break;
1742 case SLJIT_DMUL:
1743 FAIL_IF(push_inst32(compiler, VMUL_F32 | (op & SLJIT_SINGLE_OP) | DD4(dst_r) | DN4(src1) | DM4(src2)));
1744 break;
1745 case SLJIT_DDIV:
1746 FAIL_IF(push_inst32(compiler, VDIV_F32 | (op & SLJIT_SINGLE_OP) | DD4(dst_r) | DN4(src1) | DM4(src2)));
1747 break;
1748 }
1749
1750 if (!(dst & SLJIT_MEM))
1751 return SLJIT_SUCCESS;
1752 return emit_fop_mem(compiler, (op & SLJIT_SINGLE_OP), TMP_FREG1, dst, dstw);
1753 }
1754
1755 #undef FPU_LOAD
1756
1757 /* --------------------------------------------------------------------- */
1758 /* Other instructions */
1759 /* --------------------------------------------------------------------- */
1760
1761 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_fast_enter(struct sljit_compiler *compiler, sljit_si dst, sljit_sw dstw)
1762 {
1763 CHECK_ERROR();
1764 CHECK(check_sljit_emit_fast_enter(compiler, dst, dstw));
1765 ADJUST_LOCAL_OFFSET(dst, dstw);
1766
1767 /* For UNUSED dst. Uncommon, but possible. */
1768 if (dst == SLJIT_UNUSED)
1769 return SLJIT_SUCCESS;
1770
1771 if (FAST_IS_REG(dst))
1772 return push_inst16(compiler, MOV | SET_REGS44(dst, TMP_REG3));
1773
1774 /* Memory. */
1775 if (getput_arg_fast(compiler, WORD_SIZE | STORE, TMP_REG3, dst, dstw))
1776 return compiler->error;
1777 /* TMP_REG3 is used for caching. */
1778 FAIL_IF(push_inst16(compiler, MOV | SET_REGS44(TMP_REG2, TMP_REG3)));
1779 compiler->cache_arg = 0;
1780 compiler->cache_argw = 0;
1781 return getput_arg(compiler, WORD_SIZE | STORE, TMP_REG2, dst, dstw, 0, 0);
1782 }
1783
1784 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_fast_return(struct sljit_compiler *compiler, sljit_si src, sljit_sw srcw)
1785 {
1786 CHECK_ERROR();
1787 CHECK(check_sljit_emit_fast_return(compiler, src, srcw));
1788 ADJUST_LOCAL_OFFSET(src, srcw);
1789
1790 if (FAST_IS_REG(src))
1791 FAIL_IF(push_inst16(compiler, MOV | SET_REGS44(TMP_REG3, src)));
1792 else if (src & SLJIT_MEM) {
1793 if (getput_arg_fast(compiler, WORD_SIZE, TMP_REG3, src, srcw))
1794 FAIL_IF(compiler->error);
1795 else {
1796 compiler->cache_arg = 0;
1797 compiler->cache_argw = 0;
1798 FAIL_IF(getput_arg(compiler, WORD_SIZE, TMP_REG2, src, srcw, 0, 0));
1799 FAIL_IF(push_inst16(compiler, MOV | SET_REGS44(TMP_REG3, TMP_REG2)));
1800 }
1801 }
1802 else if (src & SLJIT_IMM)
1803 FAIL_IF(load_immediate(compiler, TMP_REG3, srcw));
1804 return push_inst16(compiler, BLX | RN3(TMP_REG3));
1805 }
1806
1807 /* --------------------------------------------------------------------- */
1808 /* Conditional instructions */
1809 /* --------------------------------------------------------------------- */
1810
1811 static sljit_uw get_cc(sljit_si type)
1812 {
1813 switch (type) {
1814 case SLJIT_EQUAL:
1815 case SLJIT_MUL_NOT_OVERFLOW:
1816 case SLJIT_D_EQUAL:
1817 return 0x0;
1818
1819 case SLJIT_NOT_EQUAL:
1820 case SLJIT_MUL_OVERFLOW:
1821 case SLJIT_D_NOT_EQUAL:
1822 return 0x1;
1823
1824 case SLJIT_LESS:
1825 case SLJIT_D_LESS:
1826 return 0x3;
1827
1828 case SLJIT_GREATER_EQUAL:
1829 case SLJIT_D_GREATER_EQUAL:
1830 return 0x2;
1831
1832 case SLJIT_GREATER:
1833 case SLJIT_D_GREATER:
1834 return 0x8;
1835
1836 case SLJIT_LESS_EQUAL:
1837 case SLJIT_D_LESS_EQUAL:
1838 return 0x9;
1839
1840 case SLJIT_SIG_LESS:
1841 return 0xb;
1842
1843 case SLJIT_SIG_GREATER_EQUAL:
1844 return 0xa;
1845
1846 case SLJIT_SIG_GREATER:
1847 return 0xc;
1848
1849 case SLJIT_SIG_LESS_EQUAL:
1850 return 0xd;
1851
1852 case SLJIT_OVERFLOW:
1853 case SLJIT_D_UNORDERED:
1854 return 0x6;
1855
1856 case SLJIT_NOT_OVERFLOW:
1857 case SLJIT_D_ORDERED:
1858 return 0x7;
1859
1860 default: /* SLJIT_JUMP */
1861 SLJIT_ASSERT_STOP();
1862 return 0xe;
1863 }
1864 }
1865
1866 SLJIT_API_FUNC_ATTRIBUTE struct sljit_label* sljit_emit_label(struct sljit_compiler *compiler)
1867 {
1868 struct sljit_label *label;
1869
1870 CHECK_ERROR_PTR();
1871 CHECK_PTR(check_sljit_emit_label(compiler));
1872
1873 if (compiler->last_label && compiler->last_label->size == compiler->size)
1874 return compiler->last_label;
1875
1876 label = (struct sljit_label*)ensure_abuf(compiler, sizeof(struct sljit_label));
1877 PTR_FAIL_IF(!label);
1878 set_label(label, compiler);
1879 return label;
1880 }
1881
1882 SLJIT_API_FUNC_ATTRIBUTE struct sljit_jump* sljit_emit_jump(struct sljit_compiler *compiler, sljit_si type)
1883 {
1884 struct sljit_jump *jump;
1885 sljit_ins cc;
1886
1887 CHECK_ERROR_PTR();
1888 CHECK_PTR(check_sljit_emit_jump(compiler, type));
1889
1890 jump = (struct sljit_jump*)ensure_abuf(compiler, sizeof(struct sljit_jump));
1891 PTR_FAIL_IF(!jump);
1892 set_jump(jump, compiler, type & SLJIT_REWRITABLE_JUMP);
1893 type &= 0xff;
1894
1895 /* In ARM, we don't need to touch the arguments. */
1896 PTR_FAIL_IF(emit_imm32_const(compiler, TMP_REG1, 0));
1897 if (type < SLJIT_JUMP) {
1898 jump->flags |= IS_COND;
1899 cc = get_cc(type);
1900 jump->flags |= cc << 8;
1901 PTR_FAIL_IF(push_inst16(compiler, IT | (cc << 4) | 0x8));
1902 }
1903
1904 jump->addr = compiler->size;
1905 if (type <= SLJIT_JUMP)
1906 PTR_FAIL_IF(push_inst16(compiler, BX | RN3(TMP_REG1)));
1907 else {
1908 jump->flags |= IS_BL;
1909 PTR_FAIL_IF(push_inst16(compiler, BLX | RN3(TMP_REG1)));
1910 }
1911
1912 return jump;
1913 }
1914
1915 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_ijump(struct sljit_compiler *compiler, sljit_si type, sljit_si src, sljit_sw srcw)
1916 {
1917 struct sljit_jump *jump;
1918
1919 CHECK_ERROR();
1920 CHECK(check_sljit_emit_ijump(compiler, type, src, srcw));
1921 ADJUST_LOCAL_OFFSET(src, srcw);
1922
1923 /* In ARM, we don't need to touch the arguments. */
1924 if (!(src & SLJIT_IMM)) {
1925 if (FAST_IS_REG(src))
1926 return push_inst16(compiler, (type <= SLJIT_JUMP ? BX : BLX) | RN3(src));
1927
1928 FAIL_IF(emit_op_mem(compiler, WORD_SIZE, type <= SLJIT_JUMP ? TMP_PC : TMP_REG1, src, srcw));
1929 if (type >= SLJIT_FAST_CALL)
1930 return push_inst16(compiler, BLX | RN3(TMP_REG1));
1931 }
1932
1933 jump = (struct sljit_jump*)ensure_abuf(compiler, sizeof(struct sljit_jump));
1934 FAIL_IF(!jump);
1935 set_jump(jump, compiler, JUMP_ADDR | ((type >= SLJIT_FAST_CALL) ? IS_BL : 0));
1936 jump->u.target = srcw;
1937
1938 FAIL_IF(emit_imm32_const(compiler, TMP_REG1, 0));
1939 jump->addr = compiler->size;
1940 return push_inst16(compiler, (type <= SLJIT_JUMP ? BX : BLX) | RN3(TMP_REG1));
1941 }
1942
1943 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_op_flags(struct sljit_compiler *compiler, sljit_si op,
1944 sljit_si dst, sljit_sw dstw,
1945 sljit_si src, sljit_sw srcw,
1946 sljit_si type)
1947 {
1948 sljit_si dst_r, flags = GET_ALL_FLAGS(op);
1949 sljit_ins cc, ins;
1950
1951 CHECK_ERROR();
1952 CHECK(check_sljit_emit_op_flags(compiler, op, dst, dstw, src, srcw, type));
1953 ADJUST_LOCAL_OFFSET(dst, dstw);
1954 ADJUST_LOCAL_OFFSET(src, srcw);
1955
1956 if (dst == SLJIT_UNUSED)
1957 return SLJIT_SUCCESS;
1958
1959 op = GET_OPCODE(op);
1960 cc = get_cc(type & 0xff);
1961 dst_r = FAST_IS_REG(dst) ? dst : TMP_REG2;
1962
1963 if (op < SLJIT_ADD) {
1964 FAIL_IF(push_inst16(compiler, IT | (cc << 4) | (((cc & 0x1) ^ 0x1) << 3) | 0x4));
1965 if (reg_map[dst_r] > 7) {
1966 FAIL_IF(push_inst32(compiler, MOV_WI | RD4(dst_r) | 1));
1967 FAIL_IF(push_inst32(compiler, MOV_WI | RD4(dst_r) | 0));
1968 } else {
1969 FAIL_IF(push_inst16(compiler, MOVSI | RDN3(dst_r) | 1));
1970 FAIL_IF(push_inst16(compiler, MOVSI | RDN3(dst_r) | 0));
1971 }
1972 if (dst_r != TMP_REG2)
1973 return SLJIT_SUCCESS;
1974 return emit_op_mem(compiler, WORD_SIZE | STORE, TMP_REG2, dst, dstw);
1975 }
1976
1977 ins = (op == SLJIT_AND ? ANDI : (op == SLJIT_OR ? ORRI : EORI));
1978 if ((op == SLJIT_OR || op == SLJIT_XOR) && FAST_IS_REG(dst) && dst == src) {
1979 /* Does not change the other bits. */
1980 FAIL_IF(push_inst16(compiler, IT | (cc << 4) | 0x8));
1981 FAIL_IF(push_inst32(compiler, ins | RN4(src) | RD4(dst) | 1));
1982 if (flags & SLJIT_SET_E) {
1983 /* The condition must always be set, even if the ORRI/EORI is not executed above. */
1984 if (reg_map[dst] <= 7)
1985 return push_inst16(compiler, MOVS | RD3(TMP_REG1) | RN3(dst));
1986 return push_inst32(compiler, MOV_W | SET_FLAGS | RD4(TMP_REG1) | RM4(dst));
1987 }
1988 return SLJIT_SUCCESS;
1989 }
1990
1991 compiler->cache_arg = 0;
1992 compiler->cache_argw = 0;
1993 if (src & SLJIT_MEM) {
1994 FAIL_IF(emit_op_mem2(compiler, WORD_SIZE, TMP_REG2, src, srcw, dst, dstw));
1995 src = TMP_REG2;
1996 srcw = 0;
1997 } else if (src & SLJIT_IMM) {
1998 FAIL_IF(load_immediate(compiler, TMP_REG2, srcw));
1999 src = TMP_REG2;
2000 srcw = 0;
2001 }
2002
2003 if (op == SLJIT_AND || src != dst_r) {
2004 FAIL_IF(push_inst16(compiler, IT | (cc << 4) | (((cc & 0x1) ^ 0x1) << 3) | 0x4));
2005 FAIL_IF(push_inst32(compiler, ins | RN4(src) | RD4(dst_r) | 1));
2006 FAIL_IF(push_inst32(compiler, ins | RN4(src) | RD4(dst_r) | 0));
2007 }
2008 else {
2009 FAIL_IF(push_inst16(compiler, IT | (cc << 4) | 0x8));
2010 FAIL_IF(push_inst32(compiler, ins | RN4(src) | RD4(dst_r) | 1));
2011 }
2012
2013 if (dst_r == TMP_REG2)
2014 FAIL_IF(emit_op_mem2(compiler, WORD_SIZE | STORE, TMP_REG2, dst, dstw, 0, 0));
2015
2016 if (flags & SLJIT_SET_E) {
2017 /* The condition must always be set, even if the ORR/EORI is not executed above. */
2018 if (reg_map[dst_r] <= 7)
2019 return push_inst16(compiler, MOVS | RD3(TMP_REG1) | RN3(dst_r));
2020 return push_inst32(compiler, MOV_W | SET_FLAGS | RD4(TMP_REG1) | RM4(dst_r));
2021 }
2022 return SLJIT_SUCCESS;
2023 }
2024
2025 SLJIT_API_FUNC_ATTRIBUTE struct sljit_const* sljit_emit_const(struct sljit_compiler *compiler, sljit_si dst, sljit_sw dstw, sljit_sw init_value)
2026 {
2027 struct sljit_const *const_;
2028 sljit_si dst_r;
2029
2030 CHECK_ERROR_PTR();
2031 CHECK_PTR(check_sljit_emit_const(compiler, dst, dstw, init_value));
2032 ADJUST_LOCAL_OFFSET(dst, dstw);
2033
2034 const_ = (struct sljit_const*)ensure_abuf(compiler, sizeof(struct sljit_const));
2035 PTR_FAIL_IF(!const_);
2036 set_const(const_, compiler);
2037
2038 dst_r = SLOW_IS_REG(dst) ? dst : TMP_REG1;
2039 PTR_FAIL_IF(emit_imm32_const(compiler, dst_r, init_value));
2040
2041 if (dst & SLJIT_MEM)
2042 PTR_FAIL_IF(emit_op_mem(compiler, WORD_SIZE | STORE, dst_r, dst, dstw));
2043 return const_;
2044 }
2045
2046 SLJIT_API_FUNC_ATTRIBUTE void sljit_set_jump_addr(sljit_uw addr, sljit_uw new_addr)
2047 {
2048 sljit_uh *inst = (sljit_uh*)addr;
2049 modify_imm32_const(inst, new_addr);
2050 SLJIT_CACHE_FLUSH(inst, inst + 4);
2051 }
2052
2053 SLJIT_API_FUNC_ATTRIBUTE void sljit_set_const(sljit_uw addr, sljit_sw new_constant)
2054 {
2055 sljit_uh *inst = (sljit_uh*)addr;
2056 modify_imm32_const(inst, new_constant);
2057 SLJIT_CACHE_FLUSH(inst, inst + 4);
2058 }

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