/[pcre]/code/trunk/sljit/sljitNativeARM_v5.c
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Contents of /code/trunk/sljit/sljitNativeARM_v5.c

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Revision 662 - (show annotations)
Mon Aug 22 14:35:22 2011 UTC (8 years, 3 months ago) by ph10
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JIT compiler source
1 /*
2 * Stack-less Just-In-Time compiler
3 *
4 * Copyright 2009-2010 Zoltan Herczeg (hzmester@freemail.hu). All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without modification, are
7 * permitted provided that the following conditions are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright notice, this list of
10 * conditions and the following disclaimer.
11 *
12 * 2. Redistributions in binary form must reproduce the above copyright notice, this list
13 * of conditions and the following disclaimer in the documentation and/or other materials
14 * provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER(S) AND CONTRIBUTORS ``AS IS'' AND ANY
17 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
19 * SHALL THE COPYRIGHT HOLDER(S) OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
21 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
22 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
24 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 */
26
27 SLJIT_CONST char* sljit_get_platform_name()
28 {
29 #if (defined SLJIT_CONFIG_ARM_V7 && SLJIT_CONFIG_ARM_V7)
30 return "arm-v7";
31 #elif (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
32 return "arm-v5";
33 #else
34 #error "Internal error: Unknown ARM architecture"
35 #endif
36 }
37
38 /* Last register + 1. */
39 #define TMP_REG1 (SLJIT_NO_REGISTERS + 1)
40 #define TMP_REG2 (SLJIT_NO_REGISTERS + 2)
41 #define TMP_REG3 (SLJIT_NO_REGISTERS + 3)
42 #define TMP_PC (SLJIT_NO_REGISTERS + 4)
43
44 #define TMP_FREG1 (SLJIT_FLOAT_REG4 + 1)
45 #define TMP_FREG2 (SLJIT_FLOAT_REG4 + 2)
46
47 /* In ARM instruction words.
48 Cache lines are usually 32 byte aligned. */
49 #define CONST_POOL_ALIGNMENT 8
50 #define CONST_POOL_EMPTY 0xffffffff
51
52 #define ALIGN_INSTRUCTION(ptr) \
53 (sljit_uw*)(((sljit_uw)(ptr) + (CONST_POOL_ALIGNMENT * sizeof(sljit_uw)) - 1) & ~((CONST_POOL_ALIGNMENT * sizeof(sljit_uw)) - 1))
54 #define MAX_DIFFERENCE(max_diff) \
55 (((max_diff) / (int)sizeof(sljit_uw)) - (CONST_POOL_ALIGNMENT - 1))
56
57 /* See sljit_emit_enter if you want to change them. */
58 static SLJIT_CONST sljit_ub reg_map[SLJIT_NO_REGISTERS + 5] = {
59 0, 0, 1, 2, 10, 11, 4, 5, 6, 7, 8, 13, 3, 12, 14, 15
60 };
61
62 #define RM(rm) (reg_map[rm])
63 #define RD(rd) (reg_map[rd] << 12)
64 #define RN(rn) (reg_map[rn] << 16)
65
66 /* --------------------------------------------------------------------- */
67 /* Instrucion forms */
68 /* --------------------------------------------------------------------- */
69
70 /* The instruction includes the AL condition.
71 INST_NAME - CONDITIONAL remove this flag. */
72 #define COND_MASK 0xf0000000
73 #define CONDITIONAL 0xe0000000
74 #define PUSH_POOL 0xff000000
75
76 /* DP - Data Processing instruction (use with EMIT_DATA_PROCESS_INS). */
77 #define ADC_DP 0x5
78 #define ADD_DP 0x4
79 #define AND_DP 0x0
80 #define B 0xea000000
81 #define BIC_DP 0xe
82 #define BL 0xeb000000
83 #define BLX 0xe12fff30
84 #define BX 0xe12fff10
85 #define CLZ 0xe16f0f10
86 #define CMP_DP 0xa
87 #define DEBUGGER 0xe1200070
88 #define EOR_DP 0x1
89 #define MOV_DP 0xd
90 #define MUL 0xe0000090
91 #define MVN_DP 0xf
92 #define NOP 0xe1a00000
93 #define ORR_DP 0xc
94 #define PUSH 0xe92d0000
95 #define POP 0xe8bd0000
96 #define RSB_DP 0x3
97 #define RSC_DP 0x7
98 #define SBC_DP 0x6
99 #define SMULL 0xe0c00090
100 #define SUB_DP 0x2
101 #define VABS_F64 0xeeb00bc0
102 #define VADD_F64 0xee300b00
103 #define VCMP_F64 0xeeb40b40
104 #define VDIV_F64 0xee800b00
105 #define VMOV_F64 0xeeb00b40
106 #define VMRS 0xeef1fa10
107 #define VMUL_F64 0xee200b00
108 #define VNEG_F64 0xeeb10b40
109 #define VSTR 0xed000b00
110 #define VSUB_F64 0xee300b40
111
112 #if (defined SLJIT_CONFIG_ARM_V7 && SLJIT_CONFIG_ARM_V7)
113 /* Arm v7 specific instructions. */
114 #define MOVW 0xe3000000
115 #define MOVT 0xe3400000
116 #define SXTB 0xe6af0070
117 #define SXTH 0xe6bf0070
118 #define UXTB 0xe6ef0070
119 #define UXTH 0xe6ff0070
120 #endif
121
122 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
123
124 static int push_cpool(struct sljit_compiler *compiler)
125 {
126 /* Pushing the constant pool into the instruction stream. */
127 sljit_uw* inst;
128 sljit_uw* cpool_ptr;
129 sljit_uw* cpool_end;
130 int i;
131
132 /* The label could point the address after the constant pool. */
133 if (compiler->last_label && compiler->last_label->size == compiler->size)
134 compiler->last_label->size += compiler->cpool_fill + (CONST_POOL_ALIGNMENT - 1) + 1;
135
136 SLJIT_ASSERT(compiler->cpool_fill > 0 && compiler->cpool_fill <= CPOOL_SIZE);
137 inst = (sljit_uw*)ensure_buf(compiler, sizeof(sljit_uw));
138 FAIL_IF(!inst);
139 compiler->size++;
140 *inst = 0xff000000 | compiler->cpool_fill;
141
142 for (i = 0; i < CONST_POOL_ALIGNMENT - 1; i++) {
143 inst = (sljit_uw*)ensure_buf(compiler, sizeof(sljit_uw));
144 FAIL_IF(!inst);
145 compiler->size++;
146 *inst = 0;
147 }
148
149 cpool_ptr = compiler->cpool;
150 cpool_end = cpool_ptr + compiler->cpool_fill;
151 while (cpool_ptr < cpool_end) {
152 inst = (sljit_uw*)ensure_buf(compiler, sizeof(sljit_uw));
153 FAIL_IF(!inst);
154 compiler->size++;
155 *inst = *cpool_ptr++;
156 }
157 compiler->cpool_diff = CONST_POOL_EMPTY;
158 compiler->cpool_fill = 0;
159 return SLJIT_SUCCESS;
160 }
161
162 static int push_inst(struct sljit_compiler *compiler, sljit_uw inst)
163 {
164 sljit_uw* ptr;
165
166 if (SLJIT_UNLIKELY(compiler->cpool_diff != CONST_POOL_EMPTY && compiler->size - compiler->cpool_diff >= MAX_DIFFERENCE(4092)))
167 FAIL_IF(push_cpool(compiler));
168
169 ptr = (sljit_uw*)ensure_buf(compiler, sizeof(sljit_uw));
170 FAIL_IF(!ptr);
171 compiler->size++;
172 *ptr = inst;
173 return SLJIT_SUCCESS;
174 }
175
176 static int push_inst_with_literal(struct sljit_compiler *compiler, sljit_uw inst, sljit_uw literal)
177 {
178 sljit_uw* ptr;
179 sljit_uw cpool_index = CPOOL_SIZE;
180 sljit_uw* cpool_ptr;
181 sljit_uw* cpool_end;
182 sljit_ub* cpool_unique_ptr;
183
184 if (SLJIT_UNLIKELY(compiler->cpool_diff != CONST_POOL_EMPTY && compiler->size - compiler->cpool_diff >= MAX_DIFFERENCE(4092)))
185 FAIL_IF(push_cpool(compiler));
186 else if (compiler->cpool_fill > 0) {
187 cpool_ptr = compiler->cpool;
188 cpool_end = cpool_ptr + compiler->cpool_fill;
189 cpool_unique_ptr = compiler->cpool_unique;
190 do {
191 if ((*cpool_ptr == literal) && !(*cpool_unique_ptr)) {
192 cpool_index = cpool_ptr - compiler->cpool;
193 break;
194 }
195 cpool_ptr++;
196 cpool_unique_ptr++;
197 } while (cpool_ptr < cpool_end);
198 }
199
200 if (cpool_index == CPOOL_SIZE) {
201 /* Must allocate a new entry in the literal pool. */
202 if (compiler->cpool_fill < CPOOL_SIZE) {
203 cpool_index = compiler->cpool_fill;
204 compiler->cpool_fill++;
205 }
206 else {
207 FAIL_IF(push_cpool(compiler));
208 cpool_index = 0;
209 compiler->cpool_fill = 1;
210 }
211 }
212
213 SLJIT_ASSERT((inst & 0xfff) == 0);
214 ptr = (sljit_uw*)ensure_buf(compiler, sizeof(sljit_uw));
215 FAIL_IF(!ptr);
216 compiler->size++;
217 *ptr = inst | cpool_index;
218
219 compiler->cpool[cpool_index] = literal;
220 compiler->cpool_unique[cpool_index] = 0;
221 if (compiler->cpool_diff == CONST_POOL_EMPTY)
222 compiler->cpool_diff = compiler->size;
223 return SLJIT_SUCCESS;
224 }
225
226 static int push_inst_with_unique_literal(struct sljit_compiler *compiler, sljit_uw inst, sljit_uw literal)
227 {
228 sljit_uw* ptr;
229 if (SLJIT_UNLIKELY((compiler->cpool_diff != CONST_POOL_EMPTY && compiler->size - compiler->cpool_diff >= MAX_DIFFERENCE(4092)) || compiler->cpool_fill >= CPOOL_SIZE))
230 FAIL_IF(push_cpool(compiler));
231
232 SLJIT_ASSERT(compiler->cpool_fill < CPOOL_SIZE && (inst & 0xfff) == 0);
233 ptr = (sljit_uw*)ensure_buf(compiler, sizeof(sljit_uw));
234 FAIL_IF(!ptr);
235 compiler->size++;
236 *ptr = inst | compiler->cpool_fill;
237
238 compiler->cpool[compiler->cpool_fill] = literal;
239 compiler->cpool_unique[compiler->cpool_fill] = 1;
240 compiler->cpool_fill++;
241 if (compiler->cpool_diff == CONST_POOL_EMPTY)
242 compiler->cpool_diff = compiler->size;
243 return SLJIT_SUCCESS;
244 }
245
246 static SLJIT_INLINE int prepare_blx(struct sljit_compiler *compiler)
247 {
248 /* Place for at least two instruction (doesn't matter whether the first has a literal). */
249 if (SLJIT_UNLIKELY(compiler->cpool_diff != CONST_POOL_EMPTY && compiler->size - compiler->cpool_diff >= MAX_DIFFERENCE(4088)))
250 return push_cpool(compiler);
251 return SLJIT_SUCCESS;
252 }
253
254 static SLJIT_INLINE int emit_blx(struct sljit_compiler *compiler)
255 {
256 /* Must follow tightly the previous instruction (to be able to convert it to bl instruction). */
257 SLJIT_ASSERT(compiler->cpool_diff == CONST_POOL_EMPTY || compiler->size - compiler->cpool_diff < MAX_DIFFERENCE(4092));
258 return push_inst(compiler, BLX | RM(TMP_REG1));
259 }
260
261 static sljit_uw patch_pc_relative_loads(sljit_uw *last_pc_patch, sljit_uw *code_ptr, sljit_uw* const_pool, sljit_uw cpool_size)
262 {
263 sljit_uw diff;
264 sljit_uw ind;
265 sljit_uw counter = 0;
266 sljit_uw* clear_const_pool = const_pool;
267 sljit_uw* clear_const_pool_end = const_pool + cpool_size;
268
269 SLJIT_ASSERT(const_pool - code_ptr <= CONST_POOL_ALIGNMENT);
270 /* Set unused flag for all literals in the constant pool.
271 I.e.: unused literals can belong to branches, which can be encoded as B or BL.
272 We can "compress" the constant pool by discarding these literals. */
273 while (clear_const_pool < clear_const_pool_end)
274 *clear_const_pool++ = (sljit_uw)(-1);
275
276 while (last_pc_patch < code_ptr) {
277 /* Data transfer instruction with Rn == r15. */
278 if ((*last_pc_patch & 0x0c0f0000) == 0x040f0000) {
279 diff = const_pool - last_pc_patch;
280 ind = (*last_pc_patch) & 0xfff;
281
282 /* Must be a load instruction with immediate offset. */
283 SLJIT_ASSERT(ind < cpool_size && !(*last_pc_patch & (1 << 25)) && (*last_pc_patch & (1 << 20)));
284 if ((int)const_pool[ind] < 0) {
285 const_pool[ind] = counter;
286 ind = counter;
287 counter++;
288 }
289 else
290 ind = const_pool[ind];
291
292 SLJIT_ASSERT(diff >= 1);
293 if (diff >= 2 || ind > 0) {
294 diff = (diff + ind - 2) << 2;
295 SLJIT_ASSERT(diff <= 0xfff);
296 *last_pc_patch = (*last_pc_patch & ~0xfff) | diff;
297 }
298 else
299 *last_pc_patch = (*last_pc_patch & ~(0xfff | (1 << 23))) | 0x004;
300 }
301 last_pc_patch++;
302 }
303 return counter;
304 }
305
306 /* In some rare ocasions we may need future patches. The probability is close to 0 in practice. */
307 struct future_patch {
308 struct future_patch* next;
309 int index;
310 int value;
311 };
312
313 static SLJIT_INLINE int resolve_const_pool_index(struct future_patch **first_patch, sljit_uw cpool_current_index, sljit_uw *cpool_start_address, sljit_uw *buf_ptr)
314 {
315 int value;
316 struct future_patch *curr_patch, *prev_patch;
317
318 /* Using the values generated by patch_pc_relative_loads. */
319 if (!*first_patch)
320 value = (int)cpool_start_address[cpool_current_index];
321 else {
322 curr_patch = *first_patch;
323 prev_patch = 0;
324 while (1) {
325 if (!curr_patch) {
326 value = (int)cpool_start_address[cpool_current_index];
327 break;
328 }
329 if ((sljit_uw)curr_patch->index == cpool_current_index) {
330 value = curr_patch->value;
331 if (prev_patch)
332 prev_patch->next = curr_patch->next;
333 else
334 *first_patch = curr_patch->next;
335 SLJIT_FREE(curr_patch);
336 break;
337 }
338 prev_patch = curr_patch;
339 curr_patch = curr_patch->next;
340 }
341 }
342
343 if (value >= 0) {
344 if ((sljit_uw)value > cpool_current_index) {
345 curr_patch = (struct future_patch*)SLJIT_MALLOC(sizeof(struct future_patch));
346 if (!curr_patch) {
347 while (*first_patch) {
348 curr_patch = *first_patch;
349 *first_patch = (*first_patch)->next;
350 SLJIT_FREE(curr_patch);
351 }
352 return SLJIT_ERR_ALLOC_FAILED;
353 }
354 curr_patch->next = *first_patch;
355 curr_patch->index = value;
356 curr_patch->value = cpool_start_address[value];
357 *first_patch = curr_patch;
358 }
359 cpool_start_address[value] = *buf_ptr;
360 }
361 return SLJIT_SUCCESS;
362 }
363
364 #else
365
366 static int push_inst(struct sljit_compiler *compiler, sljit_uw inst)
367 {
368 sljit_uw* ptr;
369
370 ptr = (sljit_uw*)ensure_buf(compiler, sizeof(sljit_uw));
371 FAIL_IF(!ptr);
372 compiler->size++;
373 *ptr = inst;
374 return SLJIT_SUCCESS;
375 }
376
377 static SLJIT_INLINE int emit_imm(struct sljit_compiler *compiler, int reg, sljit_w imm)
378 {
379 FAIL_IF(push_inst(compiler, MOVW | RD(reg) | ((imm << 4) & 0xf0000) | (imm & 0xfff)));
380 return push_inst(compiler, MOVT | RD(reg) | ((imm >> 12) & 0xf0000) | ((imm >> 16) & 0xfff));
381 }
382
383 #endif
384
385 static SLJIT_INLINE int detect_jump_type(struct sljit_jump *jump, sljit_uw *code_ptr, sljit_uw *code)
386 {
387 sljit_w diff;
388
389 if (jump->flags & SLJIT_REWRITABLE_JUMP)
390 return 0;
391
392 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
393 if (jump->flags & IS_BL)
394 code_ptr--;
395
396 if (jump->flags & JUMP_ADDR)
397 diff = ((sljit_w)jump->u.target - (sljit_w)(code_ptr + 2));
398 else {
399 SLJIT_ASSERT(jump->flags & JUMP_LABEL);
400 diff = ((sljit_w)(code + jump->u.label->size) - (sljit_w)(code_ptr + 2));
401 }
402
403 /* Branch to Thumb code has not optimized yet. */
404 if (diff & 0x3)
405 return 0;
406
407 diff >>= 2;
408 if (jump->flags & IS_BL) {
409 if (diff <= 0x01ffffff && diff >= -0x02000000) {
410 *code_ptr = (BL - CONDITIONAL) | (*(code_ptr + 1) & COND_MASK);
411 jump->flags |= PATCH_B;
412 return 1;
413 }
414 }
415 else {
416 if (diff <= 0x01ffffff && diff >= -0x02000000) {
417 *code_ptr = (B - CONDITIONAL) | (*code_ptr & COND_MASK);
418 jump->flags |= PATCH_B;
419 }
420 }
421 #else
422 if (jump->flags & JUMP_ADDR)
423 diff = ((sljit_w)jump->u.target - (sljit_w)code_ptr);
424 else {
425 SLJIT_ASSERT(jump->flags & JUMP_LABEL);
426 diff = ((sljit_w)(code + jump->u.label->size) - (sljit_w)code_ptr);
427 }
428
429 /* Branch to Thumb code has not optimized yet. */
430 if (diff & 0x3)
431 return 0;
432
433 diff >>= 2;
434 if (diff <= 0x01ffffff && diff >= -0x02000000) {
435 code_ptr -= 2;
436 *code_ptr = ((jump->flags & IS_BL) ? (BL - CONDITIONAL) : (B - CONDITIONAL)) | (code_ptr[2] & COND_MASK);
437 jump->flags |= PATCH_B;
438 return 1;
439 }
440 #endif
441 return 0;
442 }
443
444 static SLJIT_INLINE void inline_set_jump_addr(sljit_uw addr, sljit_uw new_addr, int flush)
445 {
446 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
447 sljit_uw *ptr = (sljit_uw*)addr;
448 sljit_uw *inst = (sljit_uw*)ptr[0];
449 sljit_uw mov_pc = ptr[1];
450 int bl = (mov_pc & 0x0000f000) != RD(TMP_PC);
451 sljit_w diff = (sljit_w)(((sljit_w)new_addr - (sljit_w)(inst + 2)) >> 2);
452
453 if (diff <= 0x7fffff && diff >= -0x800000) {
454 /* Turn to branch. */
455 if (!bl) {
456 inst[0] = (mov_pc & COND_MASK) | (B - CONDITIONAL) | (diff & 0xffffff);
457 if (flush) {
458 SLJIT_CACHE_FLUSH(inst, inst + 1);
459 }
460 } else {
461 inst[0] = (mov_pc & COND_MASK) | (BL - CONDITIONAL) | (diff & 0xffffff);
462 inst[1] = NOP;
463 if (flush) {
464 SLJIT_CACHE_FLUSH(inst, inst + 2);
465 }
466 }
467 } else {
468 /* Get the position of the constant. */
469 if (mov_pc & (1 << 23))
470 ptr = inst + ((mov_pc & 0xfff) >> 2) + 2;
471 else
472 ptr = inst + 1;
473
474 if (*inst != mov_pc) {
475 inst[0] = mov_pc;
476 if (!bl) {
477 if (flush) {
478 SLJIT_CACHE_FLUSH(inst, inst + 1);
479 }
480 } else {
481 inst[1] = BLX | RM(TMP_REG1);
482 if (flush) {
483 SLJIT_CACHE_FLUSH(inst, inst + 2);
484 }
485 }
486 }
487 *ptr = new_addr;
488 }
489 #else
490 sljit_uw *inst = (sljit_uw*)addr;
491 SLJIT_ASSERT((inst[0] & 0xfff00000) == MOVW && (inst[1] & 0xfff00000) == MOVT);
492 inst[0] = MOVW | (inst[0] & 0xf000) | ((new_addr << 4) & 0xf0000) | (new_addr & 0xfff);
493 inst[1] = MOVT | (inst[1] & 0xf000) | ((new_addr >> 12) & 0xf0000) | ((new_addr >> 16) & 0xfff);
494 if (flush) {
495 SLJIT_CACHE_FLUSH(inst, inst + 2);
496 }
497 #endif
498 }
499
500 static sljit_uw get_immediate(sljit_uw imm);
501
502 static SLJIT_INLINE void inline_set_const(sljit_uw addr, sljit_w new_constant, int flush)
503 {
504 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
505 sljit_uw *ptr = (sljit_uw*)addr;
506 sljit_uw *inst = (sljit_uw*)ptr[0];
507 sljit_uw ldr_literal = ptr[1];
508 sljit_uw src2;
509
510 src2 = get_immediate(new_constant);
511 if (src2) {
512 *inst = 0xe3a00000 | (ldr_literal & 0xf000) | src2;
513 if (flush) {
514 SLJIT_CACHE_FLUSH(inst, inst + 1);
515 }
516 return;
517 }
518
519 src2 = get_immediate(~new_constant);
520 if (src2) {
521 *inst = 0xe3e00000 | (ldr_literal & 0xf000) | src2;
522 if (flush) {
523 SLJIT_CACHE_FLUSH(inst, inst + 1);
524 }
525 return;
526 }
527
528 if (ldr_literal & (1 << 23))
529 ptr = inst + ((ldr_literal & 0xfff) >> 2) + 2;
530 else
531 ptr = inst + 1;
532
533 if (*inst != ldr_literal) {
534 *inst = ldr_literal;
535 if (flush) {
536 SLJIT_CACHE_FLUSH(inst, inst + 1);
537 }
538 }
539 *ptr = new_constant;
540 #else
541 sljit_uw *inst = (sljit_uw*)addr;
542 SLJIT_ASSERT((inst[0] & 0xfff00000) == MOVW && (inst[1] & 0xfff00000) == MOVT);
543 inst[0] = MOVW | (inst[0] & 0xf000) | ((new_constant << 4) & 0xf0000) | (new_constant & 0xfff);
544 inst[1] = MOVT | (inst[1] & 0xf000) | ((new_constant >> 12) & 0xf0000) | ((new_constant >> 16) & 0xfff);
545 if (flush) {
546 SLJIT_CACHE_FLUSH(inst, inst + 2);
547 }
548 #endif
549 }
550
551 void* sljit_generate_code(struct sljit_compiler *compiler)
552 {
553 struct sljit_memory_fragment *buf;
554 sljit_uw *code;
555 sljit_uw *code_ptr;
556 sljit_uw *buf_ptr;
557 sljit_uw *buf_end;
558 sljit_uw size;
559 sljit_uw word_count;
560 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
561 sljit_uw cpool_size;
562 sljit_uw cpool_skip_alignment;
563 sljit_uw cpool_current_index;
564 sljit_uw *cpool_start_address;
565 sljit_uw *last_pc_patch;
566 struct future_patch *first_patch;
567 #endif
568
569 struct sljit_label *label;
570 struct sljit_jump *jump;
571 struct sljit_const *const_;
572
573 CHECK_ERROR_PTR();
574 check_sljit_generate_code(compiler);
575 reverse_buf(compiler);
576
577 /* Second code generation pass. */
578 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
579 size = compiler->size + (compiler->patches << 1);
580 if (compiler->cpool_fill > 0)
581 size += compiler->cpool_fill + CONST_POOL_ALIGNMENT - 1;
582 #else
583 size = compiler->size;
584 #endif
585 code = (sljit_uw*)SLJIT_MALLOC_EXEC(size * sizeof(sljit_uw));
586 PTR_FAIL_WITH_EXEC_IF(code);
587 buf = compiler->buf;
588
589 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
590 cpool_size = 0;
591 cpool_skip_alignment = 0;
592 cpool_current_index = 0;
593 cpool_start_address = NULL;
594 first_patch = NULL;
595 last_pc_patch = code;
596 #endif
597
598 code_ptr = code;
599 word_count = 0;
600
601 label = compiler->labels;
602 jump = compiler->jumps;
603 const_ = compiler->consts;
604
605 if (label && label->size == 0) {
606 label->addr = (sljit_uw)code;
607 label->size = 0;
608 label = label->next;
609 }
610
611 do {
612 buf_ptr = (sljit_uw*)buf->memory;
613 buf_end = buf_ptr + (buf->used_size >> 2);
614 do {
615 word_count++;
616 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
617 if (cpool_size > 0) {
618 if (cpool_skip_alignment > 0) {
619 buf_ptr++;
620 cpool_skip_alignment--;
621 }
622 else {
623 if (SLJIT_UNLIKELY(resolve_const_pool_index(&first_patch, cpool_current_index, cpool_start_address, buf_ptr))) {
624 SLJIT_FREE_EXEC(code);
625 compiler->error = SLJIT_ERR_ALLOC_FAILED;
626 return NULL;
627 }
628 buf_ptr++;
629 if (++cpool_current_index >= cpool_size) {
630 SLJIT_ASSERT(!first_patch);
631 cpool_size = 0;
632 if (label && label->size == word_count) {
633 /* Points after the current instruction. */
634 label->addr = (sljit_uw)code_ptr;
635 label->size = code_ptr - code;
636 label = label->next;
637 }
638 }
639 }
640 }
641 else if ((*buf_ptr & 0xff000000) != PUSH_POOL) {
642 #endif
643 *code_ptr = *buf_ptr++;
644 /* These structures are ordered by their address. */
645 SLJIT_ASSERT(!label || label->size >= word_count);
646 SLJIT_ASSERT(!jump || jump->addr >= word_count);
647 SLJIT_ASSERT(!const_ || const_->addr >= word_count);
648 if (jump && jump->addr == word_count) {
649 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
650 if (detect_jump_type(jump, code_ptr, code))
651 code_ptr--;
652 jump->addr = (sljit_uw)code_ptr;
653 #else
654 jump->addr = (sljit_uw)(code_ptr - 2);
655 if (detect_jump_type(jump, code_ptr, code))
656 code_ptr -= 2;
657 #endif
658 jump = jump->next;
659 }
660 if (label && label->size == word_count) {
661 /* code_ptr can be affected above. */
662 label->addr = (sljit_uw)(code_ptr + 1);
663 label->size = (code_ptr + 1) - code;
664 label = label->next;
665 }
666 if (const_ && const_->addr == word_count) {
667 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
668 const_->addr = (sljit_uw)code_ptr;
669 #else
670 const_->addr = (sljit_uw)(code_ptr - 1);
671 #endif
672 const_ = const_->next;
673 }
674 code_ptr++;
675 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
676 }
677 else {
678 /* Fortunately, no need to shift. */
679 cpool_size = *buf_ptr++ & ~PUSH_POOL;
680 SLJIT_ASSERT(cpool_size > 0);
681 cpool_start_address = ALIGN_INSTRUCTION(code_ptr + 1);
682 cpool_current_index = patch_pc_relative_loads(last_pc_patch, code_ptr, cpool_start_address, cpool_size);
683 if (cpool_current_index > 0) {
684 /* Unconditional branch. */
685 *code_ptr = B | (((cpool_start_address - code_ptr) + cpool_current_index - 2) & ~PUSH_POOL);
686 code_ptr = cpool_start_address + cpool_current_index;
687 }
688 cpool_skip_alignment = CONST_POOL_ALIGNMENT - 1;
689 cpool_current_index = 0;
690 last_pc_patch = code_ptr;
691 }
692 #endif
693 } while (buf_ptr < buf_end);
694 buf = buf->next;
695 } while (buf);
696
697 SLJIT_ASSERT(!label);
698 SLJIT_ASSERT(!jump);
699 SLJIT_ASSERT(!const_);
700
701 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
702 SLJIT_ASSERT(cpool_size == 0);
703 if (compiler->cpool_fill > 0) {
704 cpool_start_address = ALIGN_INSTRUCTION(code_ptr);
705 cpool_current_index = patch_pc_relative_loads(last_pc_patch, code_ptr, cpool_start_address, compiler->cpool_fill);
706 if (cpool_current_index > 0)
707 code_ptr = cpool_start_address + cpool_current_index;
708
709 buf_ptr = compiler->cpool;
710 buf_end = buf_ptr + compiler->cpool_fill;
711 cpool_current_index = 0;
712 while (buf_ptr < buf_end) {
713 if (SLJIT_UNLIKELY(resolve_const_pool_index(&first_patch, cpool_current_index, cpool_start_address, buf_ptr))) {
714 SLJIT_FREE_EXEC(code);
715 compiler->error = SLJIT_ERR_ALLOC_FAILED;
716 return NULL;
717 }
718 buf_ptr++;
719 cpool_current_index++;
720 }
721 SLJIT_ASSERT(!first_patch);
722 }
723 #endif
724
725 jump = compiler->jumps;
726 while (jump) {
727 buf_ptr = (sljit_uw*)jump->addr;
728
729 if (jump->flags & PATCH_B) {
730 if (!(jump->flags & JUMP_ADDR)) {
731 SLJIT_ASSERT(jump->flags & JUMP_LABEL);
732 SLJIT_ASSERT(((sljit_w)jump->u.label->addr - (sljit_w)(buf_ptr + 2)) <= 0x01ffffff && ((sljit_w)jump->u.label->addr - (sljit_w)(buf_ptr + 2)) >= -0x02000000);
733 *buf_ptr |= (((sljit_w)jump->u.label->addr - (sljit_w)(buf_ptr + 2)) >> 2) & 0x00ffffff;
734 }
735 else {
736 SLJIT_ASSERT(((sljit_w)jump->u.target - (sljit_w)(buf_ptr + 2)) <= 0x01ffffff && ((sljit_w)jump->u.target - (sljit_w)(buf_ptr + 2)) >= -0x02000000);
737 *buf_ptr |= (((sljit_w)jump->u.target - (sljit_w)(buf_ptr + 2)) >> 2) & 0x00ffffff;
738 }
739 }
740 else if (jump->flags & SLJIT_REWRITABLE_JUMP) {
741 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
742 jump->addr = (sljit_uw)code_ptr;
743 code_ptr[0] = (sljit_uw)buf_ptr;
744 code_ptr[1] = *buf_ptr;
745 inline_set_jump_addr((sljit_uw)code_ptr, (jump->flags & JUMP_LABEL) ? jump->u.label->addr : jump->u.target, 0);
746 code_ptr += 2;
747 #else
748 inline_set_jump_addr((sljit_uw)buf_ptr, (jump->flags & JUMP_LABEL) ? jump->u.label->addr : jump->u.target, 0);
749 #endif
750 }
751 else {
752 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
753 if (jump->flags & IS_BL)
754 buf_ptr--;
755 if (*buf_ptr & (1 << 23))
756 buf_ptr += ((*buf_ptr & 0xfff) >> 2) + 2;
757 else
758 buf_ptr += 1;
759 *buf_ptr = (jump->flags & JUMP_LABEL) ? jump->u.label->addr : jump->u.target;
760 #else
761 inline_set_jump_addr((sljit_uw)buf_ptr, (jump->flags & JUMP_LABEL) ? jump->u.label->addr : jump->u.target, 0);
762 #endif
763 }
764 jump = jump->next;
765 }
766
767 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
768 const_ = compiler->consts;
769 while (const_) {
770 buf_ptr = (sljit_uw*)const_->addr;
771 const_->addr = (sljit_uw)code_ptr;
772
773 code_ptr[0] = (sljit_uw)buf_ptr;
774 code_ptr[1] = *buf_ptr;
775 if (*buf_ptr & (1 << 23))
776 buf_ptr += ((*buf_ptr & 0xfff) >> 2) + 2;
777 else
778 buf_ptr += 1;
779 /* Set the value again (can be a simple constant). */
780 inline_set_const((sljit_uw)code_ptr, *buf_ptr, 0);
781 code_ptr += 2;
782
783 const_ = const_->next;
784 }
785 #endif
786
787 SLJIT_ASSERT(code_ptr - code <= (int)size);
788
789 SLJIT_CACHE_FLUSH(code, code_ptr);
790 compiler->error = SLJIT_ERR_COMPILED;
791 return code;
792 }
793
794 /* emit_op inp_flags.
795 WRITE_BACK must be the first, since it is a flag. */
796 #define WRITE_BACK 0x01
797 #define ALLOW_IMM 0x02
798 #define ALLOW_INV_IMM 0x04
799 #define ALLOW_ANY_IMM (ALLOW_IMM | ALLOW_INV_IMM)
800 #define ARG_TEST 0x08
801
802 /* Creates an index in data_transfer_insts array. */
803 #define WORD_DATA 0x00
804 #define BYTE_DATA 0x10
805 #define HALF_DATA 0x20
806 #define SIGNED_DATA 0x40
807 #define LOAD_DATA 0x80
808
809 #define EMIT_INSTRUCTION(inst) \
810 FAIL_IF(push_inst(compiler, (inst)))
811
812 /* Condition: AL. */
813 #define EMIT_DATA_PROCESS_INS(opcode, set_flags, dst, src1, src2) \
814 (0xe0000000 | ((opcode) << 21) | (set_flags) | RD(dst) | RN(src1) | (src2))
815
816 static int emit_op(struct sljit_compiler *compiler, int op, int inp_flags,
817 int dst, sljit_w dstw,
818 int src1, sljit_w src1w,
819 int src2, sljit_w src2w);
820
821 int sljit_emit_enter(struct sljit_compiler *compiler, int args, int temporaries, int generals, int local_size)
822 {
823 int size;
824 sljit_uw push;
825
826 CHECK_ERROR();
827 check_sljit_emit_enter(compiler, args, temporaries, generals, local_size);
828
829 compiler->temporaries = temporaries;
830 compiler->generals = generals;
831
832 /* Push general registers, temporary registers
833 stmdb sp!, {..., lr} */
834 push = PUSH | (1 << 14);
835 if (temporaries >= 5)
836 push |= 1 << 11;
837 if (temporaries >= 4)
838 push |= 1 << 10;
839 if (generals >= 5)
840 push |= 1 << 8;
841 if (generals >= 4)
842 push |= 1 << 7;
843 if (generals >= 3)
844 push |= 1 << 6;
845 if (generals >= 2)
846 push |= 1 << 5;
847 if (generals >= 1)
848 push |= 1 << 4;
849 EMIT_INSTRUCTION(push);
850
851 /* Stack must be aligned to 8 bytes: */
852 size = (1 + generals) * sizeof(sljit_uw);
853 if (temporaries >= 4)
854 size += (temporaries - 3) * sizeof(sljit_uw);
855 local_size += size;
856 local_size = (local_size + 7) & ~7;
857 local_size -= size;
858 compiler->local_size = local_size;
859 if (local_size > 0)
860 FAIL_IF(emit_op(compiler, SLJIT_SUB, ALLOW_IMM, SLJIT_LOCALS_REG, 0, SLJIT_LOCALS_REG, 0, SLJIT_IMM, local_size));
861
862 if (args >= 1)
863 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, SLJIT_GENERAL_REG1, SLJIT_UNUSED, RM(SLJIT_TEMPORARY_REG1)));
864 if (args >= 2)
865 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, SLJIT_GENERAL_REG2, SLJIT_UNUSED, RM(SLJIT_TEMPORARY_REG2)));
866 if (args >= 3)
867 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, SLJIT_GENERAL_REG3, SLJIT_UNUSED, RM(SLJIT_TEMPORARY_REG3)));
868
869 return SLJIT_SUCCESS;
870 }
871
872 void sljit_fake_enter(struct sljit_compiler *compiler, int args, int temporaries, int generals, int local_size)
873 {
874 int size;
875
876 CHECK_ERROR_VOID();
877 check_sljit_fake_enter(compiler, args, temporaries, generals, local_size);
878
879 compiler->temporaries = temporaries;
880 compiler->generals = generals;
881
882 size = (1 + generals) * sizeof(sljit_uw);
883 if (temporaries >= 4)
884 size += (temporaries - 3) * sizeof(sljit_uw);
885 local_size += size;
886 local_size = (local_size + 7) & ~7;
887 local_size -= size;
888 compiler->local_size = local_size;
889 }
890
891 int sljit_emit_return(struct sljit_compiler *compiler, int src, sljit_w srcw)
892 {
893 sljit_uw pop;
894
895 CHECK_ERROR();
896 check_sljit_emit_return(compiler, src, srcw);
897
898 if (src != SLJIT_UNUSED && src != SLJIT_RETURN_REG)
899 FAIL_IF(emit_op(compiler, SLJIT_MOV, ALLOW_ANY_IMM, SLJIT_RETURN_REG, 0, TMP_REG1, 0, src, srcw));
900
901 if (compiler->local_size > 0)
902 FAIL_IF(emit_op(compiler, SLJIT_ADD, ALLOW_IMM, SLJIT_LOCALS_REG, 0, SLJIT_LOCALS_REG, 0, SLJIT_IMM, compiler->local_size));
903
904 pop = POP | (1 << 15);
905 /* Push general registers, temporary registers
906 ldmia sp!, {..., pc} */
907 if (compiler->temporaries >= 5)
908 pop |= 1 << 11;
909 if (compiler->temporaries >= 4)
910 pop |= 1 << 10;
911 if (compiler->generals >= 5)
912 pop |= 1 << 8;
913 if (compiler->generals >= 4)
914 pop |= 1 << 7;
915 if (compiler->generals >= 3)
916 pop |= 1 << 6;
917 if (compiler->generals >= 2)
918 pop |= 1 << 5;
919 if (compiler->generals >= 1)
920 pop |= 1 << 4;
921
922 return push_inst(compiler, pop);
923 }
924
925 /* --------------------------------------------------------------------- */
926 /* Operators */
927 /* --------------------------------------------------------------------- */
928
929 /* s/l - store/load (1 bit)
930 u/s - signed/unsigned (1 bit)
931 w/b/h/N - word/byte/half/NOT allowed (2 bit)
932 It contans 16 items, but not all are different. */
933
934 static sljit_w data_transfer_insts[16] = {
935 /* s u w */ 0xe5000000 /* str */,
936 /* s u b */ 0xe5400000 /* strb */,
937 /* s u h */ 0xe10000b0 /* strh */,
938 /* s u N */ 0x00000000 /* not allowed */,
939 /* s s w */ 0xe5000000 /* str */,
940 /* s s b */ 0xe5400000 /* strb */,
941 /* s s h */ 0xe10000b0 /* strh */,
942 /* s s N */ 0x00000000 /* not allowed */,
943
944 /* l u w */ 0xe5100000 /* ldr */,
945 /* l u b */ 0xe5500000 /* ldrb */,
946 /* l u h */ 0xe11000b0 /* ldrh */,
947 /* l u N */ 0x00000000 /* not allowed */,
948 /* l s w */ 0xe5100000 /* ldr */,
949 /* l s b */ 0xe11000d0 /* ldrsb */,
950 /* l s h */ 0xe11000f0 /* ldrsh */,
951 /* l s N */ 0x00000000 /* not allowed */,
952 };
953
954 #define EMIT_DATA_TRANSFER(type, add, wb, target, base1, base2) \
955 (data_transfer_insts[(type) >> 4] | ((add) << 23) | ((wb) << 21) | (reg_map[target] << 12) | (reg_map[base1] << 16) | (base2))
956 /* Normal ldr/str instruction.
957 Type2: ldrsb, ldrh, ldrsh */
958 #define IS_TYPE1_TRANSFER(type) \
959 (data_transfer_insts[(type) >> 4] & 0x04000000)
960 #define TYPE2_TRANSFER_IMM(imm) \
961 (((imm) & 0xf) | (((imm) & 0xf0) << 4) | (1 << 22))
962
963 /* flags: */
964 /* Arguments are swapped. */
965 #define ARGS_SWAPPED 0x01
966 /* Inverted immediate. */
967 #define INV_IMM 0x02
968 /* Source and destination is register. */
969 #define REG_DEST 0x04
970 #define REG_SOURCE 0x08
971 /* One instruction is enough. */
972 #define FAST_DEST 0x10
973 /* Multiple instructions are required. */
974 #define SLOW_DEST 0x20
975 /* SET_FLAGS must be (1 << 20) as it is also the value of S bit (can be used for optimization). */
976 #define SET_FLAGS (1 << 20)
977 /* dst: reg
978 src1: reg
979 src2: reg or imm (if allowed)
980 SRC2_IMM must be (1 << 25) as it is also the value of I bit (can be used for optimization). */
981 #define SRC2_IMM (1 << 25)
982
983 #define EMIT_DATA_PROCESS_INS_AND_RETURN(opcode) \
984 return push_inst(compiler, EMIT_DATA_PROCESS_INS(opcode, flags & SET_FLAGS, dst, src1, (src2 & SRC2_IMM) ? src2 : RM(src2)))
985
986 #define EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(opcode, dst, src1, src2) \
987 return push_inst(compiler, EMIT_DATA_PROCESS_INS(opcode, flags & SET_FLAGS, dst, src1, src2))
988
989 #define EMIT_SHIFT_INS_AND_RETURN(opcode) \
990 SLJIT_ASSERT(!(flags & INV_IMM) && !(src2 & SRC2_IMM)); \
991 if (compiler->shift_imm != 0x20) { \
992 SLJIT_ASSERT(src1 == TMP_REG1); \
993 SLJIT_ASSERT(!(flags & ARGS_SWAPPED)); \
994 return push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, flags & SET_FLAGS, dst, SLJIT_UNUSED, (compiler->shift_imm << 7) | (opcode << 5) | reg_map[src2])); \
995 } \
996 return push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, flags & SET_FLAGS, dst, SLJIT_UNUSED, (reg_map[(flags & ARGS_SWAPPED) ? src1 : src2] << 8) | (opcode << 5) | 0x10 | ((flags & ARGS_SWAPPED) ? reg_map[src2] : reg_map[src1])));
997
998 static SLJIT_INLINE int emit_single_op(struct sljit_compiler *compiler, int op, int flags,
999 int dst, int src1, int src2)
1000 {
1001 sljit_w mul_inst;
1002
1003 switch (GET_OPCODE(op)) {
1004 case SLJIT_ADD:
1005 SLJIT_ASSERT(!(flags & INV_IMM));
1006 EMIT_DATA_PROCESS_INS_AND_RETURN(ADD_DP);
1007
1008 case SLJIT_ADDC:
1009 SLJIT_ASSERT(!(flags & INV_IMM));
1010 EMIT_DATA_PROCESS_INS_AND_RETURN(ADC_DP);
1011
1012 case SLJIT_SUB:
1013 SLJIT_ASSERT(!(flags & INV_IMM));
1014 if (!(flags & ARGS_SWAPPED))
1015 EMIT_DATA_PROCESS_INS_AND_RETURN(SUB_DP);
1016 EMIT_DATA_PROCESS_INS_AND_RETURN(RSB_DP);
1017
1018 case SLJIT_SUBC:
1019 SLJIT_ASSERT(!(flags & INV_IMM));
1020 if (!(flags & ARGS_SWAPPED))
1021 EMIT_DATA_PROCESS_INS_AND_RETURN(SBC_DP);
1022 EMIT_DATA_PROCESS_INS_AND_RETURN(RSC_DP);
1023
1024 case SLJIT_MUL:
1025 SLJIT_ASSERT(!(flags & INV_IMM));
1026 SLJIT_ASSERT(!(src2 & SRC2_IMM));
1027 if (SLJIT_UNLIKELY(op & SLJIT_SET_O))
1028 mul_inst = SMULL | (reg_map[TMP_REG3] << 16) | (reg_map[dst] << 12);
1029 else
1030 mul_inst = MUL | (reg_map[dst] << 16);
1031
1032 if (dst != src2)
1033 FAIL_IF(push_inst(compiler, mul_inst | (reg_map[src1] << 8) | reg_map[src2]));
1034 else if (dst != src1)
1035 FAIL_IF(push_inst(compiler, mul_inst | (reg_map[src2] << 8) | reg_map[src1]));
1036 else {
1037 /* Rm and Rd must not be the same register. */
1038 SLJIT_ASSERT(dst != TMP_REG1);
1039 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, TMP_REG1, SLJIT_UNUSED, reg_map[src2])));
1040 FAIL_IF(push_inst(compiler, mul_inst | (reg_map[src2] << 8) | reg_map[TMP_REG1]));
1041 }
1042
1043 if (!(op & SLJIT_SET_O))
1044 return SLJIT_SUCCESS;
1045
1046 /* We need to use TMP_REG3. */
1047 compiler->cache_arg = 0;
1048 compiler->cache_argw = 0;
1049 /* cmp TMP_REG2, dst asr #31. */
1050 return push_inst(compiler, EMIT_DATA_PROCESS_INS(CMP_DP, SET_FLAGS, SLJIT_UNUSED, TMP_REG3, RM(dst) | 0xfc0));
1051
1052 case SLJIT_AND:
1053 if (!(flags & INV_IMM))
1054 EMIT_DATA_PROCESS_INS_AND_RETURN(AND_DP);
1055 EMIT_DATA_PROCESS_INS_AND_RETURN(BIC_DP);
1056
1057 case SLJIT_OR:
1058 SLJIT_ASSERT(!(flags & INV_IMM));
1059 EMIT_DATA_PROCESS_INS_AND_RETURN(ORR_DP);
1060
1061 case SLJIT_XOR:
1062 SLJIT_ASSERT(!(flags & INV_IMM));
1063 EMIT_DATA_PROCESS_INS_AND_RETURN(EOR_DP);
1064
1065 case SLJIT_SHL:
1066 EMIT_SHIFT_INS_AND_RETURN(0);
1067
1068 case SLJIT_LSHR:
1069 EMIT_SHIFT_INS_AND_RETURN(1);
1070
1071 case SLJIT_ASHR:
1072 EMIT_SHIFT_INS_AND_RETURN(2);
1073
1074 case SLJIT_MOV:
1075 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & ARGS_SWAPPED));
1076 if (dst != src2) {
1077 if (src2 & SRC2_IMM) {
1078 if (flags & INV_IMM)
1079 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MVN_DP, dst, SLJIT_UNUSED, src2);
1080 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MOV_DP, dst, SLJIT_UNUSED, src2);
1081 }
1082 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MOV_DP, dst, SLJIT_UNUSED, reg_map[src2]);
1083 }
1084 return SLJIT_SUCCESS;
1085
1086 case SLJIT_MOV_UB:
1087 case SLJIT_MOV_SB:
1088 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & ARGS_SWAPPED));
1089 if ((flags & (REG_DEST | REG_SOURCE)) == (REG_DEST | REG_SOURCE)) {
1090 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
1091 if (op == SLJIT_MOV_UB)
1092 return push_inst(compiler, EMIT_DATA_PROCESS_INS(AND_DP, 0, dst, src2, SRC2_IMM | 0xff));
1093 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, dst, SLJIT_UNUSED, (24 << 7) | reg_map[src2]));
1094 return push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, dst, SLJIT_UNUSED, (24 << 7) | (op == SLJIT_MOV_UB ? 0x20 : 0x40) | reg_map[dst]));
1095 #else
1096 return push_inst(compiler, (op == SLJIT_MOV_UB ? UXTB : SXTB) | RD(dst) | RM(src2));
1097 #endif
1098 }
1099 else if (dst != src2) {
1100 SLJIT_ASSERT(src2 & SRC2_IMM);
1101 if (flags & INV_IMM)
1102 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MVN_DP, dst, SLJIT_UNUSED, src2);
1103 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MOV_DP, dst, SLJIT_UNUSED, src2);
1104 }
1105 return SLJIT_SUCCESS;
1106
1107 case SLJIT_MOV_UH:
1108 case SLJIT_MOV_SH:
1109 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & ARGS_SWAPPED));
1110 if ((flags & (REG_DEST | REG_SOURCE)) == (REG_DEST | REG_SOURCE)) {
1111 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
1112 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, dst, SLJIT_UNUSED, (16 << 7) | reg_map[src2]));
1113 return push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, dst, SLJIT_UNUSED, (16 << 7) | (op == SLJIT_MOV_UH ? 0x20 : 0x40) | reg_map[dst]));
1114 #else
1115 return push_inst(compiler, (op == SLJIT_MOV_UH ? UXTH : SXTH) | RD(dst) | RM(src2));
1116 #endif
1117 }
1118 else if (dst != src2) {
1119 SLJIT_ASSERT(src2 & SRC2_IMM);
1120 if (flags & INV_IMM)
1121 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MVN_DP, dst, SLJIT_UNUSED, src2);
1122 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MOV_DP, dst, SLJIT_UNUSED, src2);
1123 }
1124 return SLJIT_SUCCESS;
1125
1126 case SLJIT_NOT:
1127 if (src2 & SRC2_IMM) {
1128 if (flags & INV_IMM)
1129 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MOV_DP, dst, SLJIT_UNUSED, src2);
1130 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MVN_DP, dst, SLJIT_UNUSED, src2);
1131 }
1132 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MVN_DP, dst, SLJIT_UNUSED, RM(src2));
1133
1134 case SLJIT_CLZ:
1135 SLJIT_ASSERT(!(flags & INV_IMM));
1136 SLJIT_ASSERT(!(src2 & SRC2_IMM));
1137 FAIL_IF(push_inst(compiler, CLZ | RD(dst) | RM(src2)));
1138 if (flags & SET_FLAGS)
1139 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(CMP_DP, SLJIT_UNUSED, dst, SRC2_IMM);
1140 return SLJIT_SUCCESS;
1141 }
1142 SLJIT_ASSERT_STOP();
1143 return SLJIT_SUCCESS;
1144 }
1145
1146 #undef EMIT_DATA_PROCESS_INS_AND_RETURN
1147 #undef EMIT_FULL_DATA_PROCESS_INS_AND_RETURN
1148 #undef EMIT_SHIFT_INS_AND_RETURN
1149
1150 /* Tests whether the immediate can be stored in the 12 bit imm field.
1151 Returns with 0 if not possible. */
1152 static sljit_uw get_immediate(sljit_uw imm)
1153 {
1154 int rol;
1155
1156 if (imm <= 0xff)
1157 return SRC2_IMM | imm;
1158
1159 if (!(imm & 0xff000000)) {
1160 imm <<= 8;
1161 rol = 8;
1162 }
1163 else {
1164 imm = (imm << 24) | (imm >> 8);
1165 rol = 0;
1166 }
1167
1168 if (!(imm & 0xff000000)) {
1169 imm <<= 8;
1170 rol += 4;
1171 }
1172
1173 if (!(imm & 0xf0000000)) {
1174 imm <<= 4;
1175 rol += 2;
1176 }
1177
1178 if (!(imm & 0xc0000000)) {
1179 imm <<= 2;
1180 rol += 1;
1181 }
1182
1183 if (!(imm & 0x00ffffff))
1184 return SRC2_IMM | (imm >> 24) | (rol << 8);
1185 else
1186 return 0;
1187 }
1188
1189 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
1190 static int generate_int(struct sljit_compiler *compiler, int reg, sljit_uw imm, int positive)
1191 {
1192 sljit_uw mask;
1193 sljit_uw imm1;
1194 sljit_uw imm2;
1195 int rol;
1196
1197 /* Step1: Search a zero byte (8 continous zero bit). */
1198 mask = 0xff000000;
1199 rol = 8;
1200 while(1) {
1201 if (!(imm & mask)) {
1202 /* Rol imm by rol. */
1203 imm = (imm << rol) | (imm >> (32 - rol));
1204 /* Calculate arm rol. */
1205 rol = 4 + (rol >> 1);
1206 break;
1207 }
1208 rol += 2;
1209 mask >>= 2;
1210 if (mask & 0x3) {
1211 /* rol by 8. */
1212 imm = (imm << 8) | (imm >> 24);
1213 mask = 0xff00;
1214 rol = 24;
1215 while (1) {
1216 if (!(imm & mask)) {
1217 /* Rol imm by rol. */
1218 imm = (imm << rol) | (imm >> (32 - rol));
1219 /* Calculate arm rol. */
1220 rol = (rol >> 1) - 8;
1221 break;
1222 }
1223 rol += 2;
1224 mask >>= 2;
1225 if (mask & 0x3)
1226 return 0;
1227 }
1228 break;
1229 }
1230 }
1231
1232 /* The low 8 bit must be zero. */
1233 SLJIT_ASSERT(!(imm & 0xff));
1234
1235 if (!(imm & 0xff000000)) {
1236 imm1 = SRC2_IMM | ((imm >> 16) & 0xff) | (((rol + 4) & 0xf) << 8);
1237 imm2 = SRC2_IMM | ((imm >> 8) & 0xff) | (((rol + 8) & 0xf) << 8);
1238 }
1239 else if (imm & 0xc0000000) {
1240 imm1 = SRC2_IMM | ((imm >> 24) & 0xff) | ((rol & 0xf) << 8);
1241 imm <<= 8;
1242 rol += 4;
1243
1244 if (!(imm & 0xff000000)) {
1245 imm <<= 8;
1246 rol += 4;
1247 }
1248
1249 if (!(imm & 0xf0000000)) {
1250 imm <<= 4;
1251 rol += 2;
1252 }
1253
1254 if (!(imm & 0xc0000000)) {
1255 imm <<= 2;
1256 rol += 1;
1257 }
1258
1259 if (!(imm & 0x00ffffff))
1260 imm2 = SRC2_IMM | (imm >> 24) | ((rol & 0xf) << 8);
1261 else
1262 return 0;
1263 }
1264 else {
1265 if (!(imm & 0xf0000000)) {
1266 imm <<= 4;
1267 rol += 2;
1268 }
1269
1270 if (!(imm & 0xc0000000)) {
1271 imm <<= 2;
1272 rol += 1;
1273 }
1274
1275 imm1 = SRC2_IMM | ((imm >> 24) & 0xff) | ((rol & 0xf) << 8);
1276 imm <<= 8;
1277 rol += 4;
1278
1279 if (!(imm & 0xf0000000)) {
1280 imm <<= 4;
1281 rol += 2;
1282 }
1283
1284 if (!(imm & 0xc0000000)) {
1285 imm <<= 2;
1286 rol += 1;
1287 }
1288
1289 if (!(imm & 0x00ffffff))
1290 imm2 = SRC2_IMM | (imm >> 24) | ((rol & 0xf) << 8);
1291 else
1292 return 0;
1293 }
1294
1295 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(positive ? MOV_DP : MVN_DP, 0, reg, SLJIT_UNUSED, imm1));
1296 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(positive ? ORR_DP : BIC_DP, 0, reg, reg, imm2));
1297 return 1;
1298 }
1299 #endif
1300
1301 static int load_immediate(struct sljit_compiler *compiler, int reg, sljit_uw imm)
1302 {
1303 sljit_uw tmp;
1304
1305 #if (defined SLJIT_CONFIG_ARM_V7 && SLJIT_CONFIG_ARM_V7)
1306 if (!(imm & ~0xffff))
1307 return push_inst(compiler, MOVW | RD(reg) | ((imm << 4) & 0xf0000) | (imm & 0xfff));
1308 #endif
1309
1310 /* Create imm by 1 inst. */
1311 tmp = get_immediate(imm);
1312 if (tmp) {
1313 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, reg, SLJIT_UNUSED, tmp));
1314 return SLJIT_SUCCESS;
1315 }
1316
1317 tmp = get_immediate(~imm);
1318 if (tmp) {
1319 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MVN_DP, 0, reg, SLJIT_UNUSED, tmp));
1320 return SLJIT_SUCCESS;
1321 }
1322
1323 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
1324 /* Create imm by 2 inst. */
1325 FAIL_IF(generate_int(compiler, reg, imm, 1));
1326 FAIL_IF(generate_int(compiler, reg, ~imm, 0));
1327
1328 /* Load integer. */
1329 return push_inst_with_literal(compiler, EMIT_DATA_TRANSFER(WORD_DATA | LOAD_DATA, 1, 0, reg, TMP_PC, 0), imm);
1330 #else
1331 return emit_imm(compiler, reg, imm);
1332 #endif
1333 }
1334
1335 /* Can perform an operation using at most 1 instruction. */
1336 static int getput_arg_fast(struct sljit_compiler *compiler, int inp_flags, int reg, int arg, sljit_w argw)
1337 {
1338 sljit_uw imm;
1339
1340 if (arg & SLJIT_IMM) {
1341 imm = get_immediate(argw);
1342 if (imm) {
1343 if (inp_flags & ARG_TEST)
1344 return 1;
1345 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, reg, SLJIT_UNUSED, imm));
1346 return -1;
1347 }
1348 imm = get_immediate(~argw);
1349 if (imm) {
1350 if (inp_flags & ARG_TEST)
1351 return 1;
1352 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MVN_DP, 0, reg, SLJIT_UNUSED, imm));
1353 return -1;
1354 }
1355 return (inp_flags & ARG_TEST) ? SLJIT_SUCCESS : 0;
1356 }
1357
1358 SLJIT_ASSERT(arg & SLJIT_MEM);
1359
1360 /* Fast loads/stores. */
1361 if (arg & 0xf) {
1362 if (!(arg & 0xf0)) {
1363 if (IS_TYPE1_TRANSFER(inp_flags)) {
1364 if (argw >= 0 && argw <= 0xfff) {
1365 if (inp_flags & ARG_TEST)
1366 return 1;
1367 EMIT_INSTRUCTION(EMIT_DATA_TRANSFER(inp_flags, 1, inp_flags & WRITE_BACK, reg, arg & 0xf, argw));
1368 return -1;
1369 }
1370 if (argw < 0 && argw >= -0xfff) {
1371 if (inp_flags & ARG_TEST)
1372 return 1;
1373 EMIT_INSTRUCTION(EMIT_DATA_TRANSFER(inp_flags, 0, inp_flags & WRITE_BACK, reg, arg & 0xf, -argw));
1374 return -1;
1375 }
1376 }
1377 else {
1378 if (argw >= 0 && argw <= 0xff) {
1379 if (inp_flags & ARG_TEST)
1380 return 1;
1381 EMIT_INSTRUCTION(EMIT_DATA_TRANSFER(inp_flags, 1, inp_flags & WRITE_BACK, reg, arg & 0xf, TYPE2_TRANSFER_IMM(argw)));
1382 return -1;
1383 }
1384 if (argw < 0 && argw >= -0xff) {
1385 if (inp_flags & ARG_TEST)
1386 return 1;
1387 argw = -argw;
1388 EMIT_INSTRUCTION(EMIT_DATA_TRANSFER(inp_flags, 0, inp_flags & WRITE_BACK, reg, arg & 0xf, TYPE2_TRANSFER_IMM(argw)));
1389 return -1;
1390 }
1391 }
1392 }
1393 else if ((argw & 0x3) == 0 || IS_TYPE1_TRANSFER(inp_flags)) {
1394 if (inp_flags & ARG_TEST)
1395 return 1;
1396 EMIT_INSTRUCTION(EMIT_DATA_TRANSFER(inp_flags, 1, inp_flags & WRITE_BACK, reg, arg & 0xf,
1397 RM((arg >> 4) & 0xf) | (IS_TYPE1_TRANSFER(inp_flags) ? SRC2_IMM : 0) | ((argw & 0x3) << 7)));
1398 return -1;
1399 }
1400 }
1401
1402 return (inp_flags & ARG_TEST) ? SLJIT_SUCCESS : 0;
1403 }
1404
1405 /* See getput_arg below.
1406 Note: can_cache is called only for binary operators. Those
1407 operators always uses word arguments without write back. */
1408 static int can_cache(int arg, sljit_w argw, int next_arg, sljit_w next_argw)
1409 {
1410 /* Immediate caching is not supported as it would be an operation on constant arguments. */
1411 if (arg & SLJIT_IMM)
1412 return 0;
1413
1414 /* Always a simple operation. */
1415 if (arg & 0xf0)
1416 return 0;
1417
1418 if (!(arg & 0xf)) {
1419 /* Immediate access. */
1420 if ((next_arg & SLJIT_MEM) && ((sljit_uw)argw - (sljit_uw)next_argw <= 0xfff || (sljit_uw)next_argw - (sljit_uw)argw <= 0xfff))
1421 return 1;
1422 return 0;
1423 }
1424
1425 if (argw <= 0xfffff && argw >= -0xfffff)
1426 return 0;
1427
1428 if (argw == next_argw && (next_arg & SLJIT_MEM))
1429 return 1;
1430
1431 if (arg == next_arg && ((sljit_uw)argw - (sljit_uw)next_argw <= 0xfff || (sljit_uw)next_argw - (sljit_uw)argw <= 0xfff))
1432 return 1;
1433
1434 return 0;
1435 }
1436
1437 #define GETPUT_ARG_DATA_TRANSFER(add, wb, target, base, imm) \
1438 if (max_delta & 0xf00) \
1439 FAIL_IF(push_inst(compiler, EMIT_DATA_TRANSFER(inp_flags, add, wb, target, base, imm))); \
1440 else \
1441 FAIL_IF(push_inst(compiler, EMIT_DATA_TRANSFER(inp_flags, add, wb, target, base, TYPE2_TRANSFER_IMM(imm))));
1442
1443 #define TEST_WRITE_BACK() \
1444 if (inp_flags & WRITE_BACK) { \
1445 tmp_r = arg & 0xf; \
1446 if (reg == tmp_r) { \
1447 /* This can only happen for stores */ \
1448 /* since ldr reg, [reg, ...]! has no meaning */ \
1449 SLJIT_ASSERT(!(inp_flags & LOAD_DATA)); \
1450 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, TMP_REG3, SLJIT_UNUSED, RM(reg))); \
1451 reg = TMP_REG3; \
1452 } \
1453 }
1454
1455 /* Emit the necessary instructions. See can_cache above. */
1456 static int getput_arg(struct sljit_compiler *compiler, int inp_flags, int reg, int arg, sljit_w argw, int next_arg, sljit_w next_argw)
1457 {
1458 int tmp_r;
1459 sljit_w max_delta;
1460 sljit_w sign;
1461
1462 if (arg & SLJIT_IMM) {
1463 SLJIT_ASSERT(inp_flags & LOAD_DATA);
1464 return load_immediate(compiler, reg, argw);
1465 }
1466
1467 SLJIT_ASSERT(arg & SLJIT_MEM);
1468
1469 tmp_r = (inp_flags & LOAD_DATA) ? reg : TMP_REG3;
1470 max_delta = IS_TYPE1_TRANSFER(inp_flags) ? 0xfff : 0xff;
1471
1472 if ((arg & 0xf) == SLJIT_UNUSED) {
1473 /* Write back is not used. */
1474 if ((compiler->cache_arg & SLJIT_IMM) && (((sljit_uw)argw - (sljit_uw)compiler->cache_argw) <= (sljit_uw)max_delta || ((sljit_uw)compiler->cache_argw - (sljit_uw)argw) <= (sljit_uw)max_delta)) {
1475 if (((sljit_uw)argw - (sljit_uw)compiler->cache_argw) <= (sljit_uw)max_delta) {
1476 sign = 1;
1477 argw = argw - compiler->cache_argw;
1478 }
1479 else {
1480 sign = 0;
1481 argw = compiler->cache_argw - argw;
1482 }
1483
1484 if (max_delta & 0xf00) {
1485 EMIT_INSTRUCTION(EMIT_DATA_TRANSFER(inp_flags, sign, 0, reg, TMP_REG3, argw));
1486 }
1487 else {
1488 EMIT_INSTRUCTION(EMIT_DATA_TRANSFER(inp_flags, sign, 0, reg, TMP_REG3, TYPE2_TRANSFER_IMM(argw)));
1489 }
1490 return SLJIT_SUCCESS;
1491 }
1492
1493 /* With write back, we can create some sophisticated loads, but
1494 it is hard to decide whether we should convert downward (0s) or upward (1s). */
1495 if ((next_arg & SLJIT_MEM) && ((sljit_uw)argw - (sljit_uw)next_argw <= (sljit_uw)max_delta || (sljit_uw)next_argw - (sljit_uw)argw <= (sljit_uw)max_delta)) {
1496 SLJIT_ASSERT(inp_flags & LOAD_DATA);
1497
1498 compiler->cache_arg = SLJIT_IMM;
1499 compiler->cache_argw = argw;
1500 tmp_r = TMP_REG3;
1501 }
1502
1503 FAIL_IF(load_immediate(compiler, tmp_r, argw));
1504 GETPUT_ARG_DATA_TRANSFER(1, 0, reg, tmp_r, 0);
1505 return SLJIT_SUCCESS;
1506 }
1507
1508 /* Extended imm addressing for [reg+imm] format. */
1509 sign = (max_delta << 8) | 0xff;
1510 if (!(arg & 0xf0) && argw <= sign && argw >= -sign) {
1511 TEST_WRITE_BACK();
1512 if (argw >= 0) {
1513 sign = 1;
1514 }
1515 else {
1516 sign = 0;
1517 argw = -argw;
1518 }
1519
1520 /* Optimization: add is 0x4, sub is 0x2. Sign is 1 for add and 0 for sub. */
1521 if (max_delta & 0xf00)
1522 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(SUB_DP << sign, 0, tmp_r, arg & 0xf, SRC2_IMM | (argw >> 12) | 0xa00));
1523 else
1524 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(SUB_DP << sign, 0, tmp_r, arg & 0xf, SRC2_IMM | (argw >> 8) | 0xc00));
1525
1526 argw &= max_delta;
1527 GETPUT_ARG_DATA_TRANSFER(sign, inp_flags & WRITE_BACK, reg, tmp_r, argw);
1528 return SLJIT_SUCCESS;
1529 }
1530
1531 if (arg & 0xf0) {
1532 SLJIT_ASSERT((argw & 0x3) && !(max_delta & 0xf00));
1533 if (inp_flags & WRITE_BACK)
1534 tmp_r = arg & 0xf;
1535 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(ADD_DP, 0, tmp_r, arg & 0xf, RM((arg >> 4) & 0xf) | ((argw & 0x3) << 7)));
1536 EMIT_INSTRUCTION(EMIT_DATA_TRANSFER(inp_flags, 1, 0, reg, tmp_r, TYPE2_TRANSFER_IMM(0)));
1537 return SLJIT_SUCCESS;
1538 }
1539
1540 if (compiler->cache_arg == arg && ((sljit_uw)argw - (sljit_uw)compiler->cache_argw) <= (sljit_uw)max_delta) {
1541 SLJIT_ASSERT(!(inp_flags & WRITE_BACK));
1542 argw = argw - compiler->cache_argw;
1543 GETPUT_ARG_DATA_TRANSFER(1, 0, reg, TMP_REG3, argw);
1544 return SLJIT_SUCCESS;
1545 }
1546
1547 if (compiler->cache_arg == arg && ((sljit_uw)compiler->cache_argw - (sljit_uw)argw) <= (sljit_uw)max_delta) {
1548 SLJIT_ASSERT(!(inp_flags & WRITE_BACK));
1549 argw = compiler->cache_argw - argw;
1550 GETPUT_ARG_DATA_TRANSFER(0, 0, reg, TMP_REG3, argw);
1551 return SLJIT_SUCCESS;
1552 }
1553
1554 if ((compiler->cache_arg & SLJIT_IMM) && compiler->cache_argw == argw) {
1555 TEST_WRITE_BACK();
1556 EMIT_INSTRUCTION(EMIT_DATA_TRANSFER(inp_flags, 1, inp_flags & WRITE_BACK, reg, arg & 0xf, RM(TMP_REG3) | (max_delta & 0xf00 ? SRC2_IMM : 0)));
1557 return SLJIT_SUCCESS;
1558 }
1559
1560 if (argw == next_argw && (next_arg & SLJIT_MEM)) {
1561 SLJIT_ASSERT(inp_flags & LOAD_DATA);
1562 FAIL_IF(load_immediate(compiler, TMP_REG3, argw));
1563
1564 compiler->cache_arg = SLJIT_IMM;
1565 compiler->cache_argw = argw;
1566
1567 TEST_WRITE_BACK();
1568 EMIT_INSTRUCTION(EMIT_DATA_TRANSFER(inp_flags, 1, inp_flags & WRITE_BACK, reg, arg & 0xf, RM(TMP_REG3) | (max_delta & 0xf00 ? SRC2_IMM : 0)));
1569 return SLJIT_SUCCESS;
1570 }
1571
1572 if (arg == next_arg && !(inp_flags & WRITE_BACK) && ((sljit_uw)argw - (sljit_uw)next_argw <= (sljit_uw)max_delta || (sljit_uw)next_argw - (sljit_uw)argw <= (sljit_uw)max_delta)) {
1573 SLJIT_ASSERT(inp_flags & LOAD_DATA);
1574 FAIL_IF(load_immediate(compiler, TMP_REG3, argw));
1575 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(ADD_DP, 0, TMP_REG3, TMP_REG3, reg_map[arg & 0xf]));
1576
1577 compiler->cache_arg = arg;
1578 compiler->cache_argw = argw;
1579
1580 GETPUT_ARG_DATA_TRANSFER(1, 0, reg, TMP_REG3, 0);
1581 return SLJIT_SUCCESS;
1582 }
1583
1584 FAIL_IF(load_immediate(compiler, tmp_r, argw));
1585 EMIT_INSTRUCTION(EMIT_DATA_TRANSFER(inp_flags, 1, inp_flags & WRITE_BACK, reg, arg & 0xf, reg_map[tmp_r] | (max_delta & 0xf00 ? SRC2_IMM : 0)));
1586 return SLJIT_SUCCESS;
1587 }
1588
1589 static int emit_op(struct sljit_compiler *compiler, int op, int inp_flags,
1590 int dst, sljit_w dstw,
1591 int src1, sljit_w src1w,
1592 int src2, sljit_w src2w)
1593 {
1594 /* arg1 goes to TMP_REG1 or src reg
1595 arg2 goes to TMP_REG2, imm or src reg
1596 TMP_REG3 can be used for caching
1597 result goes to TMP_REG2, so put result can use TMP_REG1 and TMP_REG3. */
1598
1599 /* We prefers register and simple consts. */
1600 int dst_r;
1601 int src1_r;
1602 int src2_r = 0;
1603 int sugg_src2_r = TMP_REG2;
1604 int flags = GET_FLAGS(op) ? SET_FLAGS : 0;
1605
1606 compiler->cache_arg = 0;
1607 compiler->cache_argw = 0;
1608
1609 /* Destination check. */
1610 if (dst >= SLJIT_TEMPORARY_REG1 && dst <= TMP_REG3) {
1611 dst_r = dst;
1612 flags |= REG_DEST;
1613 if (op >= SLJIT_MOV && op <= SLJIT_MOVU_SI)
1614 sugg_src2_r = dst_r;
1615 }
1616 else if (dst == SLJIT_UNUSED) {
1617 if (op >= SLJIT_MOV && op <= SLJIT_MOVU_SI && !(src2 & SLJIT_MEM))
1618 return SLJIT_SUCCESS;
1619 dst_r = TMP_REG2;
1620 }
1621 else {
1622 SLJIT_ASSERT(dst & SLJIT_MEM);
1623 if (getput_arg_fast(compiler, inp_flags | ARG_TEST, TMP_REG2, dst, dstw)) {
1624 flags |= FAST_DEST;
1625 dst_r = TMP_REG2;
1626 }
1627 else {
1628 flags |= SLOW_DEST;
1629 dst_r = 0;
1630 }
1631 }
1632
1633 /* Source 1. */
1634 if (src1 >= SLJIT_TEMPORARY_REG1 && src1 <= TMP_REG3)
1635 src1_r = src1;
1636 else if (src2 >= SLJIT_TEMPORARY_REG1 && src2 <= TMP_REG3) {
1637 flags |= ARGS_SWAPPED;
1638 src1_r = src2;
1639 src2 = src1;
1640 src2w = src1w;
1641 }
1642 else {
1643 if ((inp_flags & ALLOW_ANY_IMM) && (src1 & SLJIT_IMM)) {
1644 /* The second check will generate a hit. */
1645 src2_r = get_immediate(src1w);
1646 if (src2_r) {
1647 flags |= ARGS_SWAPPED;
1648 src1 = src2;
1649 src1w = src2w;
1650 }
1651 if (inp_flags & ALLOW_INV_IMM) {
1652 src2_r = get_immediate(~src1w);
1653 if (src2_r) {
1654 flags |= ARGS_SWAPPED | INV_IMM;
1655 src1 = src2;
1656 src1w = src2w;
1657 }
1658 }
1659 }
1660
1661 src1_r = 0;
1662 if (getput_arg_fast(compiler, inp_flags | LOAD_DATA, TMP_REG1, src1, src1w)) {
1663 FAIL_IF(compiler->error);
1664 src1_r = TMP_REG1;
1665 }
1666 }
1667
1668 /* Source 2. */
1669 if (src2_r == 0) {
1670 if (src2 >= SLJIT_TEMPORARY_REG1 && src2 <= TMP_REG3) {
1671 src2_r = src2;
1672 flags |= REG_SOURCE;
1673 if (!(flags & REG_DEST) && op >= SLJIT_MOV && op <= SLJIT_MOVU_SI)
1674 dst_r = src2_r;
1675 }
1676 else do { /* do { } while(0) is used because of breaks. */
1677 if ((inp_flags & ALLOW_ANY_IMM) && (src2 & SLJIT_IMM)) {
1678 src2_r = get_immediate(src2w);
1679 if (src2_r)
1680 break;
1681 if (inp_flags & ALLOW_INV_IMM) {
1682 src2_r = get_immediate(~src2w);
1683 if (src2_r) {
1684 flags |= INV_IMM;
1685 break;
1686 }
1687 }
1688 }
1689
1690 /* src2_r is 0. */
1691 if (getput_arg_fast(compiler, inp_flags | LOAD_DATA, sugg_src2_r, src2, src2w)) {
1692 FAIL_IF(compiler->error);
1693 src2_r = sugg_src2_r;
1694 }
1695 } while (0);
1696 }
1697
1698 /* src1_r, src2_r and dst_r can be zero (=unprocessed) or non-zero.
1699 If they are zero, they must not be registers. */
1700 if (src1_r == 0 && src2_r == 0 && dst_r == 0) {
1701 if (!can_cache(src1, src1w, src2, src2w) && can_cache(src1, src1w, dst, dstw)) {
1702 SLJIT_ASSERT(!(flags & ARGS_SWAPPED));
1703 flags |= ARGS_SWAPPED;
1704 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, TMP_REG1, src2, src2w, src1, src1w));
1705 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, TMP_REG2, src1, src1w, dst, dstw));
1706 }
1707 else {
1708 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, TMP_REG1, src1, src1w, src2, src2w));
1709 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, TMP_REG2, src2, src2w, dst, dstw));
1710 }
1711 src1_r = TMP_REG1;
1712 src2_r = TMP_REG2;
1713 }
1714 else if (src1_r == 0 && src2_r == 0) {
1715 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, TMP_REG1, src1, src1w, src2, src2w));
1716 src1_r = TMP_REG1;
1717 }
1718 else if (src1_r == 0 && dst_r == 0) {
1719 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, TMP_REG1, src1, src1w, dst, dstw));
1720 src1_r = TMP_REG1;
1721 }
1722 else if (src2_r == 0 && dst_r == 0) {
1723 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, sugg_src2_r, src2, src2w, dst, dstw));
1724 src2_r = sugg_src2_r;
1725 }
1726
1727 if (dst_r == 0)
1728 dst_r = TMP_REG2;
1729
1730 if (src1_r == 0) {
1731 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, TMP_REG1, src1, src1w, 0, 0));
1732 src1_r = TMP_REG1;
1733 }
1734
1735 if (src2_r == 0) {
1736 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, sugg_src2_r, src2, src2w, 0, 0));
1737 src2_r = sugg_src2_r;
1738 }
1739
1740 FAIL_IF(emit_single_op(compiler, op, flags, dst_r, src1_r, src2_r));
1741
1742 if (flags & (FAST_DEST | SLOW_DEST)) {
1743 if (flags & FAST_DEST)
1744 FAIL_IF(getput_arg_fast(compiler, inp_flags, dst_r, dst, dstw));
1745 else
1746 FAIL_IF(getput_arg(compiler, inp_flags, dst_r, dst, dstw, 0, 0));
1747 }
1748 return SLJIT_SUCCESS;
1749 }
1750
1751 int sljit_emit_op0(struct sljit_compiler *compiler, int op)
1752 {
1753 CHECK_ERROR();
1754 check_sljit_emit_op0(compiler, op);
1755
1756 op = GET_OPCODE(op);
1757 switch (op) {
1758 case SLJIT_BREAKPOINT:
1759 EMIT_INSTRUCTION(DEBUGGER);
1760 break;
1761 case SLJIT_NOP:
1762 EMIT_INSTRUCTION(NOP);
1763 break;
1764 }
1765
1766 return SLJIT_SUCCESS;
1767 }
1768
1769 int sljit_emit_op1(struct sljit_compiler *compiler, int op,
1770 int dst, sljit_w dstw,
1771 int src, sljit_w srcw)
1772 {
1773 CHECK_ERROR();
1774 check_sljit_emit_op1(compiler, op, dst, dstw, src, srcw);
1775
1776 switch (GET_OPCODE(op)) {
1777 case SLJIT_MOV:
1778 case SLJIT_MOV_UI:
1779 case SLJIT_MOV_SI:
1780 return emit_op(compiler, SLJIT_MOV, ALLOW_ANY_IMM, dst, dstw, TMP_REG1, 0, src, srcw);
1781
1782 case SLJIT_MOV_UB:
1783 return emit_op(compiler, SLJIT_MOV_UB, ALLOW_ANY_IMM | BYTE_DATA, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (unsigned char)srcw : srcw);
1784
1785 case SLJIT_MOV_SB:
1786 return emit_op(compiler, SLJIT_MOV_SB, ALLOW_ANY_IMM | SIGNED_DATA | BYTE_DATA, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (signed char)srcw : srcw);
1787
1788 case SLJIT_MOV_UH:
1789 return emit_op(compiler, SLJIT_MOV_UH, ALLOW_ANY_IMM | HALF_DATA, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (unsigned short)srcw : srcw);
1790
1791 case SLJIT_MOV_SH:
1792 return emit_op(compiler, SLJIT_MOV_SH, ALLOW_ANY_IMM | SIGNED_DATA | HALF_DATA, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (signed short)srcw : srcw);
1793
1794 case SLJIT_MOVU:
1795 case SLJIT_MOVU_UI:
1796 case SLJIT_MOVU_SI:
1797 return emit_op(compiler, SLJIT_MOV, ALLOW_ANY_IMM | WRITE_BACK, dst, dstw, TMP_REG1, 0, src, srcw);
1798
1799 case SLJIT_MOVU_UB:
1800 return emit_op(compiler, SLJIT_MOV_UB, ALLOW_ANY_IMM | BYTE_DATA | WRITE_BACK, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (unsigned char)srcw : srcw);
1801
1802 case SLJIT_MOVU_SB:
1803 return emit_op(compiler, SLJIT_MOV_SB, ALLOW_ANY_IMM | SIGNED_DATA | BYTE_DATA | WRITE_BACK, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (signed char)srcw : srcw);
1804
1805 case SLJIT_MOVU_UH:
1806 return emit_op(compiler, SLJIT_MOV_UH, ALLOW_ANY_IMM | HALF_DATA | WRITE_BACK, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (unsigned short)srcw : srcw);
1807
1808 case SLJIT_MOVU_SH:
1809 return emit_op(compiler, SLJIT_MOV_SH, ALLOW_ANY_IMM | SIGNED_DATA | HALF_DATA | WRITE_BACK, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (signed short)srcw : srcw);
1810
1811 case SLJIT_NOT:
1812 return emit_op(compiler, op, ALLOW_ANY_IMM, dst, dstw, TMP_REG1, 0, src, srcw);
1813
1814 case SLJIT_NEG:
1815 #if (defined SLJIT_VERBOSE && SLJIT_VERBOSE) || (defined SLJIT_DEBUG && SLJIT_DEBUG)
1816 compiler->skip_checks = 1;
1817 #endif
1818 return sljit_emit_op2(compiler, SLJIT_SUB | GET_FLAGS(op), dst, dstw, SLJIT_IMM, 0, src, srcw);
1819
1820 case SLJIT_CLZ:
1821 return emit_op(compiler, op, 0, dst, dstw, TMP_REG1, 0, src, srcw);
1822 }
1823
1824 return SLJIT_SUCCESS;
1825 }
1826
1827 int sljit_emit_op2(struct sljit_compiler *compiler, int op,
1828 int dst, sljit_w dstw,
1829 int src1, sljit_w src1w,
1830 int src2, sljit_w src2w)
1831 {
1832 CHECK_ERROR();
1833 check_sljit_emit_op2(compiler, op, dst, dstw, src1, src1w, src2, src2w);
1834
1835 switch (GET_OPCODE(op)) {
1836 case SLJIT_ADD:
1837 case SLJIT_ADDC:
1838 case SLJIT_SUB:
1839 case SLJIT_SUBC:
1840 case SLJIT_OR:
1841 case SLJIT_XOR:
1842 return emit_op(compiler, op, ALLOW_IMM, dst, dstw, src1, src1w, src2, src2w);
1843
1844 case SLJIT_MUL:
1845 return emit_op(compiler, op, 0, dst, dstw, src1, src1w, src2, src2w);
1846
1847 case SLJIT_AND:
1848 return emit_op(compiler, op, ALLOW_ANY_IMM, dst, dstw, src1, src1w, src2, src2w);
1849
1850 case SLJIT_SHL:
1851 case SLJIT_LSHR:
1852 case SLJIT_ASHR:
1853 if (src2 & SLJIT_IMM) {
1854 compiler->shift_imm = src2w & 0x1f;
1855 return emit_op(compiler, op, 0, dst, dstw, TMP_REG1, 0, src1, src1w);
1856 }
1857 else {
1858 compiler->shift_imm = 0x20;
1859 return emit_op(compiler, op, 0, dst, dstw, src1, src1w, src2, src2w);
1860 }
1861 }
1862
1863 return SLJIT_SUCCESS;
1864 }
1865
1866 /* --------------------------------------------------------------------- */
1867 /* Floating point operators */
1868 /* --------------------------------------------------------------------- */
1869
1870 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
1871
1872 /* 0 - no fpu
1873 1 - vfp */
1874 static int arm_fpu_type = -1;
1875
1876 static void init_compiler()
1877 {
1878 if (arm_fpu_type != -1)
1879 return;
1880
1881 /* TODO: Only the OS can help to determine the correct fpu type. */
1882 arm_fpu_type = 1;
1883 }
1884
1885 int sljit_is_fpu_available(void)
1886 {
1887 if (arm_fpu_type == -1)
1888 init_compiler();
1889 return arm_fpu_type;
1890 }
1891
1892 #else
1893
1894 #define arm_fpu_type 1
1895
1896 int sljit_is_fpu_available(void)
1897 {
1898 /* Always available. */
1899 return 1;
1900 }
1901
1902 #endif
1903
1904 #define EMIT_FPU_DATA_TRANSFER(add, load, base, freg, offs) \
1905 (VSTR | ((add) << 23) | ((load) << 20) | (reg_map[base] << 16) | (freg << 12) | (offs))
1906 #define EMIT_FPU_OPERATION(opcode, dst, src1, src2) \
1907 ((opcode) | ((dst) << 12) | (src1) | ((src2) << 16))
1908
1909 static int emit_fpu_data_transfer(struct sljit_compiler *compiler, int fpu_reg, int load, int arg, sljit_w argw)
1910 {
1911 SLJIT_ASSERT(arg & SLJIT_MEM);
1912
1913 /* Fast loads and stores. */
1914 if ((arg & 0xf) && !(arg & 0xf0) && (argw & 0x3) == 0) {
1915 if (argw >= 0 && argw <= 0x3ff) {
1916 EMIT_INSTRUCTION(EMIT_FPU_DATA_TRANSFER(1, load, arg & 0xf, fpu_reg, argw >> 2));
1917 return SLJIT_SUCCESS;
1918 }
1919 if (argw < 0 && argw >= -0x3ff) {
1920 EMIT_INSTRUCTION(EMIT_FPU_DATA_TRANSFER(0, load, arg & 0xf, fpu_reg, (-argw) >> 2));
1921 return SLJIT_SUCCESS;
1922 }
1923 if (argw >= 0 && argw <= 0x3ffff) {
1924 SLJIT_ASSERT(get_immediate(argw & 0x3fc00));
1925 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(ADD_DP, 0, TMP_REG1, arg & 0xf, get_immediate(argw & 0x3fc00)));
1926 argw &= 0x3ff;
1927 EMIT_INSTRUCTION(EMIT_FPU_DATA_TRANSFER(1, load, TMP_REG1, fpu_reg, argw >> 2));
1928 return SLJIT_SUCCESS;
1929 }
1930 if (argw < 0 && argw >= -0x3ffff) {
1931 argw = -argw;
1932 SLJIT_ASSERT(get_immediate(argw & 0x3fc00));
1933 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(SUB_DP, 0, TMP_REG1, arg & 0xf, get_immediate(argw & 0x3fc00)));
1934 argw &= 0x3ff;
1935 EMIT_INSTRUCTION(EMIT_FPU_DATA_TRANSFER(0, load, TMP_REG1, fpu_reg, argw >> 2));
1936 return SLJIT_SUCCESS;
1937 }
1938 }
1939
1940 if (arg & 0xf0) {
1941 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(ADD_DP, 0, TMP_REG1, arg & 0xf, RM((arg >> 4) & 0xf) | ((argw & 0x3) << 7)));
1942 EMIT_INSTRUCTION(EMIT_FPU_DATA_TRANSFER(1, load, TMP_REG1, fpu_reg, 0));
1943 return SLJIT_SUCCESS;
1944 }
1945
1946 if (compiler->cache_arg == arg && ((argw - compiler->cache_argw) & 0x3) == 0) {
1947 if (((sljit_uw)argw - (sljit_uw)compiler->cache_argw) <= 0x3ff) {
1948 EMIT_INSTRUCTION(EMIT_FPU_DATA_TRANSFER(1, load, TMP_REG3, fpu_reg, (argw - compiler->cache_argw) >> 2));
1949 return SLJIT_SUCCESS;
1950 }
1951 if (((sljit_uw)compiler->cache_argw - (sljit_uw)argw) <= 0x3ff) {
1952 EMIT_INSTRUCTION(EMIT_FPU_DATA_TRANSFER(0, load, TMP_REG3, fpu_reg, (compiler->cache_argw - argw) >> 2));
1953 return SLJIT_SUCCESS;
1954 }
1955 }
1956
1957 compiler->cache_arg = arg;
1958 compiler->cache_argw = argw;
1959 if (arg & 0xf) {
1960 FAIL_IF(load_immediate(compiler, TMP_REG1, argw));
1961 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(ADD_DP, 0, TMP_REG3, arg & 0xf, reg_map[TMP_REG1]));
1962 }
1963 else
1964 FAIL_IF(load_immediate(compiler, TMP_REG3, argw));
1965
1966 EMIT_INSTRUCTION(EMIT_FPU_DATA_TRANSFER(1, load, TMP_REG3, fpu_reg, 0));
1967 return SLJIT_SUCCESS;
1968 }
1969
1970 int sljit_emit_fop1(struct sljit_compiler *compiler, int op,
1971 int dst, sljit_w dstw,
1972 int src, sljit_w srcw)
1973 {
1974 int dst_freg;
1975
1976 CHECK_ERROR();
1977 check_sljit_emit_fop1(compiler, op, dst, dstw, src, srcw);
1978
1979 compiler->cache_arg = 0;
1980 compiler->cache_argw = 0;
1981
1982 if (GET_OPCODE(op) == SLJIT_FCMP) {
1983 if (dst > SLJIT_FLOAT_REG4) {
1984 FAIL_IF(emit_fpu_data_transfer(compiler, TMP_FREG1, 1, dst, dstw));
1985 dst = TMP_FREG1;
1986 }
1987 if (src > SLJIT_FLOAT_REG4) {
1988 FAIL_IF(emit_fpu_data_transfer(compiler, TMP_FREG2, 1, src, srcw));
1989 src = TMP_FREG2;
1990 }
1991 EMIT_INSTRUCTION(VCMP_F64 | (dst << 12) | src);
1992 EMIT_INSTRUCTION(VMRS);
1993 return SLJIT_SUCCESS;
1994 }
1995
1996 dst_freg = (dst > SLJIT_FLOAT_REG4) ? TMP_FREG1 : dst;
1997
1998 if (src > SLJIT_FLOAT_REG4) {
1999 FAIL_IF(emit_fpu_data_transfer(compiler, dst_freg, 1, src, srcw));
2000 src = dst_freg;
2001 }
2002
2003 switch (op) {
2004 case SLJIT_FMOV:
2005 if (src != dst_freg && dst_freg != TMP_FREG1)
2006 EMIT_INSTRUCTION(EMIT_FPU_OPERATION(VMOV_F64, dst_freg, src, 0));
2007 break;
2008 case SLJIT_FNEG:
2009 EMIT_INSTRUCTION(EMIT_FPU_OPERATION(VNEG_F64, dst_freg, src, 0));
2010 break;
2011 case SLJIT_FABS:
2012 EMIT_INSTRUCTION(EMIT_FPU_OPERATION(VABS_F64, dst_freg, src, 0));
2013 break;
2014 }
2015
2016 if (dst_freg == TMP_FREG1)
2017 FAIL_IF(emit_fpu_data_transfer(compiler, src, 0, dst, dstw));
2018
2019 return SLJIT_SUCCESS;
2020 }
2021
2022 int sljit_emit_fop2(struct sljit_compiler *compiler, int op,
2023 int dst, sljit_w dstw,
2024 int src1, sljit_w src1w,
2025 int src2, sljit_w src2w)
2026 {
2027 int dst_freg;
2028
2029 CHECK_ERROR();
2030 check_sljit_emit_fop2(compiler, op, dst, dstw, src1, src1w, src2, src2w);
2031
2032 compiler->cache_arg = 0;
2033 compiler->cache_argw = 0;
2034
2035 dst_freg = (dst > SLJIT_FLOAT_REG4) ? TMP_FREG1 : dst;
2036
2037 if (src2 > SLJIT_FLOAT_REG4) {
2038 FAIL_IF(emit_fpu_data_transfer(compiler, TMP_FREG2, 1, src2, src2w));
2039 src2 = TMP_FREG2;
2040 }
2041
2042 if (src1 > SLJIT_FLOAT_REG4) {
2043 FAIL_IF(emit_fpu_data_transfer(compiler, TMP_FREG1, 1, src1, src1w));
2044 src1 = TMP_FREG1;
2045 }
2046
2047 switch (op) {
2048 case SLJIT_FADD:
2049 EMIT_INSTRUCTION(EMIT_FPU_OPERATION(VADD_F64, dst_freg, src2, src1));
2050 break;
2051
2052 case SLJIT_FSUB:
2053 EMIT_INSTRUCTION(EMIT_FPU_OPERATION(VSUB_F64, dst_freg, src2, src1));
2054 break;
2055
2056 case SLJIT_FMUL:
2057 EMIT_INSTRUCTION(EMIT_FPU_OPERATION(VMUL_F64, dst_freg, src2, src1));
2058 break;
2059
2060 case SLJIT_FDIV:
2061 EMIT_INSTRUCTION(EMIT_FPU_OPERATION(VDIV_F64, dst_freg, src2, src1));
2062 break;
2063 }
2064
2065 if (dst_freg == TMP_FREG1)
2066 FAIL_IF(emit_fpu_data_transfer(compiler, TMP_FREG1, 0, dst, dstw));
2067
2068 return SLJIT_SUCCESS;
2069 }
2070
2071 /* --------------------------------------------------------------------- */
2072 /* Other instructions */
2073 /* --------------------------------------------------------------------- */
2074
2075 int sljit_emit_fast_enter(struct sljit_compiler *compiler, int dst, sljit_w dstw, int args, int temporaries, int generals, int local_size)
2076 {
2077 int size;
2078
2079 CHECK_ERROR();
2080 check_sljit_emit_fast_enter(compiler, dst, dstw, args, temporaries, generals, local_size);
2081
2082 compiler->temporaries = temporaries;
2083 compiler->generals = generals;
2084
2085 size = (1 + generals) * sizeof(sljit_uw);
2086 if (temporaries >= 4)
2087 size += (temporaries - 3) * sizeof(sljit_uw);
2088 local_size += size;
2089 local_size = (local_size + 7) & ~7;
2090 local_size -= size;
2091 compiler->local_size = local_size;
2092
2093 if (dst >= SLJIT_TEMPORARY_REG1 && dst <= SLJIT_NO_REGISTERS)
2094 return push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, dst, SLJIT_UNUSED, RM(TMP_REG3)));
2095 else if (dst & SLJIT_MEM) {
2096 if (getput_arg_fast(compiler, WORD_DATA, TMP_REG3, dst, dstw))
2097 return compiler->error;
2098 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, TMP_REG2, SLJIT_UNUSED, RM(TMP_REG3)));
2099 compiler->cache_arg = 0;
2100 compiler->cache_argw = 0;
2101 return getput_arg(compiler, WORD_DATA, TMP_REG2, dst, dstw, 0, 0);
2102 }
2103
2104 return SLJIT_SUCCESS;
2105 }
2106
2107 int sljit_emit_fast_return(struct sljit_compiler *compiler, int src, sljit_w srcw)
2108 {
2109 CHECK_ERROR();
2110 check_sljit_emit_fast_return(compiler, src, srcw);
2111
2112 if (src >= SLJIT_TEMPORARY_REG1 && src <= SLJIT_NO_REGISTERS)
2113 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, TMP_REG3, SLJIT_UNUSED, RM(src)));
2114 else if (src & SLJIT_MEM) {
2115 if (getput_arg_fast(compiler, WORD_DATA | LOAD_DATA, TMP_REG3, src, srcw))
2116 FAIL_IF(compiler->error);
2117 else {
2118 compiler->cache_arg = 0;
2119 compiler->cache_argw = 0;
2120 FAIL_IF(getput_arg(compiler, WORD_DATA | LOAD_DATA, TMP_REG2, src, srcw, 0, 0));
2121 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, TMP_REG3, SLJIT_UNUSED, RM(TMP_REG2)));
2122 }
2123 }
2124 else if (src & SLJIT_IMM)
2125 FAIL_IF(load_immediate(compiler, TMP_REG3, srcw));
2126 return push_inst(compiler, BLX | RM(TMP_REG3));
2127 }
2128
2129 /* --------------------------------------------------------------------- */
2130 /* Conditional instructions */
2131 /* --------------------------------------------------------------------- */
2132
2133 static sljit_uw get_cc(int type)
2134 {
2135 switch (type) {
2136 case SLJIT_C_EQUAL:
2137 case SLJIT_C_MUL_NOT_OVERFLOW:
2138 case SLJIT_C_FLOAT_EQUAL:
2139 return 0x00000000;
2140
2141 case SLJIT_C_NOT_EQUAL:
2142 case SLJIT_C_MUL_OVERFLOW:
2143 case SLJIT_C_FLOAT_NOT_EQUAL:
2144 return 0x10000000;
2145
2146 case SLJIT_C_LESS:
2147 case SLJIT_C_FLOAT_LESS:
2148 return 0x30000000;
2149
2150 case SLJIT_C_GREATER_EQUAL:
2151 case SLJIT_C_FLOAT_GREATER_EQUAL:
2152 return 0x20000000;
2153
2154 case SLJIT_C_GREATER:
2155 case SLJIT_C_FLOAT_GREATER:
2156 return 0x80000000;
2157
2158 case SLJIT_C_LESS_EQUAL:
2159 case SLJIT_C_FLOAT_LESS_EQUAL:
2160 return 0x90000000;
2161
2162 case SLJIT_C_SIG_LESS:
2163 return 0xb0000000;
2164
2165 case SLJIT_C_SIG_GREATER_EQUAL:
2166 return 0xa0000000;
2167
2168 case SLJIT_C_SIG_GREATER:
2169 return 0xc0000000;
2170
2171 case SLJIT_C_SIG_LESS_EQUAL:
2172 return 0xd0000000;
2173
2174 case SLJIT_C_OVERFLOW:
2175 case SLJIT_C_FLOAT_NAN:
2176 return 0x60000000;
2177
2178 case SLJIT_C_NOT_OVERFLOW:
2179 case SLJIT_C_FLOAT_NOT_NAN:
2180 return 0x70000000;
2181
2182 default: /* SLJIT_JUMP */
2183 return 0xe0000000;
2184 }
2185 }
2186
2187 struct sljit_label* sljit_emit_label(struct sljit_compiler *compiler)
2188 {
2189 struct sljit_label *label;
2190
2191 CHECK_ERROR_PTR();
2192 check_sljit_emit_label(compiler);
2193
2194 if (compiler->last_label && compiler->last_label->size == compiler->size)
2195 return compiler->last_label;
2196
2197 label = (struct sljit_label*)ensure_abuf(compiler, sizeof(struct sljit_label));
2198 PTR_FAIL_IF(!label);
2199 set_label(label, compiler);
2200 return label;
2201 }
2202
2203 struct sljit_jump* sljit_emit_jump(struct sljit_compiler *compiler, int type)
2204 {
2205 struct sljit_jump *jump;
2206
2207 CHECK_ERROR_PTR();
2208 check_sljit_emit_jump(compiler, type);
2209
2210 jump = (struct sljit_jump*)ensure_abuf(compiler, sizeof(struct sljit_jump));
2211 PTR_FAIL_IF(!jump);
2212 set_jump(jump, compiler, type & SLJIT_REWRITABLE_JUMP);
2213 type &= 0xff;
2214
2215 /* In ARM, we don't need to touch the arguments. */
2216 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
2217 if (type >= SLJIT_CALL0)
2218 PTR_FAIL_IF(prepare_blx(compiler));
2219 PTR_FAIL_IF(push_inst_with_unique_literal(compiler, ((EMIT_DATA_TRANSFER(WORD_DATA | LOAD_DATA, 1, 0,
2220 type <= SLJIT_JUMP ? TMP_PC : TMP_REG1, TMP_PC, 0)) & ~COND_MASK) | get_cc(type), 0));
2221
2222 if (jump->flags & SLJIT_REWRITABLE_JUMP) {
2223 jump->addr = compiler->size;
2224 compiler->patches++;
2225 }
2226
2227 if (type >= SLJIT_CALL0) {
2228 jump->flags |= IS_BL;
2229 PTR_FAIL_IF(emit_blx(compiler));
2230 }
2231
2232 if (!(jump->flags & SLJIT_REWRITABLE_JUMP))
2233 jump->addr = compiler->size;
2234 #else
2235 if (type >= SLJIT_CALL0)
2236 jump->flags |= IS_BL;
2237 PTR_FAIL_IF(emit_imm(compiler, TMP_REG1, 0));
2238 PTR_FAIL_IF(push_inst(compiler, (((type < SLJIT_CALL0 ? BX : BLX) | RM(TMP_REG1)) & ~COND_MASK) | get_cc(type)));
2239 jump->addr = compiler->size;
2240 #endif
2241 return jump;
2242 }
2243
2244 int sljit_emit_ijump(struct sljit_compiler *compiler, int type, int src, sljit_w srcw)
2245 {
2246 struct sljit_jump *jump;
2247
2248 CHECK_ERROR();
2249 check_sljit_emit_ijump(compiler, type, src, srcw);
2250
2251 /* In ARM, we don't need to touch the arguments. */
2252 if (src & SLJIT_IMM) {
2253 jump = (struct sljit_jump*)ensure_abuf(compiler, sizeof(struct sljit_jump));
2254 FAIL_IF(!jump);
2255 set_jump(jump, compiler, JUMP_ADDR | ((type >= SLJIT_CALL0) ? IS_BL : 0));
2256 jump->u.target = srcw;
2257
2258 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
2259 if (type >= SLJIT_CALL0)
2260 FAIL_IF(prepare_blx(compiler));
2261 FAIL_IF(push_inst_with_unique_literal(compiler, EMIT_DATA_TRANSFER(WORD_DATA | LOAD_DATA, 1, 0, type <= SLJIT_JUMP ? TMP_PC : TMP_REG1, TMP_PC, 0), 0));
2262 if (type >= SLJIT_CALL0)
2263 FAIL_IF(emit_blx(compiler));
2264 #else
2265 FAIL_IF(emit_imm(compiler, TMP_REG1, 0));
2266 FAIL_IF(push_inst(compiler, (type < SLJIT_CALL0 ? BX : BLX) | RM(TMP_REG1)));
2267 #endif
2268 jump->addr = compiler->size;
2269 }
2270 else {
2271 if (src >= SLJIT_TEMPORARY_REG1 && src <= SLJIT_NO_REGISTERS)
2272 return push_inst(compiler, (type <= SLJIT_JUMP ? BX : BLX) | RM(src));
2273
2274 SLJIT_ASSERT(src & SLJIT_MEM);
2275 FAIL_IF(emit_op(compiler, SLJIT_MOV, ALLOW_ANY_IMM, TMP_REG2, 0, TMP_REG1, 0, src, srcw));
2276 return push_inst(compiler, (type <= SLJIT_JUMP ? BX : BLX) | RM(TMP_REG2));
2277 }
2278
2279 return SLJIT_SUCCESS;
2280 }
2281
2282 int sljit_emit_cond_value(struct sljit_compiler *compiler, int op, int dst, sljit_w dstw, int type)
2283 {
2284 int reg;
2285 sljit_uw cc;
2286
2287 CHECK_ERROR();
2288 check_sljit_emit_cond_value(compiler, op, dst, dstw, type);
2289
2290 if (dst == SLJIT_UNUSED)
2291 return SLJIT_SUCCESS;
2292
2293 cc = get_cc(type);
2294 if (GET_OPCODE(op) == SLJIT_OR) {
2295 if (dst >= SLJIT_TEMPORARY_REG1 && dst <= SLJIT_NO_REGISTERS) {
2296 EMIT_INSTRUCTION((EMIT_DATA_PROCESS_INS(ORR_DP, 0, dst, dst, SRC2_IMM | 1) & ~COND_MASK) | cc);
2297 if (op & SLJIT_SET_E)
2298 return push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, SET_FLAGS, TMP_REG1, SLJIT_UNUSED, RM(dst)));
2299 return SLJIT_SUCCESS;
2300 }
2301
2302 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, TMP_REG1, SLJIT_UNUSED, SRC2_IMM | 0));
2303 EMIT_INSTRUCTION((EMIT_DATA_PROCESS_INS(MOV_DP, 0, TMP_REG1, SLJIT_UNUSED, SRC2_IMM | 1) & ~COND_MASK) | cc);
2304 #if (defined SLJIT_VERBOSE && SLJIT_VERBOSE) || (defined SLJIT_DEBUG && SLJIT_DEBUG)
2305 compiler->skip_checks = 1;
2306 #endif
2307 return emit_op(compiler, op, ALLOW_IMM, dst, dstw, TMP_REG1, 0, dst, dstw);
2308 }
2309
2310 reg = (dst >= SLJIT_TEMPORARY_REG1 && dst <= SLJIT_NO_REGISTERS) ? dst : TMP_REG2;
2311
2312 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, reg, SLJIT_UNUSED, SRC2_IMM | 0));
2313 EMIT_INSTRUCTION((EMIT_DATA_PROCESS_INS(MOV_DP, 0, reg, SLJIT_UNUSED, SRC2_IMM | 1) & ~COND_MASK) | cc);
2314
2315 if (reg == TMP_REG2)
2316 return emit_op(compiler, SLJIT_MOV, ALLOW_ANY_IMM, dst, dstw, TMP_REG1, 0, TMP_REG2, 0);
2317 return SLJIT_SUCCESS;
2318 }
2319
2320 struct sljit_const* sljit_emit_const(struct sljit_compiler *compiler, int dst, sljit_w dstw, sljit_w init_value)
2321 {
2322 struct sljit_const *const_;
2323 int reg;
2324
2325 CHECK_ERROR_PTR();
2326 check_sljit_emit_const(compiler, dst, dstw, init_value);
2327
2328 const_ = (struct sljit_const*)ensure_abuf(compiler, sizeof(struct sljit_const));
2329 PTR_FAIL_IF(!const_);
2330
2331 reg = (dst >= SLJIT_TEMPORARY_REG1 && dst <= SLJIT_NO_REGISTERS) ? dst : TMP_REG2;
2332
2333 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
2334 PTR_FAIL_IF(push_inst_with_unique_literal(compiler, EMIT_DATA_TRANSFER(WORD_DATA | LOAD_DATA, 1, 0, reg, TMP_PC, 0), init_value));
2335 compiler->patches++;
2336 #else
2337 PTR_FAIL_IF(emit_imm(compiler, reg, init_value));
2338 #endif
2339 set_const(const_, compiler);
2340
2341 if (reg == TMP_REG2 && dst != SLJIT_UNUSED)
2342 if (emit_op(compiler, SLJIT_MOV, ALLOW_ANY_IMM, dst, dstw, TMP_REG1, 0, TMP_REG2, 0))
2343 return NULL;
2344 return const_;
2345 }
2346
2347 void sljit_set_jump_addr(sljit_uw addr, sljit_uw new_addr)
2348 {
2349 inline_set_jump_addr(addr, new_addr, 1);
2350 }
2351
2352 void sljit_set_const(sljit_uw addr, sljit_w new_constant)
2353 {
2354 inline_set_const(addr, new_constant, 1);
2355 }

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