/[pcre]/code/trunk/sljit/sljitNativeARM_v5.c
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Contents of /code/trunk/sljit/sljitNativeARM_v5.c

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Revision 1453 - (show annotations)
Thu Jan 30 06:10:21 2014 UTC (5 years, 6 months ago) by zherczeg
File MIME type: text/plain
File size: 77024 byte(s)
JIT compiler update.
1 /*
2 * Stack-less Just-In-Time compiler
3 *
4 * Copyright 2009-2012 Zoltan Herczeg (hzmester@freemail.hu). All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without modification, are
7 * permitted provided that the following conditions are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright notice, this list of
10 * conditions and the following disclaimer.
11 *
12 * 2. Redistributions in binary form must reproduce the above copyright notice, this list
13 * of conditions and the following disclaimer in the documentation and/or other materials
14 * provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER(S) AND CONTRIBUTORS ``AS IS'' AND ANY
17 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
19 * SHALL THE COPYRIGHT HOLDER(S) OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
21 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
22 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
24 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 */
26
27 SLJIT_API_FUNC_ATTRIBUTE SLJIT_CONST char* sljit_get_platform_name(void)
28 {
29 #if (defined SLJIT_CONFIG_ARM_V7 && SLJIT_CONFIG_ARM_V7)
30 return "ARMv7" SLJIT_CPUINFO;
31 #elif (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
32 return "ARMv5" SLJIT_CPUINFO;
33 #else
34 #error "Internal error: Unknown ARM architecture"
35 #endif
36 }
37
38 /* Last register + 1. */
39 #define TMP_REG1 (SLJIT_NO_REGISTERS + 1)
40 #define TMP_REG2 (SLJIT_NO_REGISTERS + 2)
41 #define TMP_REG3 (SLJIT_NO_REGISTERS + 3)
42 #define TMP_PC (SLJIT_NO_REGISTERS + 4)
43
44 #define TMP_FREG1 (0)
45 #define TMP_FREG2 (SLJIT_FLOAT_REG6 + 1)
46
47 /* In ARM instruction words.
48 Cache lines are usually 32 byte aligned. */
49 #define CONST_POOL_ALIGNMENT 8
50 #define CONST_POOL_EMPTY 0xffffffff
51
52 #define ALIGN_INSTRUCTION(ptr) \
53 (sljit_uw*)(((sljit_uw)(ptr) + (CONST_POOL_ALIGNMENT * sizeof(sljit_uw)) - 1) & ~((CONST_POOL_ALIGNMENT * sizeof(sljit_uw)) - 1))
54 #define MAX_DIFFERENCE(max_diff) \
55 (((max_diff) / (sljit_si)sizeof(sljit_uw)) - (CONST_POOL_ALIGNMENT - 1))
56
57 /* See sljit_emit_enter and sljit_emit_op0 if you want to change them. */
58 static SLJIT_CONST sljit_ub reg_map[SLJIT_NO_REGISTERS + 5] = {
59 0, 0, 1, 2, 10, 11, 4, 5, 6, 7, 8, 13, 3, 12, 14, 15
60 };
61
62 #define RM(rm) (reg_map[rm])
63 #define RD(rd) (reg_map[rd] << 12)
64 #define RN(rn) (reg_map[rn] << 16)
65
66 /* --------------------------------------------------------------------- */
67 /* Instrucion forms */
68 /* --------------------------------------------------------------------- */
69
70 /* The instruction includes the AL condition.
71 INST_NAME - CONDITIONAL remove this flag. */
72 #define COND_MASK 0xf0000000
73 #define CONDITIONAL 0xe0000000
74 #define PUSH_POOL 0xff000000
75
76 /* DP - Data Processing instruction (use with EMIT_DATA_PROCESS_INS). */
77 #define ADC_DP 0x5
78 #define ADD_DP 0x4
79 #define AND_DP 0x0
80 #define B 0xea000000
81 #define BIC_DP 0xe
82 #define BL 0xeb000000
83 #define BLX 0xe12fff30
84 #define BX 0xe12fff10
85 #define CLZ 0xe16f0f10
86 #define CMP_DP 0xa
87 #define BKPT 0xe1200070
88 #define EOR_DP 0x1
89 #define MOV_DP 0xd
90 #define MUL 0xe0000090
91 #define MVN_DP 0xf
92 #define NOP 0xe1a00000
93 #define ORR_DP 0xc
94 #define PUSH 0xe92d0000
95 #define POP 0xe8bd0000
96 #define RSB_DP 0x3
97 #define RSC_DP 0x7
98 #define SBC_DP 0x6
99 #define SMULL 0xe0c00090
100 #define SUB_DP 0x2
101 #define UMULL 0xe0800090
102 #define VABS_F32 0xeeb00ac0
103 #define VADD_F32 0xee300a00
104 #define VCMP_F32 0xeeb40a40
105 #define VDIV_F32 0xee800a00
106 #define VMOV_F32 0xeeb00a40
107 #define VMRS 0xeef1fa10
108 #define VMUL_F32 0xee200a00
109 #define VNEG_F32 0xeeb10a40
110 #define VSTR_F32 0xed000a00
111 #define VSUB_F32 0xee300a40
112
113 #if (defined SLJIT_CONFIG_ARM_V7 && SLJIT_CONFIG_ARM_V7)
114 /* Arm v7 specific instructions. */
115 #define MOVW 0xe3000000
116 #define MOVT 0xe3400000
117 #define SXTB 0xe6af0070
118 #define SXTH 0xe6bf0070
119 #define UXTB 0xe6ef0070
120 #define UXTH 0xe6ff0070
121 #endif
122
123 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
124
125 static sljit_si push_cpool(struct sljit_compiler *compiler)
126 {
127 /* Pushing the constant pool into the instruction stream. */
128 sljit_uw* inst;
129 sljit_uw* cpool_ptr;
130 sljit_uw* cpool_end;
131 sljit_si i;
132
133 /* The label could point the address after the constant pool. */
134 if (compiler->last_label && compiler->last_label->size == compiler->size)
135 compiler->last_label->size += compiler->cpool_fill + (CONST_POOL_ALIGNMENT - 1) + 1;
136
137 SLJIT_ASSERT(compiler->cpool_fill > 0 && compiler->cpool_fill <= CPOOL_SIZE);
138 inst = (sljit_uw*)ensure_buf(compiler, sizeof(sljit_uw));
139 FAIL_IF(!inst);
140 compiler->size++;
141 *inst = 0xff000000 | compiler->cpool_fill;
142
143 for (i = 0; i < CONST_POOL_ALIGNMENT - 1; i++) {
144 inst = (sljit_uw*)ensure_buf(compiler, sizeof(sljit_uw));
145 FAIL_IF(!inst);
146 compiler->size++;
147 *inst = 0;
148 }
149
150 cpool_ptr = compiler->cpool;
151 cpool_end = cpool_ptr + compiler->cpool_fill;
152 while (cpool_ptr < cpool_end) {
153 inst = (sljit_uw*)ensure_buf(compiler, sizeof(sljit_uw));
154 FAIL_IF(!inst);
155 compiler->size++;
156 *inst = *cpool_ptr++;
157 }
158 compiler->cpool_diff = CONST_POOL_EMPTY;
159 compiler->cpool_fill = 0;
160 return SLJIT_SUCCESS;
161 }
162
163 static sljit_si push_inst(struct sljit_compiler *compiler, sljit_uw inst)
164 {
165 sljit_uw* ptr;
166
167 if (SLJIT_UNLIKELY(compiler->cpool_diff != CONST_POOL_EMPTY && compiler->size - compiler->cpool_diff >= MAX_DIFFERENCE(4092)))
168 FAIL_IF(push_cpool(compiler));
169
170 ptr = (sljit_uw*)ensure_buf(compiler, sizeof(sljit_uw));
171 FAIL_IF(!ptr);
172 compiler->size++;
173 *ptr = inst;
174 return SLJIT_SUCCESS;
175 }
176
177 static sljit_si push_inst_with_literal(struct sljit_compiler *compiler, sljit_uw inst, sljit_uw literal)
178 {
179 sljit_uw* ptr;
180 sljit_uw cpool_index = CPOOL_SIZE;
181 sljit_uw* cpool_ptr;
182 sljit_uw* cpool_end;
183 sljit_ub* cpool_unique_ptr;
184
185 if (SLJIT_UNLIKELY(compiler->cpool_diff != CONST_POOL_EMPTY && compiler->size - compiler->cpool_diff >= MAX_DIFFERENCE(4092)))
186 FAIL_IF(push_cpool(compiler));
187 else if (compiler->cpool_fill > 0) {
188 cpool_ptr = compiler->cpool;
189 cpool_end = cpool_ptr + compiler->cpool_fill;
190 cpool_unique_ptr = compiler->cpool_unique;
191 do {
192 if ((*cpool_ptr == literal) && !(*cpool_unique_ptr)) {
193 cpool_index = cpool_ptr - compiler->cpool;
194 break;
195 }
196 cpool_ptr++;
197 cpool_unique_ptr++;
198 } while (cpool_ptr < cpool_end);
199 }
200
201 if (cpool_index == CPOOL_SIZE) {
202 /* Must allocate a new entry in the literal pool. */
203 if (compiler->cpool_fill < CPOOL_SIZE) {
204 cpool_index = compiler->cpool_fill;
205 compiler->cpool_fill++;
206 }
207 else {
208 FAIL_IF(push_cpool(compiler));
209 cpool_index = 0;
210 compiler->cpool_fill = 1;
211 }
212 }
213
214 SLJIT_ASSERT((inst & 0xfff) == 0);
215 ptr = (sljit_uw*)ensure_buf(compiler, sizeof(sljit_uw));
216 FAIL_IF(!ptr);
217 compiler->size++;
218 *ptr = inst | cpool_index;
219
220 compiler->cpool[cpool_index] = literal;
221 compiler->cpool_unique[cpool_index] = 0;
222 if (compiler->cpool_diff == CONST_POOL_EMPTY)
223 compiler->cpool_diff = compiler->size;
224 return SLJIT_SUCCESS;
225 }
226
227 static sljit_si push_inst_with_unique_literal(struct sljit_compiler *compiler, sljit_uw inst, sljit_uw literal)
228 {
229 sljit_uw* ptr;
230 if (SLJIT_UNLIKELY((compiler->cpool_diff != CONST_POOL_EMPTY && compiler->size - compiler->cpool_diff >= MAX_DIFFERENCE(4092)) || compiler->cpool_fill >= CPOOL_SIZE))
231 FAIL_IF(push_cpool(compiler));
232
233 SLJIT_ASSERT(compiler->cpool_fill < CPOOL_SIZE && (inst & 0xfff) == 0);
234 ptr = (sljit_uw*)ensure_buf(compiler, sizeof(sljit_uw));
235 FAIL_IF(!ptr);
236 compiler->size++;
237 *ptr = inst | compiler->cpool_fill;
238
239 compiler->cpool[compiler->cpool_fill] = literal;
240 compiler->cpool_unique[compiler->cpool_fill] = 1;
241 compiler->cpool_fill++;
242 if (compiler->cpool_diff == CONST_POOL_EMPTY)
243 compiler->cpool_diff = compiler->size;
244 return SLJIT_SUCCESS;
245 }
246
247 static SLJIT_INLINE sljit_si prepare_blx(struct sljit_compiler *compiler)
248 {
249 /* Place for at least two instruction (doesn't matter whether the first has a literal). */
250 if (SLJIT_UNLIKELY(compiler->cpool_diff != CONST_POOL_EMPTY && compiler->size - compiler->cpool_diff >= MAX_DIFFERENCE(4088)))
251 return push_cpool(compiler);
252 return SLJIT_SUCCESS;
253 }
254
255 static SLJIT_INLINE sljit_si emit_blx(struct sljit_compiler *compiler)
256 {
257 /* Must follow tightly the previous instruction (to be able to convert it to bl instruction). */
258 SLJIT_ASSERT(compiler->cpool_diff == CONST_POOL_EMPTY || compiler->size - compiler->cpool_diff < MAX_DIFFERENCE(4092));
259 return push_inst(compiler, BLX | RM(TMP_REG1));
260 }
261
262 static sljit_uw patch_pc_relative_loads(sljit_uw *last_pc_patch, sljit_uw *code_ptr, sljit_uw* const_pool, sljit_uw cpool_size)
263 {
264 sljit_uw diff;
265 sljit_uw ind;
266 sljit_uw counter = 0;
267 sljit_uw* clear_const_pool = const_pool;
268 sljit_uw* clear_const_pool_end = const_pool + cpool_size;
269
270 SLJIT_ASSERT(const_pool - code_ptr <= CONST_POOL_ALIGNMENT);
271 /* Set unused flag for all literals in the constant pool.
272 I.e.: unused literals can belong to branches, which can be encoded as B or BL.
273 We can "compress" the constant pool by discarding these literals. */
274 while (clear_const_pool < clear_const_pool_end)
275 *clear_const_pool++ = (sljit_uw)(-1);
276
277 while (last_pc_patch < code_ptr) {
278 /* Data transfer instruction with Rn == r15. */
279 if ((*last_pc_patch & 0x0c0f0000) == 0x040f0000) {
280 diff = const_pool - last_pc_patch;
281 ind = (*last_pc_patch) & 0xfff;
282
283 /* Must be a load instruction with immediate offset. */
284 SLJIT_ASSERT(ind < cpool_size && !(*last_pc_patch & (1 << 25)) && (*last_pc_patch & (1 << 20)));
285 if ((sljit_si)const_pool[ind] < 0) {
286 const_pool[ind] = counter;
287 ind = counter;
288 counter++;
289 }
290 else
291 ind = const_pool[ind];
292
293 SLJIT_ASSERT(diff >= 1);
294 if (diff >= 2 || ind > 0) {
295 diff = (diff + ind - 2) << 2;
296 SLJIT_ASSERT(diff <= 0xfff);
297 *last_pc_patch = (*last_pc_patch & ~0xfff) | diff;
298 }
299 else
300 *last_pc_patch = (*last_pc_patch & ~(0xfff | (1 << 23))) | 0x004;
301 }
302 last_pc_patch++;
303 }
304 return counter;
305 }
306
307 /* In some rare ocasions we may need future patches. The probability is close to 0 in practice. */
308 struct future_patch {
309 struct future_patch* next;
310 sljit_si index;
311 sljit_si value;
312 };
313
314 static SLJIT_INLINE sljit_si resolve_const_pool_index(struct future_patch **first_patch, sljit_uw cpool_current_index, sljit_uw *cpool_start_address, sljit_uw *buf_ptr)
315 {
316 sljit_si value;
317 struct future_patch *curr_patch, *prev_patch;
318
319 /* Using the values generated by patch_pc_relative_loads. */
320 if (!*first_patch)
321 value = (sljit_si)cpool_start_address[cpool_current_index];
322 else {
323 curr_patch = *first_patch;
324 prev_patch = 0;
325 while (1) {
326 if (!curr_patch) {
327 value = (sljit_si)cpool_start_address[cpool_current_index];
328 break;
329 }
330 if ((sljit_uw)curr_patch->index == cpool_current_index) {
331 value = curr_patch->value;
332 if (prev_patch)
333 prev_patch->next = curr_patch->next;
334 else
335 *first_patch = curr_patch->next;
336 SLJIT_FREE(curr_patch);
337 break;
338 }
339 prev_patch = curr_patch;
340 curr_patch = curr_patch->next;
341 }
342 }
343
344 if (value >= 0) {
345 if ((sljit_uw)value > cpool_current_index) {
346 curr_patch = (struct future_patch*)SLJIT_MALLOC(sizeof(struct future_patch));
347 if (!curr_patch) {
348 while (*first_patch) {
349 curr_patch = *first_patch;
350 *first_patch = (*first_patch)->next;
351 SLJIT_FREE(curr_patch);
352 }
353 return SLJIT_ERR_ALLOC_FAILED;
354 }
355 curr_patch->next = *first_patch;
356 curr_patch->index = value;
357 curr_patch->value = cpool_start_address[value];
358 *first_patch = curr_patch;
359 }
360 cpool_start_address[value] = *buf_ptr;
361 }
362 return SLJIT_SUCCESS;
363 }
364
365 #else
366
367 static sljit_si push_inst(struct sljit_compiler *compiler, sljit_uw inst)
368 {
369 sljit_uw* ptr;
370
371 ptr = (sljit_uw*)ensure_buf(compiler, sizeof(sljit_uw));
372 FAIL_IF(!ptr);
373 compiler->size++;
374 *ptr = inst;
375 return SLJIT_SUCCESS;
376 }
377
378 static SLJIT_INLINE sljit_si emit_imm(struct sljit_compiler *compiler, sljit_si reg, sljit_sw imm)
379 {
380 FAIL_IF(push_inst(compiler, MOVW | RD(reg) | ((imm << 4) & 0xf0000) | (imm & 0xfff)));
381 return push_inst(compiler, MOVT | RD(reg) | ((imm >> 12) & 0xf0000) | ((imm >> 16) & 0xfff));
382 }
383
384 #endif
385
386 static SLJIT_INLINE sljit_si detect_jump_type(struct sljit_jump *jump, sljit_uw *code_ptr, sljit_uw *code)
387 {
388 sljit_sw diff;
389
390 if (jump->flags & SLJIT_REWRITABLE_JUMP)
391 return 0;
392
393 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
394 if (jump->flags & IS_BL)
395 code_ptr--;
396
397 if (jump->flags & JUMP_ADDR)
398 diff = ((sljit_sw)jump->u.target - (sljit_sw)(code_ptr + 2));
399 else {
400 SLJIT_ASSERT(jump->flags & JUMP_LABEL);
401 diff = ((sljit_sw)(code + jump->u.label->size) - (sljit_sw)(code_ptr + 2));
402 }
403
404 /* Branch to Thumb code has not been optimized yet. */
405 if (diff & 0x3)
406 return 0;
407
408 if (jump->flags & IS_BL) {
409 if (diff <= 0x01ffffff && diff >= -0x02000000) {
410 *code_ptr = (BL - CONDITIONAL) | (*(code_ptr + 1) & COND_MASK);
411 jump->flags |= PATCH_B;
412 return 1;
413 }
414 }
415 else {
416 if (diff <= 0x01ffffff && diff >= -0x02000000) {
417 *code_ptr = (B - CONDITIONAL) | (*code_ptr & COND_MASK);
418 jump->flags |= PATCH_B;
419 }
420 }
421 #else
422 if (jump->flags & JUMP_ADDR)
423 diff = ((sljit_sw)jump->u.target - (sljit_sw)code_ptr);
424 else {
425 SLJIT_ASSERT(jump->flags & JUMP_LABEL);
426 diff = ((sljit_sw)(code + jump->u.label->size) - (sljit_sw)code_ptr);
427 }
428
429 /* Branch to Thumb code has not been optimized yet. */
430 if (diff & 0x3)
431 return 0;
432
433 if (diff <= 0x01ffffff && diff >= -0x02000000) {
434 code_ptr -= 2;
435 *code_ptr = ((jump->flags & IS_BL) ? (BL - CONDITIONAL) : (B - CONDITIONAL)) | (code_ptr[2] & COND_MASK);
436 jump->flags |= PATCH_B;
437 return 1;
438 }
439 #endif
440 return 0;
441 }
442
443 static SLJIT_INLINE void inline_set_jump_addr(sljit_uw addr, sljit_uw new_addr, sljit_si flush)
444 {
445 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
446 sljit_uw *ptr = (sljit_uw*)addr;
447 sljit_uw *inst = (sljit_uw*)ptr[0];
448 sljit_uw mov_pc = ptr[1];
449 sljit_si bl = (mov_pc & 0x0000f000) != RD(TMP_PC);
450 sljit_sw diff = (sljit_sw)(((sljit_sw)new_addr - (sljit_sw)(inst + 2)) >> 2);
451
452 if (diff <= 0x7fffff && diff >= -0x800000) {
453 /* Turn to branch. */
454 if (!bl) {
455 inst[0] = (mov_pc & COND_MASK) | (B - CONDITIONAL) | (diff & 0xffffff);
456 if (flush) {
457 SLJIT_CACHE_FLUSH(inst, inst + 1);
458 }
459 } else {
460 inst[0] = (mov_pc & COND_MASK) | (BL - CONDITIONAL) | (diff & 0xffffff);
461 inst[1] = NOP;
462 if (flush) {
463 SLJIT_CACHE_FLUSH(inst, inst + 2);
464 }
465 }
466 } else {
467 /* Get the position of the constant. */
468 if (mov_pc & (1 << 23))
469 ptr = inst + ((mov_pc & 0xfff) >> 2) + 2;
470 else
471 ptr = inst + 1;
472
473 if (*inst != mov_pc) {
474 inst[0] = mov_pc;
475 if (!bl) {
476 if (flush) {
477 SLJIT_CACHE_FLUSH(inst, inst + 1);
478 }
479 } else {
480 inst[1] = BLX | RM(TMP_REG1);
481 if (flush) {
482 SLJIT_CACHE_FLUSH(inst, inst + 2);
483 }
484 }
485 }
486 *ptr = new_addr;
487 }
488 #else
489 sljit_uw *inst = (sljit_uw*)addr;
490 SLJIT_ASSERT((inst[0] & 0xfff00000) == MOVW && (inst[1] & 0xfff00000) == MOVT);
491 inst[0] = MOVW | (inst[0] & 0xf000) | ((new_addr << 4) & 0xf0000) | (new_addr & 0xfff);
492 inst[1] = MOVT | (inst[1] & 0xf000) | ((new_addr >> 12) & 0xf0000) | ((new_addr >> 16) & 0xfff);
493 if (flush) {
494 SLJIT_CACHE_FLUSH(inst, inst + 2);
495 }
496 #endif
497 }
498
499 static sljit_uw get_imm(sljit_uw imm);
500
501 static SLJIT_INLINE void inline_set_const(sljit_uw addr, sljit_sw new_constant, sljit_si flush)
502 {
503 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
504 sljit_uw *ptr = (sljit_uw*)addr;
505 sljit_uw *inst = (sljit_uw*)ptr[0];
506 sljit_uw ldr_literal = ptr[1];
507 sljit_uw src2;
508
509 src2 = get_imm(new_constant);
510 if (src2) {
511 *inst = 0xe3a00000 | (ldr_literal & 0xf000) | src2;
512 if (flush) {
513 SLJIT_CACHE_FLUSH(inst, inst + 1);
514 }
515 return;
516 }
517
518 src2 = get_imm(~new_constant);
519 if (src2) {
520 *inst = 0xe3e00000 | (ldr_literal & 0xf000) | src2;
521 if (flush) {
522 SLJIT_CACHE_FLUSH(inst, inst + 1);
523 }
524 return;
525 }
526
527 if (ldr_literal & (1 << 23))
528 ptr = inst + ((ldr_literal & 0xfff) >> 2) + 2;
529 else
530 ptr = inst + 1;
531
532 if (*inst != ldr_literal) {
533 *inst = ldr_literal;
534 if (flush) {
535 SLJIT_CACHE_FLUSH(inst, inst + 1);
536 }
537 }
538 *ptr = new_constant;
539 #else
540 sljit_uw *inst = (sljit_uw*)addr;
541 SLJIT_ASSERT((inst[0] & 0xfff00000) == MOVW && (inst[1] & 0xfff00000) == MOVT);
542 inst[0] = MOVW | (inst[0] & 0xf000) | ((new_constant << 4) & 0xf0000) | (new_constant & 0xfff);
543 inst[1] = MOVT | (inst[1] & 0xf000) | ((new_constant >> 12) & 0xf0000) | ((new_constant >> 16) & 0xfff);
544 if (flush) {
545 SLJIT_CACHE_FLUSH(inst, inst + 2);
546 }
547 #endif
548 }
549
550 SLJIT_API_FUNC_ATTRIBUTE void* sljit_generate_code(struct sljit_compiler *compiler)
551 {
552 struct sljit_memory_fragment *buf;
553 sljit_uw *code;
554 sljit_uw *code_ptr;
555 sljit_uw *buf_ptr;
556 sljit_uw *buf_end;
557 sljit_uw size;
558 sljit_uw word_count;
559 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
560 sljit_uw cpool_size;
561 sljit_uw cpool_skip_alignment;
562 sljit_uw cpool_current_index;
563 sljit_uw *cpool_start_address;
564 sljit_uw *last_pc_patch;
565 struct future_patch *first_patch;
566 #endif
567
568 struct sljit_label *label;
569 struct sljit_jump *jump;
570 struct sljit_const *const_;
571
572 CHECK_ERROR_PTR();
573 check_sljit_generate_code(compiler);
574 reverse_buf(compiler);
575
576 /* Second code generation pass. */
577 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
578 size = compiler->size + (compiler->patches << 1);
579 if (compiler->cpool_fill > 0)
580 size += compiler->cpool_fill + CONST_POOL_ALIGNMENT - 1;
581 #else
582 size = compiler->size;
583 #endif
584 code = (sljit_uw*)SLJIT_MALLOC_EXEC(size * sizeof(sljit_uw));
585 PTR_FAIL_WITH_EXEC_IF(code);
586 buf = compiler->buf;
587
588 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
589 cpool_size = 0;
590 cpool_skip_alignment = 0;
591 cpool_current_index = 0;
592 cpool_start_address = NULL;
593 first_patch = NULL;
594 last_pc_patch = code;
595 #endif
596
597 code_ptr = code;
598 word_count = 0;
599
600 label = compiler->labels;
601 jump = compiler->jumps;
602 const_ = compiler->consts;
603
604 if (label && label->size == 0) {
605 label->addr = (sljit_uw)code;
606 label->size = 0;
607 label = label->next;
608 }
609
610 do {
611 buf_ptr = (sljit_uw*)buf->memory;
612 buf_end = buf_ptr + (buf->used_size >> 2);
613 do {
614 word_count++;
615 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
616 if (cpool_size > 0) {
617 if (cpool_skip_alignment > 0) {
618 buf_ptr++;
619 cpool_skip_alignment--;
620 }
621 else {
622 if (SLJIT_UNLIKELY(resolve_const_pool_index(&first_patch, cpool_current_index, cpool_start_address, buf_ptr))) {
623 SLJIT_FREE_EXEC(code);
624 compiler->error = SLJIT_ERR_ALLOC_FAILED;
625 return NULL;
626 }
627 buf_ptr++;
628 if (++cpool_current_index >= cpool_size) {
629 SLJIT_ASSERT(!first_patch);
630 cpool_size = 0;
631 if (label && label->size == word_count) {
632 /* Points after the current instruction. */
633 label->addr = (sljit_uw)code_ptr;
634 label->size = code_ptr - code;
635 label = label->next;
636 }
637 }
638 }
639 }
640 else if ((*buf_ptr & 0xff000000) != PUSH_POOL) {
641 #endif
642 *code_ptr = *buf_ptr++;
643 /* These structures are ordered by their address. */
644 SLJIT_ASSERT(!label || label->size >= word_count);
645 SLJIT_ASSERT(!jump || jump->addr >= word_count);
646 SLJIT_ASSERT(!const_ || const_->addr >= word_count);
647 if (jump && jump->addr == word_count) {
648 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
649 if (detect_jump_type(jump, code_ptr, code))
650 code_ptr--;
651 jump->addr = (sljit_uw)code_ptr;
652 #else
653 jump->addr = (sljit_uw)(code_ptr - 2);
654 if (detect_jump_type(jump, code_ptr, code))
655 code_ptr -= 2;
656 #endif
657 jump = jump->next;
658 }
659 if (label && label->size == word_count) {
660 /* code_ptr can be affected above. */
661 label->addr = (sljit_uw)(code_ptr + 1);
662 label->size = (code_ptr + 1) - code;
663 label = label->next;
664 }
665 if (const_ && const_->addr == word_count) {
666 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
667 const_->addr = (sljit_uw)code_ptr;
668 #else
669 const_->addr = (sljit_uw)(code_ptr - 1);
670 #endif
671 const_ = const_->next;
672 }
673 code_ptr++;
674 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
675 }
676 else {
677 /* Fortunately, no need to shift. */
678 cpool_size = *buf_ptr++ & ~PUSH_POOL;
679 SLJIT_ASSERT(cpool_size > 0);
680 cpool_start_address = ALIGN_INSTRUCTION(code_ptr + 1);
681 cpool_current_index = patch_pc_relative_loads(last_pc_patch, code_ptr, cpool_start_address, cpool_size);
682 if (cpool_current_index > 0) {
683 /* Unconditional branch. */
684 *code_ptr = B | (((cpool_start_address - code_ptr) + cpool_current_index - 2) & ~PUSH_POOL);
685 code_ptr = cpool_start_address + cpool_current_index;
686 }
687 cpool_skip_alignment = CONST_POOL_ALIGNMENT - 1;
688 cpool_current_index = 0;
689 last_pc_patch = code_ptr;
690 }
691 #endif
692 } while (buf_ptr < buf_end);
693 buf = buf->next;
694 } while (buf);
695
696 SLJIT_ASSERT(!label);
697 SLJIT_ASSERT(!jump);
698 SLJIT_ASSERT(!const_);
699
700 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
701 SLJIT_ASSERT(cpool_size == 0);
702 if (compiler->cpool_fill > 0) {
703 cpool_start_address = ALIGN_INSTRUCTION(code_ptr);
704 cpool_current_index = patch_pc_relative_loads(last_pc_patch, code_ptr, cpool_start_address, compiler->cpool_fill);
705 if (cpool_current_index > 0)
706 code_ptr = cpool_start_address + cpool_current_index;
707
708 buf_ptr = compiler->cpool;
709 buf_end = buf_ptr + compiler->cpool_fill;
710 cpool_current_index = 0;
711 while (buf_ptr < buf_end) {
712 if (SLJIT_UNLIKELY(resolve_const_pool_index(&first_patch, cpool_current_index, cpool_start_address, buf_ptr))) {
713 SLJIT_FREE_EXEC(code);
714 compiler->error = SLJIT_ERR_ALLOC_FAILED;
715 return NULL;
716 }
717 buf_ptr++;
718 cpool_current_index++;
719 }
720 SLJIT_ASSERT(!first_patch);
721 }
722 #endif
723
724 jump = compiler->jumps;
725 while (jump) {
726 buf_ptr = (sljit_uw*)jump->addr;
727
728 if (jump->flags & PATCH_B) {
729 if (!(jump->flags & JUMP_ADDR)) {
730 SLJIT_ASSERT(jump->flags & JUMP_LABEL);
731 SLJIT_ASSERT(((sljit_sw)jump->u.label->addr - (sljit_sw)(buf_ptr + 2)) <= 0x01ffffff && ((sljit_sw)jump->u.label->addr - (sljit_sw)(buf_ptr + 2)) >= -0x02000000);
732 *buf_ptr |= (((sljit_sw)jump->u.label->addr - (sljit_sw)(buf_ptr + 2)) >> 2) & 0x00ffffff;
733 }
734 else {
735 SLJIT_ASSERT(((sljit_sw)jump->u.target - (sljit_sw)(buf_ptr + 2)) <= 0x01ffffff && ((sljit_sw)jump->u.target - (sljit_sw)(buf_ptr + 2)) >= -0x02000000);
736 *buf_ptr |= (((sljit_sw)jump->u.target - (sljit_sw)(buf_ptr + 2)) >> 2) & 0x00ffffff;
737 }
738 }
739 else if (jump->flags & SLJIT_REWRITABLE_JUMP) {
740 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
741 jump->addr = (sljit_uw)code_ptr;
742 code_ptr[0] = (sljit_uw)buf_ptr;
743 code_ptr[1] = *buf_ptr;
744 inline_set_jump_addr((sljit_uw)code_ptr, (jump->flags & JUMP_LABEL) ? jump->u.label->addr : jump->u.target, 0);
745 code_ptr += 2;
746 #else
747 inline_set_jump_addr((sljit_uw)buf_ptr, (jump->flags & JUMP_LABEL) ? jump->u.label->addr : jump->u.target, 0);
748 #endif
749 }
750 else {
751 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
752 if (jump->flags & IS_BL)
753 buf_ptr--;
754 if (*buf_ptr & (1 << 23))
755 buf_ptr += ((*buf_ptr & 0xfff) >> 2) + 2;
756 else
757 buf_ptr += 1;
758 *buf_ptr = (jump->flags & JUMP_LABEL) ? jump->u.label->addr : jump->u.target;
759 #else
760 inline_set_jump_addr((sljit_uw)buf_ptr, (jump->flags & JUMP_LABEL) ? jump->u.label->addr : jump->u.target, 0);
761 #endif
762 }
763 jump = jump->next;
764 }
765
766 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
767 const_ = compiler->consts;
768 while (const_) {
769 buf_ptr = (sljit_uw*)const_->addr;
770 const_->addr = (sljit_uw)code_ptr;
771
772 code_ptr[0] = (sljit_uw)buf_ptr;
773 code_ptr[1] = *buf_ptr;
774 if (*buf_ptr & (1 << 23))
775 buf_ptr += ((*buf_ptr & 0xfff) >> 2) + 2;
776 else
777 buf_ptr += 1;
778 /* Set the value again (can be a simple constant). */
779 inline_set_const((sljit_uw)code_ptr, *buf_ptr, 0);
780 code_ptr += 2;
781
782 const_ = const_->next;
783 }
784 #endif
785
786 SLJIT_ASSERT(code_ptr - code <= (sljit_si)size);
787
788 compiler->error = SLJIT_ERR_COMPILED;
789 compiler->executable_size = (code_ptr - code) * sizeof(sljit_uw);
790 SLJIT_CACHE_FLUSH(code, code_ptr);
791 return code;
792 }
793
794 /* --------------------------------------------------------------------- */
795 /* Entry, exit */
796 /* --------------------------------------------------------------------- */
797
798 /* emit_op inp_flags.
799 WRITE_BACK must be the first, since it is a flag. */
800 #define WRITE_BACK 0x01
801 #define ALLOW_IMM 0x02
802 #define ALLOW_INV_IMM 0x04
803 #define ALLOW_ANY_IMM (ALLOW_IMM | ALLOW_INV_IMM)
804 #define ARG_TEST 0x08
805
806 /* Creates an index in data_transfer_insts array. */
807 #define WORD_DATA 0x00
808 #define BYTE_DATA 0x10
809 #define HALF_DATA 0x20
810 #define SIGNED_DATA 0x40
811 #define LOAD_DATA 0x80
812
813 #define EMIT_INSTRUCTION(inst) \
814 FAIL_IF(push_inst(compiler, (inst)))
815
816 /* Condition: AL. */
817 #define EMIT_DATA_PROCESS_INS(opcode, set_flags, dst, src1, src2) \
818 (0xe0000000 | ((opcode) << 21) | (set_flags) | RD(dst) | RN(src1) | (src2))
819
820 static sljit_si emit_op(struct sljit_compiler *compiler, sljit_si op, sljit_si inp_flags,
821 sljit_si dst, sljit_sw dstw,
822 sljit_si src1, sljit_sw src1w,
823 sljit_si src2, sljit_sw src2w);
824
825 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_enter(struct sljit_compiler *compiler, sljit_si args, sljit_si scratches, sljit_si saveds, sljit_si local_size)
826 {
827 sljit_si size;
828 sljit_uw push;
829
830 CHECK_ERROR();
831 check_sljit_emit_enter(compiler, args, scratches, saveds, local_size);
832
833 compiler->scratches = scratches;
834 compiler->saveds = saveds;
835 #if (defined SLJIT_DEBUG && SLJIT_DEBUG)
836 compiler->logical_local_size = local_size;
837 #endif
838
839 /* Push saved registers, temporary registers
840 stmdb sp!, {..., lr} */
841 push = PUSH | (1 << 14);
842 if (scratches >= 5)
843 push |= 1 << 11;
844 if (scratches >= 4)
845 push |= 1 << 10;
846 if (saveds >= 5)
847 push |= 1 << 8;
848 if (saveds >= 4)
849 push |= 1 << 7;
850 if (saveds >= 3)
851 push |= 1 << 6;
852 if (saveds >= 2)
853 push |= 1 << 5;
854 if (saveds >= 1)
855 push |= 1 << 4;
856 EMIT_INSTRUCTION(push);
857
858 /* Stack must be aligned to 8 bytes: */
859 size = (1 + saveds) * sizeof(sljit_uw);
860 if (scratches >= 4)
861 size += (scratches - 3) * sizeof(sljit_uw);
862 local_size += size;
863 local_size = (local_size + 7) & ~7;
864 local_size -= size;
865 compiler->local_size = local_size;
866 if (local_size > 0)
867 FAIL_IF(emit_op(compiler, SLJIT_SUB, ALLOW_IMM, SLJIT_LOCALS_REG, 0, SLJIT_LOCALS_REG, 0, SLJIT_IMM, local_size));
868
869 if (args >= 1)
870 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, SLJIT_SAVED_REG1, SLJIT_UNUSED, RM(SLJIT_SCRATCH_REG1)));
871 if (args >= 2)
872 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, SLJIT_SAVED_REG2, SLJIT_UNUSED, RM(SLJIT_SCRATCH_REG2)));
873 if (args >= 3)
874 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, SLJIT_SAVED_REG3, SLJIT_UNUSED, RM(SLJIT_SCRATCH_REG3)));
875
876 return SLJIT_SUCCESS;
877 }
878
879 SLJIT_API_FUNC_ATTRIBUTE void sljit_set_context(struct sljit_compiler *compiler, sljit_si args, sljit_si scratches, sljit_si saveds, sljit_si local_size)
880 {
881 sljit_si size;
882
883 CHECK_ERROR_VOID();
884 check_sljit_set_context(compiler, args, scratches, saveds, local_size);
885
886 compiler->scratches = scratches;
887 compiler->saveds = saveds;
888 #if (defined SLJIT_DEBUG && SLJIT_DEBUG)
889 compiler->logical_local_size = local_size;
890 #endif
891
892 size = (1 + saveds) * sizeof(sljit_uw);
893 if (scratches >= 4)
894 size += (scratches - 3) * sizeof(sljit_uw);
895 local_size += size;
896 local_size = (local_size + 7) & ~7;
897 local_size -= size;
898 compiler->local_size = local_size;
899 }
900
901 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_return(struct sljit_compiler *compiler, sljit_si op, sljit_si src, sljit_sw srcw)
902 {
903 sljit_uw pop;
904
905 CHECK_ERROR();
906 check_sljit_emit_return(compiler, op, src, srcw);
907
908 FAIL_IF(emit_mov_before_return(compiler, op, src, srcw));
909
910 if (compiler->local_size > 0)
911 FAIL_IF(emit_op(compiler, SLJIT_ADD, ALLOW_IMM, SLJIT_LOCALS_REG, 0, SLJIT_LOCALS_REG, 0, SLJIT_IMM, compiler->local_size));
912
913 pop = POP | (1 << 15);
914 /* Push saved registers, temporary registers
915 ldmia sp!, {..., pc} */
916 if (compiler->scratches >= 5)
917 pop |= 1 << 11;
918 if (compiler->scratches >= 4)
919 pop |= 1 << 10;
920 if (compiler->saveds >= 5)
921 pop |= 1 << 8;
922 if (compiler->saveds >= 4)
923 pop |= 1 << 7;
924 if (compiler->saveds >= 3)
925 pop |= 1 << 6;
926 if (compiler->saveds >= 2)
927 pop |= 1 << 5;
928 if (compiler->saveds >= 1)
929 pop |= 1 << 4;
930
931 return push_inst(compiler, pop);
932 }
933
934 /* --------------------------------------------------------------------- */
935 /* Operators */
936 /* --------------------------------------------------------------------- */
937
938 /* s/l - store/load (1 bit)
939 u/s - signed/unsigned (1 bit)
940 w/b/h/N - word/byte/half/NOT allowed (2 bit)
941 It contans 16 items, but not all are different. */
942
943 static sljit_sw data_transfer_insts[16] = {
944 /* s u w */ 0xe5000000 /* str */,
945 /* s u b */ 0xe5400000 /* strb */,
946 /* s u h */ 0xe10000b0 /* strh */,
947 /* s u N */ 0x00000000 /* not allowed */,
948 /* s s w */ 0xe5000000 /* str */,
949 /* s s b */ 0xe5400000 /* strb */,
950 /* s s h */ 0xe10000b0 /* strh */,
951 /* s s N */ 0x00000000 /* not allowed */,
952
953 /* l u w */ 0xe5100000 /* ldr */,
954 /* l u b */ 0xe5500000 /* ldrb */,
955 /* l u h */ 0xe11000b0 /* ldrh */,
956 /* l u N */ 0x00000000 /* not allowed */,
957 /* l s w */ 0xe5100000 /* ldr */,
958 /* l s b */ 0xe11000d0 /* ldrsb */,
959 /* l s h */ 0xe11000f0 /* ldrsh */,
960 /* l s N */ 0x00000000 /* not allowed */,
961 };
962
963 #define EMIT_DATA_TRANSFER(type, add, wb, target, base1, base2) \
964 (data_transfer_insts[(type) >> 4] | ((add) << 23) | ((wb) << 21) | (reg_map[target] << 12) | (reg_map[base1] << 16) | (base2))
965 /* Normal ldr/str instruction.
966 Type2: ldrsb, ldrh, ldrsh */
967 #define IS_TYPE1_TRANSFER(type) \
968 (data_transfer_insts[(type) >> 4] & 0x04000000)
969 #define TYPE2_TRANSFER_IMM(imm) \
970 (((imm) & 0xf) | (((imm) & 0xf0) << 4) | (1 << 22))
971
972 /* flags: */
973 /* Arguments are swapped. */
974 #define ARGS_SWAPPED 0x01
975 /* Inverted immediate. */
976 #define INV_IMM 0x02
977 /* Source and destination is register. */
978 #define REG_DEST 0x04
979 #define REG_SOURCE 0x08
980 /* One instruction is enough. */
981 #define FAST_DEST 0x10
982 /* Multiple instructions are required. */
983 #define SLOW_DEST 0x20
984 /* SET_FLAGS must be (1 << 20) as it is also the value of S bit (can be used for optimization). */
985 #define SET_FLAGS (1 << 20)
986 /* dst: reg
987 src1: reg
988 src2: reg or imm (if allowed)
989 SRC2_IMM must be (1 << 25) as it is also the value of I bit (can be used for optimization). */
990 #define SRC2_IMM (1 << 25)
991
992 #define EMIT_DATA_PROCESS_INS_AND_RETURN(opcode) \
993 return push_inst(compiler, EMIT_DATA_PROCESS_INS(opcode, flags & SET_FLAGS, dst, src1, (src2 & SRC2_IMM) ? src2 : RM(src2)))
994
995 #define EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(opcode, dst, src1, src2) \
996 return push_inst(compiler, EMIT_DATA_PROCESS_INS(opcode, flags & SET_FLAGS, dst, src1, src2))
997
998 #define EMIT_SHIFT_INS_AND_RETURN(opcode) \
999 SLJIT_ASSERT(!(flags & INV_IMM) && !(src2 & SRC2_IMM)); \
1000 if (compiler->shift_imm != 0x20) { \
1001 SLJIT_ASSERT(src1 == TMP_REG1); \
1002 SLJIT_ASSERT(!(flags & ARGS_SWAPPED)); \
1003 if (compiler->shift_imm != 0) \
1004 return push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, flags & SET_FLAGS, dst, SLJIT_UNUSED, (compiler->shift_imm << 7) | (opcode << 5) | reg_map[src2])); \
1005 return push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, flags & SET_FLAGS, dst, SLJIT_UNUSED, reg_map[src2])); \
1006 } \
1007 return push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, flags & SET_FLAGS, dst, SLJIT_UNUSED, (reg_map[(flags & ARGS_SWAPPED) ? src1 : src2] << 8) | (opcode << 5) | 0x10 | ((flags & ARGS_SWAPPED) ? reg_map[src2] : reg_map[src1])));
1008
1009 static SLJIT_INLINE sljit_si emit_single_op(struct sljit_compiler *compiler, sljit_si op, sljit_si flags,
1010 sljit_si dst, sljit_si src1, sljit_si src2)
1011 {
1012 sljit_sw mul_inst;
1013
1014 switch (GET_OPCODE(op)) {
1015 case SLJIT_MOV:
1016 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & ARGS_SWAPPED));
1017 if (dst != src2) {
1018 if (src2 & SRC2_IMM) {
1019 if (flags & INV_IMM)
1020 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MVN_DP, dst, SLJIT_UNUSED, src2);
1021 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MOV_DP, dst, SLJIT_UNUSED, src2);
1022 }
1023 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MOV_DP, dst, SLJIT_UNUSED, reg_map[src2]);
1024 }
1025 return SLJIT_SUCCESS;
1026
1027 case SLJIT_MOV_UB:
1028 case SLJIT_MOV_SB:
1029 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & ARGS_SWAPPED));
1030 if ((flags & (REG_DEST | REG_SOURCE)) == (REG_DEST | REG_SOURCE)) {
1031 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
1032 if (op == SLJIT_MOV_UB)
1033 return push_inst(compiler, EMIT_DATA_PROCESS_INS(AND_DP, 0, dst, src2, SRC2_IMM | 0xff));
1034 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, dst, SLJIT_UNUSED, (24 << 7) | reg_map[src2]));
1035 return push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, dst, SLJIT_UNUSED, (24 << 7) | (op == SLJIT_MOV_UB ? 0x20 : 0x40) | reg_map[dst]));
1036 #else
1037 return push_inst(compiler, (op == SLJIT_MOV_UB ? UXTB : SXTB) | RD(dst) | RM(src2));
1038 #endif
1039 }
1040 else if (dst != src2) {
1041 SLJIT_ASSERT(src2 & SRC2_IMM);
1042 if (flags & INV_IMM)
1043 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MVN_DP, dst, SLJIT_UNUSED, src2);
1044 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MOV_DP, dst, SLJIT_UNUSED, src2);
1045 }
1046 return SLJIT_SUCCESS;
1047
1048 case SLJIT_MOV_UH:
1049 case SLJIT_MOV_SH:
1050 SLJIT_ASSERT(src1 == TMP_REG1 && !(flags & ARGS_SWAPPED));
1051 if ((flags & (REG_DEST | REG_SOURCE)) == (REG_DEST | REG_SOURCE)) {
1052 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
1053 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, dst, SLJIT_UNUSED, (16 << 7) | reg_map[src2]));
1054 return push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, dst, SLJIT_UNUSED, (16 << 7) | (op == SLJIT_MOV_UH ? 0x20 : 0x40) | reg_map[dst]));
1055 #else
1056 return push_inst(compiler, (op == SLJIT_MOV_UH ? UXTH : SXTH) | RD(dst) | RM(src2));
1057 #endif
1058 }
1059 else if (dst != src2) {
1060 SLJIT_ASSERT(src2 & SRC2_IMM);
1061 if (flags & INV_IMM)
1062 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MVN_DP, dst, SLJIT_UNUSED, src2);
1063 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MOV_DP, dst, SLJIT_UNUSED, src2);
1064 }
1065 return SLJIT_SUCCESS;
1066
1067 case SLJIT_NOT:
1068 if (src2 & SRC2_IMM) {
1069 if (flags & INV_IMM)
1070 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MOV_DP, dst, SLJIT_UNUSED, src2);
1071 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MVN_DP, dst, SLJIT_UNUSED, src2);
1072 }
1073 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(MVN_DP, dst, SLJIT_UNUSED, RM(src2));
1074
1075 case SLJIT_CLZ:
1076 SLJIT_ASSERT(!(flags & INV_IMM));
1077 SLJIT_ASSERT(!(src2 & SRC2_IMM));
1078 FAIL_IF(push_inst(compiler, CLZ | RD(dst) | RM(src2)));
1079 if (flags & SET_FLAGS)
1080 EMIT_FULL_DATA_PROCESS_INS_AND_RETURN(CMP_DP, SLJIT_UNUSED, dst, SRC2_IMM);
1081 return SLJIT_SUCCESS;
1082
1083 case SLJIT_ADD:
1084 SLJIT_ASSERT(!(flags & INV_IMM));
1085 EMIT_DATA_PROCESS_INS_AND_RETURN(ADD_DP);
1086
1087 case SLJIT_ADDC:
1088 SLJIT_ASSERT(!(flags & INV_IMM));
1089 EMIT_DATA_PROCESS_INS_AND_RETURN(ADC_DP);
1090
1091 case SLJIT_SUB:
1092 SLJIT_ASSERT(!(flags & INV_IMM));
1093 if (!(flags & ARGS_SWAPPED))
1094 EMIT_DATA_PROCESS_INS_AND_RETURN(SUB_DP);
1095 EMIT_DATA_PROCESS_INS_AND_RETURN(RSB_DP);
1096
1097 case SLJIT_SUBC:
1098 SLJIT_ASSERT(!(flags & INV_IMM));
1099 if (!(flags & ARGS_SWAPPED))
1100 EMIT_DATA_PROCESS_INS_AND_RETURN(SBC_DP);
1101 EMIT_DATA_PROCESS_INS_AND_RETURN(RSC_DP);
1102
1103 case SLJIT_MUL:
1104 SLJIT_ASSERT(!(flags & INV_IMM));
1105 SLJIT_ASSERT(!(src2 & SRC2_IMM));
1106 if (SLJIT_UNLIKELY(op & SLJIT_SET_O))
1107 mul_inst = SMULL | (reg_map[TMP_REG3] << 16) | (reg_map[dst] << 12);
1108 else
1109 mul_inst = MUL | (reg_map[dst] << 16);
1110
1111 if (dst != src2)
1112 FAIL_IF(push_inst(compiler, mul_inst | (reg_map[src1] << 8) | reg_map[src2]));
1113 else if (dst != src1)
1114 FAIL_IF(push_inst(compiler, mul_inst | (reg_map[src2] << 8) | reg_map[src1]));
1115 else {
1116 /* Rm and Rd must not be the same register. */
1117 SLJIT_ASSERT(dst != TMP_REG1);
1118 FAIL_IF(push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, TMP_REG1, SLJIT_UNUSED, reg_map[src2])));
1119 FAIL_IF(push_inst(compiler, mul_inst | (reg_map[src2] << 8) | reg_map[TMP_REG1]));
1120 }
1121
1122 if (!(op & SLJIT_SET_O))
1123 return SLJIT_SUCCESS;
1124
1125 /* We need to use TMP_REG3. */
1126 compiler->cache_arg = 0;
1127 compiler->cache_argw = 0;
1128 /* cmp TMP_REG2, dst asr #31. */
1129 return push_inst(compiler, EMIT_DATA_PROCESS_INS(CMP_DP, SET_FLAGS, SLJIT_UNUSED, TMP_REG3, RM(dst) | 0xfc0));
1130
1131 case SLJIT_AND:
1132 if (!(flags & INV_IMM))
1133 EMIT_DATA_PROCESS_INS_AND_RETURN(AND_DP);
1134 EMIT_DATA_PROCESS_INS_AND_RETURN(BIC_DP);
1135
1136 case SLJIT_OR:
1137 SLJIT_ASSERT(!(flags & INV_IMM));
1138 EMIT_DATA_PROCESS_INS_AND_RETURN(ORR_DP);
1139
1140 case SLJIT_XOR:
1141 SLJIT_ASSERT(!(flags & INV_IMM));
1142 EMIT_DATA_PROCESS_INS_AND_RETURN(EOR_DP);
1143
1144 case SLJIT_SHL:
1145 EMIT_SHIFT_INS_AND_RETURN(0);
1146
1147 case SLJIT_LSHR:
1148 EMIT_SHIFT_INS_AND_RETURN(1);
1149
1150 case SLJIT_ASHR:
1151 EMIT_SHIFT_INS_AND_RETURN(2);
1152 }
1153 SLJIT_ASSERT_STOP();
1154 return SLJIT_SUCCESS;
1155 }
1156
1157 #undef EMIT_DATA_PROCESS_INS_AND_RETURN
1158 #undef EMIT_FULL_DATA_PROCESS_INS_AND_RETURN
1159 #undef EMIT_SHIFT_INS_AND_RETURN
1160
1161 /* Tests whether the immediate can be stored in the 12 bit imm field.
1162 Returns with 0 if not possible. */
1163 static sljit_uw get_imm(sljit_uw imm)
1164 {
1165 sljit_si rol;
1166
1167 if (imm <= 0xff)
1168 return SRC2_IMM | imm;
1169
1170 if (!(imm & 0xff000000)) {
1171 imm <<= 8;
1172 rol = 8;
1173 }
1174 else {
1175 imm = (imm << 24) | (imm >> 8);
1176 rol = 0;
1177 }
1178
1179 if (!(imm & 0xff000000)) {
1180 imm <<= 8;
1181 rol += 4;
1182 }
1183
1184 if (!(imm & 0xf0000000)) {
1185 imm <<= 4;
1186 rol += 2;
1187 }
1188
1189 if (!(imm & 0xc0000000)) {
1190 imm <<= 2;
1191 rol += 1;
1192 }
1193
1194 if (!(imm & 0x00ffffff))
1195 return SRC2_IMM | (imm >> 24) | (rol << 8);
1196 else
1197 return 0;
1198 }
1199
1200 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
1201 static sljit_si generate_int(struct sljit_compiler *compiler, sljit_si reg, sljit_uw imm, sljit_si positive)
1202 {
1203 sljit_uw mask;
1204 sljit_uw imm1;
1205 sljit_uw imm2;
1206 sljit_si rol;
1207
1208 /* Step1: Search a zero byte (8 continous zero bit). */
1209 mask = 0xff000000;
1210 rol = 8;
1211 while(1) {
1212 if (!(imm & mask)) {
1213 /* Rol imm by rol. */
1214 imm = (imm << rol) | (imm >> (32 - rol));
1215 /* Calculate arm rol. */
1216 rol = 4 + (rol >> 1);
1217 break;
1218 }
1219 rol += 2;
1220 mask >>= 2;
1221 if (mask & 0x3) {
1222 /* rol by 8. */
1223 imm = (imm << 8) | (imm >> 24);
1224 mask = 0xff00;
1225 rol = 24;
1226 while (1) {
1227 if (!(imm & mask)) {
1228 /* Rol imm by rol. */
1229 imm = (imm << rol) | (imm >> (32 - rol));
1230 /* Calculate arm rol. */
1231 rol = (rol >> 1) - 8;
1232 break;
1233 }
1234 rol += 2;
1235 mask >>= 2;
1236 if (mask & 0x3)
1237 return 0;
1238 }
1239 break;
1240 }
1241 }
1242
1243 /* The low 8 bit must be zero. */
1244 SLJIT_ASSERT(!(imm & 0xff));
1245
1246 if (!(imm & 0xff000000)) {
1247 imm1 = SRC2_IMM | ((imm >> 16) & 0xff) | (((rol + 4) & 0xf) << 8);
1248 imm2 = SRC2_IMM | ((imm >> 8) & 0xff) | (((rol + 8) & 0xf) << 8);
1249 }
1250 else if (imm & 0xc0000000) {
1251 imm1 = SRC2_IMM | ((imm >> 24) & 0xff) | ((rol & 0xf) << 8);
1252 imm <<= 8;
1253 rol += 4;
1254
1255 if (!(imm & 0xff000000)) {
1256 imm <<= 8;
1257 rol += 4;
1258 }
1259
1260 if (!(imm & 0xf0000000)) {
1261 imm <<= 4;
1262 rol += 2;
1263 }
1264
1265 if (!(imm & 0xc0000000)) {
1266 imm <<= 2;
1267 rol += 1;
1268 }
1269
1270 if (!(imm & 0x00ffffff))
1271 imm2 = SRC2_IMM | (imm >> 24) | ((rol & 0xf) << 8);
1272 else
1273 return 0;
1274 }
1275 else {
1276 if (!(imm & 0xf0000000)) {
1277 imm <<= 4;
1278 rol += 2;
1279 }
1280
1281 if (!(imm & 0xc0000000)) {
1282 imm <<= 2;
1283 rol += 1;
1284 }
1285
1286 imm1 = SRC2_IMM | ((imm >> 24) & 0xff) | ((rol & 0xf) << 8);
1287 imm <<= 8;
1288 rol += 4;
1289
1290 if (!(imm & 0xf0000000)) {
1291 imm <<= 4;
1292 rol += 2;
1293 }
1294
1295 if (!(imm & 0xc0000000)) {
1296 imm <<= 2;
1297 rol += 1;
1298 }
1299
1300 if (!(imm & 0x00ffffff))
1301 imm2 = SRC2_IMM | (imm >> 24) | ((rol & 0xf) << 8);
1302 else
1303 return 0;
1304 }
1305
1306 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(positive ? MOV_DP : MVN_DP, 0, reg, SLJIT_UNUSED, imm1));
1307 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(positive ? ORR_DP : BIC_DP, 0, reg, reg, imm2));
1308 return 1;
1309 }
1310 #endif
1311
1312 static sljit_si load_immediate(struct sljit_compiler *compiler, sljit_si reg, sljit_uw imm)
1313 {
1314 sljit_uw tmp;
1315
1316 #if (defined SLJIT_CONFIG_ARM_V7 && SLJIT_CONFIG_ARM_V7)
1317 if (!(imm & ~0xffff))
1318 return push_inst(compiler, MOVW | RD(reg) | ((imm << 4) & 0xf0000) | (imm & 0xfff));
1319 #endif
1320
1321 /* Create imm by 1 inst. */
1322 tmp = get_imm(imm);
1323 if (tmp) {
1324 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, reg, SLJIT_UNUSED, tmp));
1325 return SLJIT_SUCCESS;
1326 }
1327
1328 tmp = get_imm(~imm);
1329 if (tmp) {
1330 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MVN_DP, 0, reg, SLJIT_UNUSED, tmp));
1331 return SLJIT_SUCCESS;
1332 }
1333
1334 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
1335 /* Create imm by 2 inst. */
1336 FAIL_IF(generate_int(compiler, reg, imm, 1));
1337 FAIL_IF(generate_int(compiler, reg, ~imm, 0));
1338
1339 /* Load integer. */
1340 return push_inst_with_literal(compiler, EMIT_DATA_TRANSFER(WORD_DATA | LOAD_DATA, 1, 0, reg, TMP_PC, 0), imm);
1341 #else
1342 return emit_imm(compiler, reg, imm);
1343 #endif
1344 }
1345
1346 /* Helper function. Dst should be reg + value, using at most 1 instruction, flags does not set. */
1347 static sljit_si emit_set_delta(struct sljit_compiler *compiler, sljit_si dst, sljit_si reg, sljit_sw value)
1348 {
1349 if (value >= 0) {
1350 value = get_imm(value);
1351 if (value)
1352 return push_inst(compiler, EMIT_DATA_PROCESS_INS(ADD_DP, 0, dst, reg, value));
1353 }
1354 else {
1355 value = get_imm(-value);
1356 if (value)
1357 return push_inst(compiler, EMIT_DATA_PROCESS_INS(SUB_DP, 0, dst, reg, value));
1358 }
1359 return SLJIT_ERR_UNSUPPORTED;
1360 }
1361
1362 /* Can perform an operation using at most 1 instruction. */
1363 static sljit_si getput_arg_fast(struct sljit_compiler *compiler, sljit_si inp_flags, sljit_si reg, sljit_si arg, sljit_sw argw)
1364 {
1365 sljit_uw imm;
1366
1367 if (arg & SLJIT_IMM) {
1368 imm = get_imm(argw);
1369 if (imm) {
1370 if (inp_flags & ARG_TEST)
1371 return 1;
1372 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, reg, SLJIT_UNUSED, imm));
1373 return -1;
1374 }
1375 imm = get_imm(~argw);
1376 if (imm) {
1377 if (inp_flags & ARG_TEST)
1378 return 1;
1379 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MVN_DP, 0, reg, SLJIT_UNUSED, imm));
1380 return -1;
1381 }
1382 return 0;
1383 }
1384
1385 SLJIT_ASSERT(arg & SLJIT_MEM);
1386
1387 /* Fast loads/stores. */
1388 if (!(arg & REG_MASK))
1389 return 0;
1390
1391 if (arg & OFFS_REG_MASK) {
1392 if ((argw & 0x3) != 0 && !IS_TYPE1_TRANSFER(inp_flags))
1393 return 0;
1394
1395 if (inp_flags & ARG_TEST)
1396 return 1;
1397 EMIT_INSTRUCTION(EMIT_DATA_TRANSFER(inp_flags, 1, inp_flags & WRITE_BACK, reg, arg & REG_MASK,
1398 RM(OFFS_REG(arg)) | (IS_TYPE1_TRANSFER(inp_flags) ? SRC2_IMM : 0) | ((argw & 0x3) << 7)));
1399 return -1;
1400 }
1401
1402 if (IS_TYPE1_TRANSFER(inp_flags)) {
1403 if (argw >= 0 && argw <= 0xfff) {
1404 if (inp_flags & ARG_TEST)
1405 return 1;
1406 EMIT_INSTRUCTION(EMIT_DATA_TRANSFER(inp_flags, 1, inp_flags & WRITE_BACK, reg, arg & REG_MASK, argw));
1407 return -1;
1408 }
1409 if (argw < 0 && argw >= -0xfff) {
1410 if (inp_flags & ARG_TEST)
1411 return 1;
1412 EMIT_INSTRUCTION(EMIT_DATA_TRANSFER(inp_flags, 0, inp_flags & WRITE_BACK, reg, arg & REG_MASK, -argw));
1413 return -1;
1414 }
1415 }
1416 else {
1417 if (argw >= 0 && argw <= 0xff) {
1418 if (inp_flags & ARG_TEST)
1419 return 1;
1420 EMIT_INSTRUCTION(EMIT_DATA_TRANSFER(inp_flags, 1, inp_flags & WRITE_BACK, reg, arg & REG_MASK, TYPE2_TRANSFER_IMM(argw)));
1421 return -1;
1422 }
1423 if (argw < 0 && argw >= -0xff) {
1424 if (inp_flags & ARG_TEST)
1425 return 1;
1426 argw = -argw;
1427 EMIT_INSTRUCTION(EMIT_DATA_TRANSFER(inp_flags, 0, inp_flags & WRITE_BACK, reg, arg & REG_MASK, TYPE2_TRANSFER_IMM(argw)));
1428 return -1;
1429 }
1430 }
1431
1432 return 0;
1433 }
1434
1435 /* See getput_arg below.
1436 Note: can_cache is called only for binary operators. Those
1437 operators always uses word arguments without write back. */
1438 static sljit_si can_cache(sljit_si arg, sljit_sw argw, sljit_si next_arg, sljit_sw next_argw)
1439 {
1440 /* Immediate caching is not supported as it would be an operation on constant arguments. */
1441 if (arg & SLJIT_IMM)
1442 return 0;
1443
1444 /* Always a simple operation. */
1445 if (arg & OFFS_REG_MASK)
1446 return 0;
1447
1448 if (!(arg & REG_MASK)) {
1449 /* Immediate access. */
1450 if ((next_arg & SLJIT_MEM) && ((sljit_uw)argw - (sljit_uw)next_argw <= 0xfff || (sljit_uw)next_argw - (sljit_uw)argw <= 0xfff))
1451 return 1;
1452 return 0;
1453 }
1454
1455 if (argw <= 0xfffff && argw >= -0xfffff)
1456 return 0;
1457
1458 if (argw == next_argw && (next_arg & SLJIT_MEM))
1459 return 1;
1460
1461 if (arg == next_arg && ((sljit_uw)argw - (sljit_uw)next_argw <= 0xfff || (sljit_uw)next_argw - (sljit_uw)argw <= 0xfff))
1462 return 1;
1463
1464 return 0;
1465 }
1466
1467 #define GETPUT_ARG_DATA_TRANSFER(add, wb, target, base, imm) \
1468 if (max_delta & 0xf00) \
1469 FAIL_IF(push_inst(compiler, EMIT_DATA_TRANSFER(inp_flags, add, wb, target, base, imm))); \
1470 else \
1471 FAIL_IF(push_inst(compiler, EMIT_DATA_TRANSFER(inp_flags, add, wb, target, base, TYPE2_TRANSFER_IMM(imm))));
1472
1473 #define TEST_WRITE_BACK() \
1474 if (inp_flags & WRITE_BACK) { \
1475 tmp_r = arg & REG_MASK; \
1476 if (reg == tmp_r) { \
1477 /* This can only happen for stores */ \
1478 /* since ldr reg, [reg, ...]! has no meaning */ \
1479 SLJIT_ASSERT(!(inp_flags & LOAD_DATA)); \
1480 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, TMP_REG3, SLJIT_UNUSED, RM(reg))); \
1481 reg = TMP_REG3; \
1482 } \
1483 }
1484
1485 /* Emit the necessary instructions. See can_cache above. */
1486 static sljit_si getput_arg(struct sljit_compiler *compiler, sljit_si inp_flags, sljit_si reg, sljit_si arg, sljit_sw argw, sljit_si next_arg, sljit_sw next_argw)
1487 {
1488 sljit_si tmp_r;
1489 sljit_sw max_delta;
1490 sljit_sw sign;
1491 sljit_uw imm;
1492
1493 if (arg & SLJIT_IMM) {
1494 SLJIT_ASSERT(inp_flags & LOAD_DATA);
1495 return load_immediate(compiler, reg, argw);
1496 }
1497
1498 SLJIT_ASSERT(arg & SLJIT_MEM);
1499
1500 tmp_r = (inp_flags & LOAD_DATA) ? reg : TMP_REG3;
1501 max_delta = IS_TYPE1_TRANSFER(inp_flags) ? 0xfff : 0xff;
1502
1503 if ((arg & REG_MASK) == SLJIT_UNUSED) {
1504 /* Write back is not used. */
1505 imm = (sljit_uw)(argw - compiler->cache_argw);
1506 if ((compiler->cache_arg & SLJIT_IMM) && (imm <= (sljit_uw)max_delta || imm >= (sljit_uw)-max_delta)) {
1507 if (imm <= (sljit_uw)max_delta) {
1508 sign = 1;
1509 argw = argw - compiler->cache_argw;
1510 }
1511 else {
1512 sign = 0;
1513 argw = compiler->cache_argw - argw;
1514 }
1515
1516 GETPUT_ARG_DATA_TRANSFER(sign, 0, reg, TMP_REG3, argw);
1517 return SLJIT_SUCCESS;
1518 }
1519
1520 /* With write back, we can create some sophisticated loads, but
1521 it is hard to decide whether we should convert downward (0s) or upward (1s). */
1522 imm = (sljit_uw)(argw - next_argw);
1523 if ((next_arg & SLJIT_MEM) && (imm <= (sljit_uw)max_delta || imm >= (sljit_uw)-max_delta)) {
1524 SLJIT_ASSERT(inp_flags & LOAD_DATA);
1525
1526 compiler->cache_arg = SLJIT_IMM;
1527 compiler->cache_argw = argw;
1528 tmp_r = TMP_REG3;
1529 }
1530
1531 FAIL_IF(load_immediate(compiler, tmp_r, argw));
1532 GETPUT_ARG_DATA_TRANSFER(1, 0, reg, tmp_r, 0);
1533 return SLJIT_SUCCESS;
1534 }
1535
1536 if (arg & OFFS_REG_MASK) {
1537 SLJIT_ASSERT((argw & 0x3) && !(max_delta & 0xf00));
1538 if (inp_flags & WRITE_BACK)
1539 tmp_r = arg & REG_MASK;
1540 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(ADD_DP, 0, tmp_r, arg & REG_MASK, RM(OFFS_REG(arg)) | ((argw & 0x3) << 7)));
1541 EMIT_INSTRUCTION(EMIT_DATA_TRANSFER(inp_flags, 1, 0, reg, tmp_r, TYPE2_TRANSFER_IMM(0)));
1542 return SLJIT_SUCCESS;
1543 }
1544
1545 imm = (sljit_uw)(argw - compiler->cache_argw);
1546 if (compiler->cache_arg == arg && imm <= (sljit_uw)max_delta) {
1547 SLJIT_ASSERT(!(inp_flags & WRITE_BACK));
1548 GETPUT_ARG_DATA_TRANSFER(1, 0, reg, TMP_REG3, imm);
1549 return SLJIT_SUCCESS;
1550 }
1551 if (compiler->cache_arg == arg && imm >= (sljit_uw)-max_delta) {
1552 SLJIT_ASSERT(!(inp_flags & WRITE_BACK));
1553 imm = (sljit_uw)-(sljit_sw)imm;
1554 GETPUT_ARG_DATA_TRANSFER(0, 0, reg, TMP_REG3, imm);
1555 return SLJIT_SUCCESS;
1556 }
1557
1558 imm = get_imm(argw & ~max_delta);
1559 if (imm) {
1560 TEST_WRITE_BACK();
1561 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(ADD_DP, 0, tmp_r, arg & REG_MASK, imm));
1562 GETPUT_ARG_DATA_TRANSFER(1, inp_flags & WRITE_BACK, reg, tmp_r, argw & max_delta);
1563 return SLJIT_SUCCESS;
1564 }
1565
1566 imm = get_imm(-argw & ~max_delta);
1567 if (imm) {
1568 argw = -argw;
1569 TEST_WRITE_BACK();
1570 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(SUB_DP, 0, tmp_r, arg & REG_MASK, imm));
1571 GETPUT_ARG_DATA_TRANSFER(0, inp_flags & WRITE_BACK, reg, tmp_r, argw & max_delta);
1572 return SLJIT_SUCCESS;
1573 }
1574
1575 if ((compiler->cache_arg & SLJIT_IMM) && compiler->cache_argw == argw) {
1576 TEST_WRITE_BACK();
1577 EMIT_INSTRUCTION(EMIT_DATA_TRANSFER(inp_flags, 1, inp_flags & WRITE_BACK, reg, arg & REG_MASK, RM(TMP_REG3) | (max_delta & 0xf00 ? SRC2_IMM : 0)));
1578 return SLJIT_SUCCESS;
1579 }
1580
1581 if (argw == next_argw && (next_arg & SLJIT_MEM)) {
1582 SLJIT_ASSERT(inp_flags & LOAD_DATA);
1583 FAIL_IF(load_immediate(compiler, TMP_REG3, argw));
1584
1585 compiler->cache_arg = SLJIT_IMM;
1586 compiler->cache_argw = argw;
1587
1588 TEST_WRITE_BACK();
1589 EMIT_INSTRUCTION(EMIT_DATA_TRANSFER(inp_flags, 1, inp_flags & WRITE_BACK, reg, arg & REG_MASK, RM(TMP_REG3) | (max_delta & 0xf00 ? SRC2_IMM : 0)));
1590 return SLJIT_SUCCESS;
1591 }
1592
1593 imm = (sljit_uw)(argw - next_argw);
1594 if (arg == next_arg && !(inp_flags & WRITE_BACK) && (imm <= (sljit_uw)max_delta || imm >= (sljit_uw)-max_delta)) {
1595 SLJIT_ASSERT(inp_flags & LOAD_DATA);
1596 FAIL_IF(load_immediate(compiler, TMP_REG3, argw));
1597 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(ADD_DP, 0, TMP_REG3, TMP_REG3, reg_map[arg & REG_MASK]));
1598
1599 compiler->cache_arg = arg;
1600 compiler->cache_argw = argw;
1601
1602 GETPUT_ARG_DATA_TRANSFER(1, 0, reg, TMP_REG3, 0);
1603 return SLJIT_SUCCESS;
1604 }
1605
1606 if ((arg & REG_MASK) == tmp_r) {
1607 compiler->cache_arg = SLJIT_IMM;
1608 compiler->cache_argw = argw;
1609 tmp_r = TMP_REG3;
1610 }
1611
1612 FAIL_IF(load_immediate(compiler, tmp_r, argw));
1613 EMIT_INSTRUCTION(EMIT_DATA_TRANSFER(inp_flags, 1, inp_flags & WRITE_BACK, reg, arg & REG_MASK, reg_map[tmp_r] | (max_delta & 0xf00 ? SRC2_IMM : 0)));
1614 return SLJIT_SUCCESS;
1615 }
1616
1617 static SLJIT_INLINE sljit_si emit_op_mem(struct sljit_compiler *compiler, sljit_si flags, sljit_si reg, sljit_si arg, sljit_sw argw)
1618 {
1619 if (getput_arg_fast(compiler, flags, reg, arg, argw))
1620 return compiler->error;
1621 compiler->cache_arg = 0;
1622 compiler->cache_argw = 0;
1623 return getput_arg(compiler, flags, reg, arg, argw, 0, 0);
1624 }
1625
1626 static SLJIT_INLINE sljit_si emit_op_mem2(struct sljit_compiler *compiler, sljit_si flags, sljit_si reg, sljit_si arg1, sljit_sw arg1w, sljit_si arg2, sljit_sw arg2w)
1627 {
1628 if (getput_arg_fast(compiler, flags, reg, arg1, arg1w))
1629 return compiler->error;
1630 return getput_arg(compiler, flags, reg, arg1, arg1w, arg2, arg2w);
1631 }
1632
1633 static sljit_si emit_op(struct sljit_compiler *compiler, sljit_si op, sljit_si inp_flags,
1634 sljit_si dst, sljit_sw dstw,
1635 sljit_si src1, sljit_sw src1w,
1636 sljit_si src2, sljit_sw src2w)
1637 {
1638 /* arg1 goes to TMP_REG1 or src reg
1639 arg2 goes to TMP_REG2, imm or src reg
1640 TMP_REG3 can be used for caching
1641 result goes to TMP_REG2, so put result can use TMP_REG1 and TMP_REG3. */
1642
1643 /* We prefers register and simple consts. */
1644 sljit_si dst_r;
1645 sljit_si src1_r;
1646 sljit_si src2_r = 0;
1647 sljit_si sugg_src2_r = TMP_REG2;
1648 sljit_si flags = GET_FLAGS(op) ? SET_FLAGS : 0;
1649
1650 compiler->cache_arg = 0;
1651 compiler->cache_argw = 0;
1652
1653 /* Destination check. */
1654 if (SLJIT_UNLIKELY(dst == SLJIT_UNUSED)) {
1655 if (op >= SLJIT_MOV && op <= SLJIT_MOVU_SI && !(src2 & SLJIT_MEM))
1656 return SLJIT_SUCCESS;
1657 dst_r = TMP_REG2;
1658 }
1659 else if (FAST_IS_REG(dst)) {
1660 dst_r = dst;
1661 flags |= REG_DEST;
1662 if (op >= SLJIT_MOV && op <= SLJIT_MOVU_SI)
1663 sugg_src2_r = dst_r;
1664 }
1665 else {
1666 SLJIT_ASSERT(dst & SLJIT_MEM);
1667 if (getput_arg_fast(compiler, inp_flags | ARG_TEST, TMP_REG2, dst, dstw)) {
1668 flags |= FAST_DEST;
1669 dst_r = TMP_REG2;
1670 }
1671 else {
1672 flags |= SLOW_DEST;
1673 dst_r = 0;
1674 }
1675 }
1676
1677 /* Source 1. */
1678 if (FAST_IS_REG(src1))
1679 src1_r = src1;
1680 else if (FAST_IS_REG(src2)) {
1681 flags |= ARGS_SWAPPED;
1682 src1_r = src2;
1683 src2 = src1;
1684 src2w = src1w;
1685 }
1686 else do { /* do { } while(0) is used because of breaks. */
1687 src1_r = 0;
1688 if ((inp_flags & ALLOW_ANY_IMM) && (src1 & SLJIT_IMM)) {
1689 /* The second check will generate a hit. */
1690 src2_r = get_imm(src1w);
1691 if (src2_r) {
1692 flags |= ARGS_SWAPPED;
1693 src1 = src2;
1694 src1w = src2w;
1695 break;
1696 }
1697 if (inp_flags & ALLOW_INV_IMM) {
1698 src2_r = get_imm(~src1w);
1699 if (src2_r) {
1700 flags |= ARGS_SWAPPED | INV_IMM;
1701 src1 = src2;
1702 src1w = src2w;
1703 break;
1704 }
1705 }
1706 if (GET_OPCODE(op) == SLJIT_ADD) {
1707 src2_r = get_imm(-src1w);
1708 if (src2_r) {
1709 /* Note: ARGS_SWAPPED is intentionally not applied! */
1710 src1 = src2;
1711 src1w = src2w;
1712 op = SLJIT_SUB | GET_ALL_FLAGS(op);
1713 break;
1714 }
1715 }
1716 }
1717
1718 if (getput_arg_fast(compiler, inp_flags | LOAD_DATA, TMP_REG1, src1, src1w)) {
1719 FAIL_IF(compiler->error);
1720 src1_r = TMP_REG1;
1721 }
1722 } while (0);
1723
1724 /* Source 2. */
1725 if (src2_r == 0) {
1726 if (FAST_IS_REG(src2)) {
1727 src2_r = src2;
1728 flags |= REG_SOURCE;
1729 if (!(flags & REG_DEST) && op >= SLJIT_MOV && op <= SLJIT_MOVU_SI)
1730 dst_r = src2_r;
1731 }
1732 else do { /* do { } while(0) is used because of breaks. */
1733 if ((inp_flags & ALLOW_ANY_IMM) && (src2 & SLJIT_IMM)) {
1734 src2_r = get_imm(src2w);
1735 if (src2_r)
1736 break;
1737 if (inp_flags & ALLOW_INV_IMM) {
1738 src2_r = get_imm(~src2w);
1739 if (src2_r) {
1740 flags |= INV_IMM;
1741 break;
1742 }
1743 }
1744 if (GET_OPCODE(op) == SLJIT_ADD) {
1745 src2_r = get_imm(-src2w);
1746 if (src2_r) {
1747 op = SLJIT_SUB | GET_ALL_FLAGS(op);
1748 flags &= ~ARGS_SWAPPED;
1749 break;
1750 }
1751 }
1752 if (GET_OPCODE(op) == SLJIT_SUB && !(flags & ARGS_SWAPPED)) {
1753 src2_r = get_imm(-src2w);
1754 if (src2_r) {
1755 op = SLJIT_ADD | GET_ALL_FLAGS(op);
1756 flags &= ~ARGS_SWAPPED;
1757 break;
1758 }
1759 }
1760 }
1761
1762 /* src2_r is 0. */
1763 if (getput_arg_fast(compiler, inp_flags | LOAD_DATA, sugg_src2_r, src2, src2w)) {
1764 FAIL_IF(compiler->error);
1765 src2_r = sugg_src2_r;
1766 }
1767 } while (0);
1768 }
1769
1770 /* src1_r, src2_r and dst_r can be zero (=unprocessed) or non-zero.
1771 If they are zero, they must not be registers. */
1772 if (src1_r == 0 && src2_r == 0 && dst_r == 0) {
1773 if (!can_cache(src1, src1w, src2, src2w) && can_cache(src1, src1w, dst, dstw)) {
1774 SLJIT_ASSERT(!(flags & ARGS_SWAPPED));
1775 flags |= ARGS_SWAPPED;
1776 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, TMP_REG1, src2, src2w, src1, src1w));
1777 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, TMP_REG2, src1, src1w, dst, dstw));
1778 }
1779 else {
1780 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, TMP_REG1, src1, src1w, src2, src2w));
1781 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, TMP_REG2, src2, src2w, dst, dstw));
1782 }
1783 src1_r = TMP_REG1;
1784 src2_r = TMP_REG2;
1785 }
1786 else if (src1_r == 0 && src2_r == 0) {
1787 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, TMP_REG1, src1, src1w, src2, src2w));
1788 src1_r = TMP_REG1;
1789 }
1790 else if (src1_r == 0 && dst_r == 0) {
1791 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, TMP_REG1, src1, src1w, dst, dstw));
1792 src1_r = TMP_REG1;
1793 }
1794 else if (src2_r == 0 && dst_r == 0) {
1795 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, sugg_src2_r, src2, src2w, dst, dstw));
1796 src2_r = sugg_src2_r;
1797 }
1798
1799 if (dst_r == 0)
1800 dst_r = TMP_REG2;
1801
1802 if (src1_r == 0) {
1803 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, TMP_REG1, src1, src1w, 0, 0));
1804 src1_r = TMP_REG1;
1805 }
1806
1807 if (src2_r == 0) {
1808 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, sugg_src2_r, src2, src2w, 0, 0));
1809 src2_r = sugg_src2_r;
1810 }
1811
1812 FAIL_IF(emit_single_op(compiler, op, flags, dst_r, src1_r, src2_r));
1813
1814 if (flags & (FAST_DEST | SLOW_DEST)) {
1815 if (flags & FAST_DEST)
1816 FAIL_IF(getput_arg_fast(compiler, inp_flags, dst_r, dst, dstw));
1817 else
1818 FAIL_IF(getput_arg(compiler, inp_flags, dst_r, dst, dstw, 0, 0));
1819 }
1820 return SLJIT_SUCCESS;
1821 }
1822
1823 #ifdef __cplusplus
1824 extern "C" {
1825 #endif
1826
1827 #if defined(__GNUC__)
1828 extern unsigned int __aeabi_uidivmod(unsigned int numerator, unsigned int denominator);
1829 extern int __aeabi_idivmod(int numerator, int denominator);
1830 #else
1831 #error "Software divmod functions are needed"
1832 #endif
1833
1834 #ifdef __cplusplus
1835 }
1836 #endif
1837
1838 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_op0(struct sljit_compiler *compiler, sljit_si op)
1839 {
1840 CHECK_ERROR();
1841 check_sljit_emit_op0(compiler, op);
1842
1843 op = GET_OPCODE(op);
1844 switch (op) {
1845 case SLJIT_BREAKPOINT:
1846 EMIT_INSTRUCTION(BKPT);
1847 break;
1848 case SLJIT_NOP:
1849 EMIT_INSTRUCTION(NOP);
1850 break;
1851 case SLJIT_UMUL:
1852 case SLJIT_SMUL:
1853 #if (defined SLJIT_CONFIG_ARM_V7 && SLJIT_CONFIG_ARM_V7)
1854 return push_inst(compiler, (op == SLJIT_UMUL ? UMULL : SMULL)
1855 | (reg_map[SLJIT_SCRATCH_REG2] << 16)
1856 | (reg_map[SLJIT_SCRATCH_REG1] << 12)
1857 | (reg_map[SLJIT_SCRATCH_REG1] << 8)
1858 | reg_map[SLJIT_SCRATCH_REG2]);
1859 #else
1860 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, TMP_REG1, SLJIT_UNUSED, RM(SLJIT_SCRATCH_REG2)));
1861 return push_inst(compiler, (op == SLJIT_UMUL ? UMULL : SMULL)
1862 | (reg_map[SLJIT_SCRATCH_REG2] << 16)
1863 | (reg_map[SLJIT_SCRATCH_REG1] << 12)
1864 | (reg_map[SLJIT_SCRATCH_REG1] << 8)
1865 | reg_map[TMP_REG1]);
1866 #endif
1867 case SLJIT_UDIV:
1868 case SLJIT_SDIV:
1869 if (compiler->scratches >= 3)
1870 EMIT_INSTRUCTION(0xe52d2008 /* str r2, [sp, #-8]! */);
1871 #if defined(__GNUC__)
1872 FAIL_IF(sljit_emit_ijump(compiler, SLJIT_FAST_CALL, SLJIT_IMM,
1873 (op == SLJIT_UDIV ? SLJIT_FUNC_OFFSET(__aeabi_uidivmod) : SLJIT_FUNC_OFFSET(__aeabi_idivmod))));
1874 #else
1875 #error "Software divmod functions are needed"
1876 #endif
1877 if (compiler->scratches >= 3)
1878 return push_inst(compiler, 0xe49d2008 /* ldr r2, [sp], #8 */);
1879 return SLJIT_SUCCESS;
1880 }
1881
1882 return SLJIT_SUCCESS;
1883 }
1884
1885 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_op1(struct sljit_compiler *compiler, sljit_si op,
1886 sljit_si dst, sljit_sw dstw,
1887 sljit_si src, sljit_sw srcw)
1888 {
1889 CHECK_ERROR();
1890 check_sljit_emit_op1(compiler, op, dst, dstw, src, srcw);
1891 ADJUST_LOCAL_OFFSET(dst, dstw);
1892 ADJUST_LOCAL_OFFSET(src, srcw);
1893
1894 switch (GET_OPCODE(op)) {
1895 case SLJIT_MOV:
1896 case SLJIT_MOV_UI:
1897 case SLJIT_MOV_SI:
1898 case SLJIT_MOV_P:
1899 return emit_op(compiler, SLJIT_MOV, ALLOW_ANY_IMM, dst, dstw, TMP_REG1, 0, src, srcw);
1900
1901 case SLJIT_MOV_UB:
1902 return emit_op(compiler, SLJIT_MOV_UB, ALLOW_ANY_IMM | BYTE_DATA, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_ub)srcw : srcw);
1903
1904 case SLJIT_MOV_SB:
1905 return emit_op(compiler, SLJIT_MOV_SB, ALLOW_ANY_IMM | SIGNED_DATA | BYTE_DATA, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_sb)srcw : srcw);
1906
1907 case SLJIT_MOV_UH:
1908 return emit_op(compiler, SLJIT_MOV_UH, ALLOW_ANY_IMM | HALF_DATA, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_uh)srcw : srcw);
1909
1910 case SLJIT_MOV_SH:
1911 return emit_op(compiler, SLJIT_MOV_SH, ALLOW_ANY_IMM | SIGNED_DATA | HALF_DATA, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_sh)srcw : srcw);
1912
1913 case SLJIT_MOVU:
1914 case SLJIT_MOVU_UI:
1915 case SLJIT_MOVU_SI:
1916 case SLJIT_MOVU_P:
1917 return emit_op(compiler, SLJIT_MOV, ALLOW_ANY_IMM | WRITE_BACK, dst, dstw, TMP_REG1, 0, src, srcw);
1918
1919 case SLJIT_MOVU_UB:
1920 return emit_op(compiler, SLJIT_MOV_UB, ALLOW_ANY_IMM | BYTE_DATA | WRITE_BACK, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_ub)srcw : srcw);
1921
1922 case SLJIT_MOVU_SB:
1923 return emit_op(compiler, SLJIT_MOV_SB, ALLOW_ANY_IMM | SIGNED_DATA | BYTE_DATA | WRITE_BACK, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_sb)srcw : srcw);
1924
1925 case SLJIT_MOVU_UH:
1926 return emit_op(compiler, SLJIT_MOV_UH, ALLOW_ANY_IMM | HALF_DATA | WRITE_BACK, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_uh)srcw : srcw);
1927
1928 case SLJIT_MOVU_SH:
1929 return emit_op(compiler, SLJIT_MOV_SH, ALLOW_ANY_IMM | SIGNED_DATA | HALF_DATA | WRITE_BACK, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_sh)srcw : srcw);
1930
1931 case SLJIT_NOT:
1932 return emit_op(compiler, op, ALLOW_ANY_IMM, dst, dstw, TMP_REG1, 0, src, srcw);
1933
1934 case SLJIT_NEG:
1935 #if (defined SLJIT_VERBOSE && SLJIT_VERBOSE) || (defined SLJIT_DEBUG && SLJIT_DEBUG)
1936 compiler->skip_checks = 1;
1937 #endif
1938 return sljit_emit_op2(compiler, SLJIT_SUB | GET_ALL_FLAGS(op), dst, dstw, SLJIT_IMM, 0, src, srcw);
1939
1940 case SLJIT_CLZ:
1941 return emit_op(compiler, op, 0, dst, dstw, TMP_REG1, 0, src, srcw);
1942 }
1943
1944 return SLJIT_SUCCESS;
1945 }
1946
1947 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_op2(struct sljit_compiler *compiler, sljit_si op,
1948 sljit_si dst, sljit_sw dstw,
1949 sljit_si src1, sljit_sw src1w,
1950 sljit_si src2, sljit_sw src2w)
1951 {
1952 CHECK_ERROR();
1953 check_sljit_emit_op2(compiler, op, dst, dstw, src1, src1w, src2, src2w);
1954 ADJUST_LOCAL_OFFSET(dst, dstw);
1955 ADJUST_LOCAL_OFFSET(src1, src1w);
1956 ADJUST_LOCAL_OFFSET(src2, src2w);
1957
1958 switch (GET_OPCODE(op)) {
1959 case SLJIT_ADD:
1960 case SLJIT_ADDC:
1961 case SLJIT_SUB:
1962 case SLJIT_SUBC:
1963 case SLJIT_OR:
1964 case SLJIT_XOR:
1965 return emit_op(compiler, op, ALLOW_IMM, dst, dstw, src1, src1w, src2, src2w);
1966
1967 case SLJIT_MUL:
1968 return emit_op(compiler, op, 0, dst, dstw, src1, src1w, src2, src2w);
1969
1970 case SLJIT_AND:
1971 return emit_op(compiler, op, ALLOW_ANY_IMM, dst, dstw, src1, src1w, src2, src2w);
1972
1973 case SLJIT_SHL:
1974 case SLJIT_LSHR:
1975 case SLJIT_ASHR:
1976 if (src2 & SLJIT_IMM) {
1977 compiler->shift_imm = src2w & 0x1f;
1978 return emit_op(compiler, op, 0, dst, dstw, TMP_REG1, 0, src1, src1w);
1979 }
1980 else {
1981 compiler->shift_imm = 0x20;
1982 return emit_op(compiler, op, 0, dst, dstw, src1, src1w, src2, src2w);
1983 }
1984 }
1985
1986 return SLJIT_SUCCESS;
1987 }
1988
1989 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_get_register_index(sljit_si reg)
1990 {
1991 check_sljit_get_register_index(reg);
1992 return reg_map[reg];
1993 }
1994
1995 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_get_float_register_index(sljit_si reg)
1996 {
1997 check_sljit_get_float_register_index(reg);
1998 return reg;
1999 }
2000
2001 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_op_custom(struct sljit_compiler *compiler,
2002 void *instruction, sljit_si size)
2003 {
2004 CHECK_ERROR();
2005 check_sljit_emit_op_custom(compiler, instruction, size);
2006 SLJIT_ASSERT(size == 4);
2007
2008 return push_inst(compiler, *(sljit_uw*)instruction);
2009 }
2010
2011 /* --------------------------------------------------------------------- */
2012 /* Floating point operators */
2013 /* --------------------------------------------------------------------- */
2014
2015 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
2016
2017 /* 0 - no fpu
2018 1 - vfp */
2019 static sljit_si arm_fpu_type = -1;
2020
2021 static void init_compiler(void)
2022 {
2023 if (arm_fpu_type != -1)
2024 return;
2025
2026 /* TODO: Only the OS can help to determine the correct fpu type. */
2027 arm_fpu_type = 1;
2028 }
2029
2030 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_is_fpu_available(void)
2031 {
2032 if (arm_fpu_type == -1)
2033 init_compiler();
2034 return arm_fpu_type;
2035 }
2036
2037 #else
2038
2039 #define arm_fpu_type 1
2040
2041 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_is_fpu_available(void)
2042 {
2043 /* Always available. */
2044 return 1;
2045 }
2046
2047 #endif
2048
2049 #define FPU_LOAD (1 << 20)
2050 #define EMIT_FPU_DATA_TRANSFER(inst, add, base, freg, offs) \
2051 ((inst) | ((add) << 23) | (reg_map[base] << 16) | (freg << 12) | (offs))
2052 #define EMIT_FPU_OPERATION(opcode, mode, dst, src1, src2) \
2053 ((opcode) | (mode) | ((dst) << 12) | (src1) | ((src2) << 16))
2054
2055 static sljit_si emit_fop_mem(struct sljit_compiler *compiler, sljit_si flags, sljit_si reg, sljit_si arg, sljit_sw argw)
2056 {
2057 sljit_sw tmp;
2058 sljit_uw imm;
2059 sljit_sw inst = VSTR_F32 | (flags & (SLJIT_SINGLE_OP | FPU_LOAD));
2060 SLJIT_ASSERT(arg & SLJIT_MEM);
2061
2062 if (SLJIT_UNLIKELY(arg & OFFS_REG_MASK)) {
2063 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(ADD_DP, 0, TMP_REG1, arg & REG_MASK, RM(OFFS_REG(arg)) | ((argw & 0x3) << 7)));
2064 arg = SLJIT_MEM | TMP_REG1;
2065 argw = 0;
2066 }
2067
2068 /* Fast loads and stores. */
2069 if ((arg & REG_MASK)) {
2070 if (!(argw & ~0x3fc))
2071 return push_inst(compiler, EMIT_FPU_DATA_TRANSFER(inst, 1, arg & REG_MASK, reg, argw >> 2));
2072 if (!(-argw & ~0x3fc))
2073 return push_inst(compiler, EMIT_FPU_DATA_TRANSFER(inst, 0, arg & REG_MASK, reg, (-argw) >> 2));
2074 }
2075
2076 if (compiler->cache_arg == arg) {
2077 tmp = argw - compiler->cache_argw;
2078 if (!(tmp & ~0x3fc))
2079 return push_inst(compiler, EMIT_FPU_DATA_TRANSFER(inst, 1, TMP_REG3, reg, tmp >> 2));
2080 if (!(-tmp & ~0x3fc))
2081 return push_inst(compiler, EMIT_FPU_DATA_TRANSFER(inst, 0, TMP_REG3, reg, -tmp >> 2));
2082 if (emit_set_delta(compiler, TMP_REG3, TMP_REG3, tmp) != SLJIT_ERR_UNSUPPORTED) {
2083 FAIL_IF(compiler->error);
2084 compiler->cache_argw = argw;
2085 return push_inst(compiler, EMIT_FPU_DATA_TRANSFER(inst, 1, TMP_REG3, reg, 0));
2086 }
2087 }
2088
2089 if (arg & REG_MASK) {
2090 if (emit_set_delta(compiler, TMP_REG1, arg & REG_MASK, argw) != SLJIT_ERR_UNSUPPORTED) {
2091 FAIL_IF(compiler->error);
2092 return push_inst(compiler, EMIT_FPU_DATA_TRANSFER(inst, 1, TMP_REG1, reg, 0));
2093 }
2094 imm = get_imm(argw & ~0x3fc);
2095 if (imm) {
2096 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(ADD_DP, 0, TMP_REG1, arg & REG_MASK, imm));
2097 return push_inst(compiler, EMIT_FPU_DATA_TRANSFER(inst, 1, TMP_REG1, reg, (argw & 0x3fc) >> 2));
2098 }
2099 imm = get_imm(-argw & ~0x3fc);
2100 if (imm) {
2101 argw = -argw;
2102 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(SUB_DP, 0, TMP_REG1, arg & REG_MASK, imm));
2103 return push_inst(compiler, EMIT_FPU_DATA_TRANSFER(inst, 0, TMP_REG1, reg, (argw & 0x3fc) >> 2));
2104 }
2105 }
2106
2107 compiler->cache_arg = arg;
2108 compiler->cache_argw = argw;
2109 if (arg & REG_MASK) {
2110 FAIL_IF(load_immediate(compiler, TMP_REG1, argw));
2111 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(ADD_DP, 0, TMP_REG3, arg & REG_MASK, reg_map[TMP_REG1]));
2112 }
2113 else
2114 FAIL_IF(load_immediate(compiler, TMP_REG3, argw));
2115
2116 return push_inst(compiler, EMIT_FPU_DATA_TRANSFER(inst, 1, TMP_REG3, reg, 0));
2117 }
2118
2119 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_fop1(struct sljit_compiler *compiler, sljit_si op,
2120 sljit_si dst, sljit_sw dstw,
2121 sljit_si src, sljit_sw srcw)
2122 {
2123 sljit_si dst_fr;
2124
2125 CHECK_ERROR();
2126 check_sljit_emit_fop1(compiler, op, dst, dstw, src, srcw);
2127 SLJIT_COMPILE_ASSERT((SLJIT_SINGLE_OP == 0x100), float_transfer_bit_error);
2128
2129 compiler->cache_arg = 0;
2130 compiler->cache_argw = 0;
2131 op ^= SLJIT_SINGLE_OP;
2132
2133 if (GET_OPCODE(op) == SLJIT_CMPD) {
2134 if (dst & SLJIT_MEM) {
2135 FAIL_IF(emit_fop_mem(compiler, (op & SLJIT_SINGLE_OP) | FPU_LOAD, TMP_FREG1, dst, dstw));
2136 dst = TMP_FREG1;
2137 }
2138 if (src & SLJIT_MEM) {
2139 FAIL_IF(emit_fop_mem(compiler, (op & SLJIT_SINGLE_OP) | FPU_LOAD, TMP_FREG2, src, srcw));
2140 src = TMP_FREG2;
2141 }
2142 EMIT_INSTRUCTION(EMIT_FPU_OPERATION(VCMP_F32, op & SLJIT_SINGLE_OP, dst, src, 0));
2143 EMIT_INSTRUCTION(VMRS);
2144 return SLJIT_SUCCESS;
2145 }
2146
2147 dst_fr = FAST_IS_REG(dst) ? dst : TMP_FREG1;
2148
2149 if (src & SLJIT_MEM) {
2150 FAIL_IF(emit_fop_mem(compiler, (op & SLJIT_SINGLE_OP) | FPU_LOAD, dst_fr, src, srcw));
2151 src = dst_fr;
2152 }
2153
2154 switch (GET_OPCODE(op)) {
2155 case SLJIT_MOVD:
2156 if (src != dst_fr && dst_fr != TMP_FREG1)
2157 EMIT_INSTRUCTION(EMIT_FPU_OPERATION(VMOV_F32, op & SLJIT_SINGLE_OP, dst_fr, src, 0));
2158 break;
2159 case SLJIT_NEGD:
2160 EMIT_INSTRUCTION(EMIT_FPU_OPERATION(VNEG_F32, op & SLJIT_SINGLE_OP, dst_fr, src, 0));
2161 break;
2162 case SLJIT_ABSD:
2163 EMIT_INSTRUCTION(EMIT_FPU_OPERATION(VABS_F32, op & SLJIT_SINGLE_OP, dst_fr, src, 0));
2164 break;
2165 }
2166
2167 if (dst_fr == TMP_FREG1) {
2168 if (GET_OPCODE(op) == SLJIT_MOVD)
2169 dst_fr = src;
2170 FAIL_IF(emit_fop_mem(compiler, (op & SLJIT_SINGLE_OP), dst_fr, dst, dstw));
2171 }
2172
2173 return SLJIT_SUCCESS;
2174 }
2175
2176 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_fop2(struct sljit_compiler *compiler, sljit_si op,
2177 sljit_si dst, sljit_sw dstw,
2178 sljit_si src1, sljit_sw src1w,
2179 sljit_si src2, sljit_sw src2w)
2180 {
2181 sljit_si dst_fr;
2182
2183 CHECK_ERROR();
2184 check_sljit_emit_fop2(compiler, op, dst, dstw, src1, src1w, src2, src2w);
2185
2186 compiler->cache_arg = 0;
2187 compiler->cache_argw = 0;
2188 op ^= SLJIT_SINGLE_OP;
2189
2190 dst_fr = FAST_IS_REG(dst) ? dst : TMP_FREG1;
2191
2192 if (src2 & SLJIT_MEM) {
2193 FAIL_IF(emit_fop_mem(compiler, (op & SLJIT_SINGLE_OP) | FPU_LOAD, TMP_FREG2, src2, src2w));
2194 src2 = TMP_FREG2;
2195 }
2196
2197 if (src1 & SLJIT_MEM) {
2198 FAIL_IF(emit_fop_mem(compiler, (op & SLJIT_SINGLE_OP) | FPU_LOAD, TMP_FREG1, src1, src1w));
2199 src1 = TMP_FREG1;
2200 }
2201
2202 switch (GET_OPCODE(op)) {
2203 case SLJIT_ADDD:
2204 EMIT_INSTRUCTION(EMIT_FPU_OPERATION(VADD_F32, op & SLJIT_SINGLE_OP, dst_fr, src2, src1));
2205 break;
2206
2207 case SLJIT_SUBD:
2208 EMIT_INSTRUCTION(EMIT_FPU_OPERATION(VSUB_F32, op & SLJIT_SINGLE_OP, dst_fr, src2, src1));
2209 break;
2210
2211 case SLJIT_MULD:
2212 EMIT_INSTRUCTION(EMIT_FPU_OPERATION(VMUL_F32, op & SLJIT_SINGLE_OP, dst_fr, src2, src1));
2213 break;
2214
2215 case SLJIT_DIVD:
2216 EMIT_INSTRUCTION(EMIT_FPU_OPERATION(VDIV_F32, op & SLJIT_SINGLE_OP, dst_fr, src2, src1));
2217 break;
2218 }
2219
2220 if (dst_fr == TMP_FREG1)
2221 FAIL_IF(emit_fop_mem(compiler, (op & SLJIT_SINGLE_OP), TMP_FREG1, dst, dstw));
2222
2223 return SLJIT_SUCCESS;
2224 }
2225
2226 #undef FPU_LOAD
2227 #undef EMIT_FPU_DATA_TRANSFER
2228 #undef EMIT_FPU_OPERATION
2229
2230 /* --------------------------------------------------------------------- */
2231 /* Other instructions */
2232 /* --------------------------------------------------------------------- */
2233
2234 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_fast_enter(struct sljit_compiler *compiler, sljit_si dst, sljit_sw dstw)
2235 {
2236 CHECK_ERROR();
2237 check_sljit_emit_fast_enter(compiler, dst, dstw);
2238 ADJUST_LOCAL_OFFSET(dst, dstw);
2239
2240 /* For UNUSED dst. Uncommon, but possible. */
2241 if (dst == SLJIT_UNUSED)
2242 return SLJIT_SUCCESS;
2243
2244 if (FAST_IS_REG(dst))
2245 return push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, 0, dst, SLJIT_UNUSED, RM(TMP_REG3)));
2246
2247 /* Memory. */
2248 if (getput_arg_fast(compiler, WORD_DATA, TMP_REG3, dst, dstw))
2249 return compiler->error;
2250 /* TMP_REG3 is used for caching. */
2251 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, TMP_REG2, SLJIT_UNUSED, RM(TMP_REG3)));
2252 compiler->cache_arg = 0;
2253 compiler->cache_argw = 0;
2254 return getput_arg(compiler, WORD_DATA, TMP_REG2, dst, dstw, 0, 0);
2255 }
2256
2257 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_fast_return(struct sljit_compiler *compiler, sljit_si src, sljit_sw srcw)
2258 {
2259 CHECK_ERROR();
2260 check_sljit_emit_fast_return(compiler, src, srcw);
2261 ADJUST_LOCAL_OFFSET(src, srcw);
2262
2263 if (FAST_IS_REG(src))
2264 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, TMP_REG3, SLJIT_UNUSED, RM(src)));
2265 else if (src & SLJIT_MEM) {
2266 if (getput_arg_fast(compiler, WORD_DATA | LOAD_DATA, TMP_REG3, src, srcw))
2267 FAIL_IF(compiler->error);
2268 else {
2269 compiler->cache_arg = 0;
2270 compiler->cache_argw = 0;
2271 FAIL_IF(getput_arg(compiler, WORD_DATA | LOAD_DATA, TMP_REG2, src, srcw, 0, 0));
2272 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, TMP_REG3, SLJIT_UNUSED, RM(TMP_REG2)));
2273 }
2274 }
2275 else if (src & SLJIT_IMM)
2276 FAIL_IF(load_immediate(compiler, TMP_REG3, srcw));
2277 return push_inst(compiler, BLX | RM(TMP_REG3));
2278 }
2279
2280 /* --------------------------------------------------------------------- */
2281 /* Conditional instructions */
2282 /* --------------------------------------------------------------------- */
2283
2284 static sljit_uw get_cc(sljit_si type)
2285 {
2286 switch (type) {
2287 case SLJIT_C_EQUAL:
2288 case SLJIT_C_MUL_NOT_OVERFLOW:
2289 case SLJIT_C_FLOAT_EQUAL:
2290 return 0x00000000;
2291
2292 case SLJIT_C_NOT_EQUAL:
2293 case SLJIT_C_MUL_OVERFLOW:
2294 case SLJIT_C_FLOAT_NOT_EQUAL:
2295 return 0x10000000;
2296
2297 case SLJIT_C_LESS:
2298 case SLJIT_C_FLOAT_LESS:
2299 return 0x30000000;
2300
2301 case SLJIT_C_GREATER_EQUAL:
2302 case SLJIT_C_FLOAT_GREATER_EQUAL:
2303 return 0x20000000;
2304
2305 case SLJIT_C_GREATER:
2306 case SLJIT_C_FLOAT_GREATER:
2307 return 0x80000000;
2308
2309 case SLJIT_C_LESS_EQUAL:
2310 case SLJIT_C_FLOAT_LESS_EQUAL:
2311 return 0x90000000;
2312
2313 case SLJIT_C_SIG_LESS:
2314 return 0xb0000000;
2315
2316 case SLJIT_C_SIG_GREATER_EQUAL:
2317 return 0xa0000000;
2318
2319 case SLJIT_C_SIG_GREATER:
2320 return 0xc0000000;
2321
2322 case SLJIT_C_SIG_LESS_EQUAL:
2323 return 0xd0000000;
2324
2325 case SLJIT_C_OVERFLOW:
2326 case SLJIT_C_FLOAT_UNORDERED:
2327 return 0x60000000;
2328
2329 case SLJIT_C_NOT_OVERFLOW:
2330 case SLJIT_C_FLOAT_ORDERED:
2331 return 0x70000000;
2332
2333 default: /* SLJIT_JUMP */
2334 return 0xe0000000;
2335 }
2336 }
2337
2338 SLJIT_API_FUNC_ATTRIBUTE struct sljit_label* sljit_emit_label(struct sljit_compiler *compiler)
2339 {
2340 struct sljit_label *label;
2341
2342 CHECK_ERROR_PTR();
2343 check_sljit_emit_label(compiler);
2344
2345 if (compiler->last_label && compiler->last_label->size == compiler->size)
2346 return compiler->last_label;
2347
2348 label = (struct sljit_label*)ensure_abuf(compiler, sizeof(struct sljit_label));
2349 PTR_FAIL_IF(!label);
2350 set_label(label, compiler);
2351 return label;
2352 }
2353
2354 SLJIT_API_FUNC_ATTRIBUTE struct sljit_jump* sljit_emit_jump(struct sljit_compiler *compiler, sljit_si type)
2355 {
2356 struct sljit_jump *jump;
2357
2358 CHECK_ERROR_PTR();
2359 check_sljit_emit_jump(compiler, type);
2360
2361 jump = (struct sljit_jump*)ensure_abuf(compiler, sizeof(struct sljit_jump));
2362 PTR_FAIL_IF(!jump);
2363 set_jump(jump, compiler, type & SLJIT_REWRITABLE_JUMP);
2364 type &= 0xff;
2365
2366 /* In ARM, we don't need to touch the arguments. */
2367 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
2368 if (type >= SLJIT_FAST_CALL)
2369 PTR_FAIL_IF(prepare_blx(compiler));
2370 PTR_FAIL_IF(push_inst_with_unique_literal(compiler, ((EMIT_DATA_TRANSFER(WORD_DATA | LOAD_DATA, 1, 0,
2371 type <= SLJIT_JUMP ? TMP_PC : TMP_REG1, TMP_PC, 0)) & ~COND_MASK) | get_cc(type), 0));
2372
2373 if (jump->flags & SLJIT_REWRITABLE_JUMP) {
2374 jump->addr = compiler->size;
2375 compiler->patches++;
2376 }
2377
2378 if (type >= SLJIT_FAST_CALL) {
2379 jump->flags |= IS_BL;
2380 PTR_FAIL_IF(emit_blx(compiler));
2381 }
2382
2383 if (!(jump->flags & SLJIT_REWRITABLE_JUMP))
2384 jump->addr = compiler->size;
2385 #else
2386 if (type >= SLJIT_FAST_CALL)
2387 jump->flags |= IS_BL;
2388 PTR_FAIL_IF(emit_imm(compiler, TMP_REG1, 0));
2389 PTR_FAIL_IF(push_inst(compiler, (((type <= SLJIT_JUMP ? BX : BLX) | RM(TMP_REG1)) & ~COND_MASK) | get_cc(type)));
2390 jump->addr = compiler->size;
2391 #endif
2392 return jump;
2393 }
2394
2395 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_ijump(struct sljit_compiler *compiler, sljit_si type, sljit_si src, sljit_sw srcw)
2396 {
2397 struct sljit_jump *jump;
2398
2399 CHECK_ERROR();
2400 check_sljit_emit_ijump(compiler, type, src, srcw);
2401 ADJUST_LOCAL_OFFSET(src, srcw);
2402
2403 /* In ARM, we don't need to touch the arguments. */
2404 if (!(src & SLJIT_IMM)) {
2405 if (FAST_IS_REG(src))
2406 return push_inst(compiler, (type <= SLJIT_JUMP ? BX : BLX) | RM(src));
2407
2408 SLJIT_ASSERT(src & SLJIT_MEM);
2409 FAIL_IF(emit_op_mem(compiler, WORD_DATA | LOAD_DATA, TMP_REG2, src, srcw));
2410 return push_inst(compiler, (type <= SLJIT_JUMP ? BX : BLX) | RM(TMP_REG2));
2411 }
2412
2413 jump = (struct sljit_jump*)ensure_abuf(compiler, sizeof(struct sljit_jump));
2414 FAIL_IF(!jump);
2415 set_jump(jump, compiler, JUMP_ADDR | ((type >= SLJIT_FAST_CALL) ? IS_BL : 0));
2416 jump->u.target = srcw;
2417
2418 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
2419 if (type >= SLJIT_FAST_CALL)
2420 FAIL_IF(prepare_blx(compiler));
2421 FAIL_IF(push_inst_with_unique_literal(compiler, EMIT_DATA_TRANSFER(WORD_DATA | LOAD_DATA, 1, 0, type <= SLJIT_JUMP ? TMP_PC : TMP_REG1, TMP_PC, 0), 0));
2422 if (type >= SLJIT_FAST_CALL)
2423 FAIL_IF(emit_blx(compiler));
2424 #else
2425 FAIL_IF(emit_imm(compiler, TMP_REG1, 0));
2426 FAIL_IF(push_inst(compiler, (type <= SLJIT_JUMP ? BX : BLX) | RM(TMP_REG1)));
2427 #endif
2428 jump->addr = compiler->size;
2429 return SLJIT_SUCCESS;
2430 }
2431
2432 SLJIT_API_FUNC_ATTRIBUTE sljit_si sljit_emit_op_flags(struct sljit_compiler *compiler, sljit_si op,
2433 sljit_si dst, sljit_sw dstw,
2434 sljit_si src, sljit_sw srcw,
2435 sljit_si type)
2436 {
2437 sljit_si dst_r, flags = GET_ALL_FLAGS(op);
2438 sljit_uw cc, ins;
2439
2440 CHECK_ERROR();
2441 check_sljit_emit_op_flags(compiler, op, dst, dstw, src, srcw, type);
2442 ADJUST_LOCAL_OFFSET(dst, dstw);
2443 ADJUST_LOCAL_OFFSET(src, srcw);
2444
2445 if (dst == SLJIT_UNUSED)
2446 return SLJIT_SUCCESS;
2447
2448 op = GET_OPCODE(op);
2449 cc = get_cc(type);
2450 dst_r = FAST_IS_REG(dst) ? dst : TMP_REG2;
2451
2452 if (op < SLJIT_ADD) {
2453 EMIT_INSTRUCTION(EMIT_DATA_PROCESS_INS(MOV_DP, 0, dst_r, SLJIT_UNUSED, SRC2_IMM | 0));
2454 EMIT_INSTRUCTION((EMIT_DATA_PROCESS_INS(MOV_DP, 0, dst_r, SLJIT_UNUSED, SRC2_IMM | 1) & ~COND_MASK) | cc);
2455 return (dst_r == TMP_REG2) ? emit_op_mem(compiler, WORD_DATA, TMP_REG2, dst, dstw) : SLJIT_SUCCESS;
2456 }
2457
2458 ins = (op == SLJIT_AND ? AND_DP : (op == SLJIT_OR ? ORR_DP : EOR_DP));
2459 if ((op == SLJIT_OR || op == SLJIT_XOR) && FAST_IS_REG(dst) && dst == src) {
2460 EMIT_INSTRUCTION((EMIT_DATA_PROCESS_INS(ins, 0, dst, dst, SRC2_IMM | 1) & ~COND_MASK) | cc);
2461 /* The condition must always be set, even if the ORR/EOR is not executed above. */
2462 return (flags & SLJIT_SET_E) ? push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, SET_FLAGS, TMP_REG1, SLJIT_UNUSED, RM(dst))) : SLJIT_SUCCESS;
2463 }
2464
2465 compiler->cache_arg = 0;
2466 compiler->cache_argw = 0;
2467 if (src & SLJIT_MEM) {
2468 FAIL_IF(emit_op_mem2(compiler, WORD_DATA | LOAD_DATA, TMP_REG1, src, srcw, dst, dstw));
2469 src = TMP_REG1;
2470 srcw = 0;
2471 } else if (src & SLJIT_IMM) {
2472 FAIL_IF(load_immediate(compiler, TMP_REG1, srcw));
2473 src = TMP_REG1;
2474 srcw = 0;
2475 }
2476
2477 EMIT_INSTRUCTION((EMIT_DATA_PROCESS_INS(ins, 0, dst_r, src, SRC2_IMM | 1) & ~COND_MASK) | cc);
2478 EMIT_INSTRUCTION((EMIT_DATA_PROCESS_INS(ins, 0, dst_r, src, SRC2_IMM | 0) & ~COND_MASK) | (cc ^ 0x10000000));
2479 if (dst_r == TMP_REG2)
2480 FAIL_IF(emit_op_mem2(compiler, WORD_DATA, TMP_REG2, dst, dstw, 0, 0));
2481
2482 return (flags & SLJIT_SET_E) ? push_inst(compiler, EMIT_DATA_PROCESS_INS(MOV_DP, SET_FLAGS, TMP_REG1, SLJIT_UNUSED, RM(dst_r))) : SLJIT_SUCCESS;
2483 }
2484
2485 SLJIT_API_FUNC_ATTRIBUTE struct sljit_const* sljit_emit_const(struct sljit_compiler *compiler, sljit_si dst, sljit_sw dstw, sljit_sw init_value)
2486 {
2487 struct sljit_const *const_;
2488 sljit_si reg;
2489
2490 CHECK_ERROR_PTR();
2491 check_sljit_emit_const(compiler, dst, dstw, init_value);
2492 ADJUST_LOCAL_OFFSET(dst, dstw);
2493
2494 const_ = (struct sljit_const*)ensure_abuf(compiler, sizeof(struct sljit_const));
2495 PTR_FAIL_IF(!const_);
2496
2497 reg = SLOW_IS_REG(dst) ? dst : TMP_REG2;
2498
2499 #if (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5)
2500 PTR_FAIL_IF(push_inst_with_unique_literal(compiler, EMIT_DATA_TRANSFER(WORD_DATA | LOAD_DATA, 1, 0, reg, TMP_PC, 0), init_value));
2501 compiler->patches++;
2502 #else
2503 PTR_FAIL_IF(emit_imm(compiler, reg, init_value));
2504 #endif
2505 set_const(const_, compiler);
2506
2507 if (dst & SLJIT_MEM)
2508 PTR_FAIL_IF(emit_op_mem(compiler, WORD_DATA, TMP_REG2, dst, dstw));
2509 return const_;
2510 }
2511
2512 SLJIT_API_FUNC_ATTRIBUTE void sljit_set_jump_addr(sljit_uw addr, sljit_uw new_addr)
2513 {
2514 inline_set_jump_addr(addr, new_addr, 1);
2515 }
2516
2517 SLJIT_API_FUNC_ATTRIBUTE void sljit_set_const(sljit_uw addr, sljit_sw new_constant)
2518 {
2519 inline_set_const(addr, new_constant, 1);
2520 }

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