/[pcre]/code/trunk/sljit/sljitNativeMIPS_common.c
ViewVC logotype

Contents of /code/trunk/sljit/sljitNativeMIPS_common.c

Parent Directory Parent Directory | Revision Log Revision Log


Revision 839 - (show annotations)
Fri Dec 30 13:22:28 2011 UTC (7 years, 10 months ago) by zherczeg
File MIME type: text/plain
File size: 57385 byte(s)
endianness fixes and JIT compiler update
1 /*
2 * Stack-less Just-In-Time compiler
3 *
4 * Copyright 2009-2012 Zoltan Herczeg (hzmester@freemail.hu). All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without modification, are
7 * permitted provided that the following conditions are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright notice, this list of
10 * conditions and the following disclaimer.
11 *
12 * 2. Redistributions in binary form must reproduce the above copyright notice, this list
13 * of conditions and the following disclaimer in the documentation and/or other materials
14 * provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER(S) AND CONTRIBUTORS ``AS IS'' AND ANY
17 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
19 * SHALL THE COPYRIGHT HOLDER(S) OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
21 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
22 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
24 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 */
26
27 SLJIT_API_FUNC_ATTRIBUTE SLJIT_CONST char* sljit_get_platform_name()
28 {
29 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
30 return "mips-32";
31 #else
32 #error "mips-64 is not yet supported"
33 #endif
34 }
35
36 /* Latest MIPS architecture. */
37 /* Detect SLJIT_MIPS_32_64 */
38
39 /* Length of an instruction word
40 Both for mips-32 and mips-64 */
41 typedef sljit_ui sljit_ins;
42
43 #define TMP_REG1 (SLJIT_NO_REGISTERS + 1)
44 #define TMP_REG2 (SLJIT_NO_REGISTERS + 2)
45 #define TMP_REG3 (SLJIT_NO_REGISTERS + 3)
46 #define REAL_STACK_PTR (SLJIT_NO_REGISTERS + 4)
47
48 /* For position independent code, t9 must contain the function address. */
49 #define PIC_ADDR_REG TMP_REG2
50
51 /* TMP_EREG1 is used mainly for literal encoding on 64 bit. */
52 #define TMP_EREG1 15
53 #define TMP_EREG2 24
54 /* Floating point status register. */
55 #define FCSR_REG 31
56 /* Return address register. */
57 #define RETURN_ADDR_REG 31
58
59 /* Flags are keept in volatile registers. */
60 #define EQUAL_FLAG 7
61 /* And carry flag as well. */
62 #define ULESS_FLAG 10
63 #define UGREATER_FLAG 11
64 #define LESS_FLAG 12
65 #define GREATER_FLAG 13
66 #define OVERFLOW_FLAG 14
67
68 #define TMP_FREG1 (SLJIT_FLOAT_REG4 + 1)
69 #define TMP_FREG2 (SLJIT_FLOAT_REG4 + 2)
70
71 /* --------------------------------------------------------------------- */
72 /* Instrucion forms */
73 /* --------------------------------------------------------------------- */
74
75 #define S(s) (reg_map[s] << 21)
76 #define T(t) (reg_map[t] << 16)
77 #define D(d) (reg_map[d] << 11)
78 /* Absolute registers. */
79 #define SA(s) ((s) << 21)
80 #define TA(t) ((t) << 16)
81 #define DA(d) ((d) << 11)
82 #define FT(t) ((t) << (16 + 1))
83 #define FS(s) ((s) << (11 + 1))
84 #define FD(d) ((d) << (6 + 1))
85 #define IMM(imm) ((imm) & 0xffff)
86 #define SH_IMM(imm) ((imm & 0x1f) << 6)
87
88 #define DR(dr) (reg_map[dr])
89 #define HI(opcode) ((opcode) << 26)
90 #define LO(opcode) (opcode)
91 #define FMT_D (17 << 21)
92
93 #define ABS_D (HI(17) | FMT_D | LO(5))
94 #define ADD_D (HI(17) | FMT_D | LO(0))
95 #define ADDU (HI(0) | LO(33))
96 #define ADDIU (HI(9))
97 #define AND (HI(0) | LO(36))
98 #define ANDI (HI(12))
99 #define B (HI(4))
100 #define BAL (HI(1) | (17 << 16))
101 #define BC1F (HI(17) | (8 << 21))
102 #define BC1T (HI(17) | (8 << 21) | (1 << 16))
103 #define BEQ (HI(4))
104 #define BGEZ (HI(1) | (1 << 16))
105 #define BGTZ (HI(7))
106 #define BLEZ (HI(6))
107 #define BLTZ (HI(1) | (0 << 16))
108 #define BNE (HI(5))
109 #define BREAK (HI(0) | LO(13))
110 #define C_UN_D (HI(17) | FMT_D | LO(49))
111 #define C_UEQ_D (HI(17) | FMT_D | LO(51))
112 #define C_ULT_D (HI(17) | FMT_D | LO(53))
113 #define DIV_D (HI(17) | FMT_D | LO(3))
114 #define J (HI(2))
115 #define JAL (HI(3))
116 #define JALR (HI(0) | LO(9))
117 #define JR (HI(0) | LO(8))
118 #define LD (HI(55))
119 #define LDC1 (HI(53))
120 #define LUI (HI(15))
121 #define LW (HI(35))
122 #define NEG_D (HI(17) | FMT_D | LO(7))
123 #define MFHI (HI(0) | LO(16))
124 #define MFLO (HI(0) | LO(18))
125 #define MOV_D (HI(17) | FMT_D | LO(6))
126 #define CFC1 (HI(17) | (2 << 21))
127 #define MOVN (HI(0) | LO(11))
128 #define MOVZ (HI(0) | LO(10))
129 #define MUL_D (HI(17) | FMT_D | LO(2))
130 #define MULT (HI(0) | LO(24))
131 #define NOP (HI(0) | LO(0))
132 #define NOR (HI(0) | LO(39))
133 #define OR (HI(0) | LO(37))
134 #define ORI (HI(13))
135 #define SD (HI(63))
136 #define SDC1 (HI(61))
137 #define SLT (HI(0) | LO(42))
138 #define SLTI (HI(10))
139 #define SLTIU (HI(11))
140 #define SLTU (HI(0) | LO(43))
141 #define SLL (HI(0) | LO(0))
142 #define SLLV (HI(0) | LO(4))
143 #define SRL (HI(0) | LO(2))
144 #define SRLV (HI(0) | LO(6))
145 #define SRA (HI(0) | LO(3))
146 #define SRAV (HI(0) | LO(7))
147 #define SUB_D (HI(17) | FMT_D | LO(1))
148 #define SUBU (HI(0) | LO(35))
149 #define SW (HI(43))
150 #define XOR (HI(0) | LO(38))
151 #define XORI (HI(14))
152
153 #if (defined SLJIT_MIPS_32_64 && SLJIT_MIPS_32_64)
154 #define CLZ (HI(28) | LO(32))
155 #define MUL (HI(28) | LO(2))
156 #define SEB (HI(31) | (16 << 6) | LO(32))
157 #define SEH (HI(31) | (24 << 6) | LO(32))
158 #endif
159
160 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
161 #define ADDU_W ADDU
162 #define ADDIU_W ADDIU
163 #define SLL_W SLL
164 #define SUBU_W SUBU
165 #else
166 #define ADDU_W DADDU
167 #define ADDIU_W DADDIU
168 #define SLL_W DSLL
169 #define SUBU_W DSUBU
170 #endif
171
172 #define SIMM_MAX (0x7fff)
173 #define SIMM_MIN (-0x8000)
174 #define UIMM_MAX (0xffff)
175
176 static SLJIT_CONST sljit_ub reg_map[SLJIT_NO_REGISTERS + 6] = {
177 0, 2, 5, 6, 3, 8, 17, 18, 19, 20, 21, 16, 4, 25, 9, 29
178 };
179
180 /* dest_reg is the absolute name of the register
181 Useful for reordering instructions in the delay slot. */
182 static int push_inst(struct sljit_compiler *compiler, sljit_ins ins, int delay_slot)
183 {
184 sljit_ins *ptr = (sljit_ins*)ensure_buf(compiler, sizeof(sljit_ins));
185 FAIL_IF(!ptr);
186 *ptr = ins;
187 compiler->size++;
188 compiler->delay_slot = delay_slot;
189 return SLJIT_SUCCESS;
190 }
191
192 static SLJIT_INLINE sljit_ins invert_branch(int flags)
193 {
194 return (flags & IS_BIT26_COND) ? (1 << 26) : (1 << 16);
195 }
196
197 static SLJIT_INLINE sljit_ins* optimize_jump(struct sljit_jump *jump, sljit_ins *code_ptr, sljit_ins *code)
198 {
199 sljit_w diff;
200 sljit_uw target_addr;
201 sljit_ins *inst;
202 sljit_ins saved_inst;
203
204 if (jump->flags & SLJIT_REWRITABLE_JUMP)
205 return code_ptr;
206
207 if (jump->flags & JUMP_ADDR)
208 target_addr = jump->u.target;
209 else {
210 SLJIT_ASSERT(jump->flags & JUMP_LABEL);
211 target_addr = (sljit_uw)(code + jump->u.label->size);
212 }
213 inst = (sljit_ins*)jump->addr;
214 if (jump->flags & IS_COND)
215 inst--;
216
217 /* B instructions. */
218 if (jump->flags & IS_MOVABLE) {
219 diff = ((sljit_w)target_addr - (sljit_w)(inst)) >> 2;
220 if (diff <= SIMM_MAX && diff >= SIMM_MIN) {
221 jump->flags |= PATCH_B;
222
223 if (!(jump->flags & IS_COND)) {
224 inst[0] = inst[-1];
225 inst[-1] = (jump->flags & IS_JAL) ? BAL : B;
226 jump->addr -= sizeof(sljit_ins);
227 return inst;
228 }
229 saved_inst = inst[0];
230 inst[0] = inst[-1];
231 inst[-1] = saved_inst ^ invert_branch(jump->flags);
232 jump->addr -= 2 * sizeof(sljit_ins);
233 return inst;
234 }
235 }
236
237 diff = ((sljit_w)target_addr - (sljit_w)(inst + 1)) >> 2;
238 if (diff <= SIMM_MAX && diff >= SIMM_MIN) {
239 jump->flags |= PATCH_B;
240
241 if (!(jump->flags & IS_COND)) {
242 inst[0] = (jump->flags & IS_JAL) ? BAL : B;
243 inst[1] = NOP;
244 return inst + 1;
245 }
246 inst[0] = inst[0] ^ invert_branch(jump->flags);
247 inst[1] = NOP;
248 jump->addr -= sizeof(sljit_ins);
249 return inst + 1;
250 }
251
252 if (jump->flags & IS_COND) {
253 if ((target_addr & ~0xfffffff) == ((jump->addr + 3 * sizeof(sljit_ins)) & ~0xfffffff)) {
254 jump->flags |= PATCH_J;
255 inst[0] = (inst[0] & 0xffff0000) | 3;
256 inst[1] = NOP;
257 inst[2] = J;
258 inst[3] = NOP;
259 jump->addr += sizeof(sljit_ins);
260 return inst + 3;
261 }
262 return code_ptr;
263 }
264
265 /* J instuctions. */
266 if (jump->flags & IS_MOVABLE) {
267 if ((target_addr & ~0xfffffff) == (jump->addr & ~0xfffffff)) {
268 jump->flags |= PATCH_J;
269 inst[0] = inst[-1];
270 inst[-1] = (jump->flags & IS_JAL) ? JAL : J;
271 jump->addr -= sizeof(sljit_ins);
272 return inst;
273 }
274 }
275
276 if ((target_addr & ~0xfffffff) == ((jump->addr + sizeof(sljit_ins)) & ~0xfffffff)) {
277 jump->flags |= PATCH_J;
278 inst[0] = (jump->flags & IS_JAL) ? JAL : J;
279 inst[1] = NOP;
280 return inst + 1;
281 }
282
283 return code_ptr;
284 }
285
286 #ifdef __GNUC__
287 static __attribute__ ((noinline)) void sljit_cache_flush(void* code, void* code_ptr)
288 {
289 SLJIT_CACHE_FLUSH(code, code_ptr);
290 }
291 #endif
292
293 SLJIT_API_FUNC_ATTRIBUTE void* sljit_generate_code(struct sljit_compiler *compiler)
294 {
295 struct sljit_memory_fragment *buf;
296 sljit_ins *code;
297 sljit_ins *code_ptr;
298 sljit_ins *buf_ptr;
299 sljit_ins *buf_end;
300 sljit_uw word_count;
301 sljit_uw addr;
302
303 struct sljit_label *label;
304 struct sljit_jump *jump;
305 struct sljit_const *const_;
306
307 CHECK_ERROR_PTR();
308 check_sljit_generate_code(compiler);
309 reverse_buf(compiler);
310
311 code = (sljit_ins*)SLJIT_MALLOC_EXEC(compiler->size * sizeof(sljit_ins));
312 PTR_FAIL_WITH_EXEC_IF(code);
313 buf = compiler->buf;
314
315 code_ptr = code;
316 word_count = 0;
317 label = compiler->labels;
318 jump = compiler->jumps;
319 const_ = compiler->consts;
320 do {
321 buf_ptr = (sljit_ins*)buf->memory;
322 buf_end = buf_ptr + (buf->used_size >> 2);
323 do {
324 *code_ptr = *buf_ptr++;
325 SLJIT_ASSERT(!label || label->size >= word_count);
326 SLJIT_ASSERT(!jump || jump->addr >= word_count);
327 SLJIT_ASSERT(!const_ || const_->addr >= word_count);
328 /* These structures are ordered by their address. */
329 if (label && label->size == word_count) {
330 /* Just recording the address. */
331 label->addr = (sljit_uw)code_ptr;
332 label->size = code_ptr - code;
333 label = label->next;
334 }
335 if (jump && jump->addr == word_count) {
336 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
337 jump->addr = (sljit_uw)(code_ptr - 3);
338 #else
339 jump->addr = (sljit_uw)(code_ptr - 6);
340 #endif
341 code_ptr = optimize_jump(jump, code_ptr, code);
342 jump = jump->next;
343 }
344 if (const_ && const_->addr == word_count) {
345 /* Just recording the address. */
346 const_->addr = (sljit_uw)code_ptr;
347 const_ = const_->next;
348 }
349 code_ptr ++;
350 word_count ++;
351 } while (buf_ptr < buf_end);
352
353 buf = buf->next;
354 } while (buf);
355
356 if (label && label->size == word_count) {
357 label->addr = (sljit_uw)code_ptr;
358 label->size = code_ptr - code;
359 label = label->next;
360 }
361
362 SLJIT_ASSERT(!label);
363 SLJIT_ASSERT(!jump);
364 SLJIT_ASSERT(!const_);
365 SLJIT_ASSERT(code_ptr - code <= (int)compiler->size);
366
367 jump = compiler->jumps;
368 while (jump) {
369 do {
370 addr = (jump->flags & JUMP_LABEL) ? jump->u.label->addr : jump->u.target;
371 buf_ptr = (sljit_ins*)jump->addr;
372
373 if (jump->flags & PATCH_B) {
374 addr = (sljit_w)(addr - (jump->addr + sizeof(sljit_ins))) >> 2;
375 SLJIT_ASSERT((sljit_w)addr <= SIMM_MAX && (sljit_w)addr >= SIMM_MIN);
376 buf_ptr[0] = (buf_ptr[0] & 0xffff0000) | (addr & 0xffff);
377 break;
378 }
379 if (jump->flags & PATCH_J) {
380 SLJIT_ASSERT((addr & ~0xfffffff) == ((jump->addr + sizeof(sljit_ins)) & ~0xfffffff));
381 buf_ptr[0] |= (addr >> 2) & 0x03ffffff;
382 break;
383 }
384
385 /* Set the fields of immediate loads. */
386 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
387 buf_ptr[0] = (buf_ptr[0] & 0xffff0000) | ((addr >> 16) & 0xffff);
388 buf_ptr[1] = (buf_ptr[1] & 0xffff0000) | (addr & 0xffff);
389 #else
390 buf_ptr[0] = (buf_ptr[0] & 0xffff0000) | ((addr >> 48) & 0xffff);
391 buf_ptr[1] = (buf_ptr[1] & 0xffff0000) | ((addr >> 32) & 0xffff);
392 buf_ptr[3] = (buf_ptr[3] & 0xffff0000) | ((addr >> 16) & 0xffff);
393 buf_ptr[4] = (buf_ptr[4] & 0xffff0000) | (addr & 0xffff);
394 #endif
395 } while (0);
396 jump = jump->next;
397 }
398
399 compiler->error = SLJIT_ERR_COMPILED;
400 compiler->executable_size = compiler->size * sizeof(sljit_ins);
401 #ifndef __GNUC__
402 SLJIT_CACHE_FLUSH(code, code_ptr);
403 #else
404 /* GCC workaround for invalid code generation with -O2. */
405 sljit_cache_flush(code, code_ptr);
406 #endif
407 return code;
408 }
409
410 /* Creates an index in data_transfer_insts array. */
411 #define WORD_DATA 0x00
412 #define BYTE_DATA 0x01
413 #define HALF_DATA 0x02
414 #define INT_DATA 0x03
415 #define SIGNED_DATA 0x04
416 #define LOAD_DATA 0x08
417
418 #define MEM_MASK 0x0f
419
420 #define WRITE_BACK 0x00010
421 #define ARG_TEST 0x00020
422 #define CUMULATIVE_OP 0x00040
423 #define LOGICAL_OP 0x00080
424 #define IMM_OP 0x00100
425 #define SRC2_IMM 0x00200
426
427 #define UNUSED_DEST 0x00400
428 #define REG_DEST 0x00800
429 #define REG1_SOURCE 0x01000
430 #define REG2_SOURCE 0x02000
431 #define SLOW_SRC1 0x04000
432 #define SLOW_SRC2 0x08000
433 #define SLOW_DEST 0x10000
434
435 /* Only these flags are set. UNUSED_DEST is not set when no flags should be set. */
436 #define CHECK_FLAGS(list) \
437 (!(flags & UNUSED_DEST) || (op & GET_FLAGS(~(list))))
438
439 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
440 #include "sljitNativeMIPS_32.c"
441 #else
442 #include "sljitNativeMIPS_64.c"
443 #endif
444
445 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
446 #define STACK_STORE SW
447 #define STACK_LOAD LW
448 #else
449 #define STACK_STORE SD
450 #define STACK_LOAD LD
451 #endif
452
453 static int emit_op(struct sljit_compiler *compiler, int op, int inp_flags,
454 int dst, sljit_w dstw,
455 int src1, sljit_w src1w,
456 int src2, sljit_w src2w);
457
458 SLJIT_API_FUNC_ATTRIBUTE int sljit_emit_enter(struct sljit_compiler *compiler, int args, int temporaries, int generals, int local_size)
459 {
460 sljit_ins base;
461
462 CHECK_ERROR();
463 check_sljit_emit_enter(compiler, args, temporaries, generals, local_size);
464
465 compiler->temporaries = temporaries;
466 compiler->generals = generals;
467
468 compiler->has_locals = local_size > 0;
469 local_size += (generals + 2 + 4) * sizeof(sljit_w);
470 local_size = (local_size + 15) & ~0xf;
471 compiler->local_size = local_size;
472
473 if (local_size <= SIMM_MAX) {
474 /* Frequent case. */
475 FAIL_IF(push_inst(compiler, ADDIU_W | S(REAL_STACK_PTR) | T(REAL_STACK_PTR) | IMM(-local_size), DR(REAL_STACK_PTR)));
476 base = S(REAL_STACK_PTR);
477 }
478 else {
479 FAIL_IF(load_immediate(compiler, DR(TMP_REG1), local_size));
480 FAIL_IF(push_inst(compiler, ADDU_W | S(REAL_STACK_PTR) | TA(0) | D(TMP_REG2), DR(TMP_REG2)));
481 FAIL_IF(push_inst(compiler, SUBU_W | S(REAL_STACK_PTR) | T(TMP_REG1) | D(REAL_STACK_PTR), DR(REAL_STACK_PTR)));
482 base = S(TMP_REG2);
483 local_size = 0;
484 }
485
486 FAIL_IF(push_inst(compiler, STACK_STORE | base | TA(RETURN_ADDR_REG) | IMM(local_size - 1 * (int)sizeof(sljit_w)), MOVABLE_INS));
487 if (compiler->has_locals)
488 FAIL_IF(push_inst(compiler, STACK_STORE | base | T(SLJIT_LOCALS_REG) | IMM(local_size - 2 * (int)sizeof(sljit_w)), MOVABLE_INS));
489 if (generals >= 1)
490 FAIL_IF(push_inst(compiler, STACK_STORE | base | T(SLJIT_GENERAL_REG1) | IMM(local_size - 3 * (int)sizeof(sljit_w)), MOVABLE_INS));
491 if (generals >= 2)
492 FAIL_IF(push_inst(compiler, STACK_STORE | base | T(SLJIT_GENERAL_REG2) | IMM(local_size - 4 * (int)sizeof(sljit_w)), MOVABLE_INS));
493 if (generals >= 3)
494 FAIL_IF(push_inst(compiler, STACK_STORE | base | T(SLJIT_GENERAL_REG3) | IMM(local_size - 5 * (int)sizeof(sljit_w)), MOVABLE_INS));
495 if (generals >= 4)
496 FAIL_IF(push_inst(compiler, STACK_STORE | base | T(SLJIT_GENERAL_EREG1) | IMM(local_size - 6 * (int)sizeof(sljit_w)), MOVABLE_INS));
497 if (generals >= 5)
498 FAIL_IF(push_inst(compiler, STACK_STORE | base | T(SLJIT_GENERAL_EREG2) | IMM(local_size - 7 * (int)sizeof(sljit_w)), MOVABLE_INS));
499
500 if (compiler->has_locals)
501 FAIL_IF(push_inst(compiler, ADDIU_W | S(REAL_STACK_PTR) | T(SLJIT_LOCALS_REG) | IMM(4 * sizeof(sljit_w)), DR(SLJIT_LOCALS_REG)));
502
503 if (args >= 1)
504 FAIL_IF(push_inst(compiler, ADDU_W | SA(4) | TA(0) | D(SLJIT_GENERAL_REG1), DR(SLJIT_GENERAL_REG1)));
505 if (args >= 2)
506 FAIL_IF(push_inst(compiler, ADDU_W | SA(5) | TA(0) | D(SLJIT_GENERAL_REG2), DR(SLJIT_GENERAL_REG2)));
507 if (args >= 3)
508 FAIL_IF(push_inst(compiler, ADDU_W | SA(6) | TA(0) | D(SLJIT_GENERAL_REG3), DR(SLJIT_GENERAL_REG3)));
509
510 return SLJIT_SUCCESS;
511 }
512
513 SLJIT_API_FUNC_ATTRIBUTE void sljit_fake_enter(struct sljit_compiler *compiler, int args, int temporaries, int generals, int local_size)
514 {
515 CHECK_ERROR_VOID();
516 check_sljit_fake_enter(compiler, args, temporaries, generals, local_size);
517
518 compiler->temporaries = temporaries;
519 compiler->generals = generals;
520
521 compiler->has_locals = local_size > 0;
522 local_size += (generals + 2 + 4) * sizeof(sljit_w);
523 compiler->local_size = (local_size + 15) & ~0xf;
524 }
525
526 SLJIT_API_FUNC_ATTRIBUTE int sljit_emit_return(struct sljit_compiler *compiler, int src, sljit_w srcw)
527 {
528 int local_size;
529 sljit_ins base;
530
531 CHECK_ERROR();
532 check_sljit_emit_return(compiler, src, srcw);
533
534 local_size = compiler->local_size;
535
536 if (src != SLJIT_UNUSED && src != SLJIT_RETURN_REG)
537 FAIL_IF(emit_op(compiler, SLJIT_MOV, WORD_DATA, SLJIT_RETURN_REG, 0, TMP_REG1, 0, src, srcw));
538
539 if (local_size <= SIMM_MAX)
540 base = S(REAL_STACK_PTR);
541 else {
542 FAIL_IF(load_immediate(compiler, DR(TMP_REG1), local_size));
543 FAIL_IF(push_inst(compiler, ADDU_W | S(REAL_STACK_PTR) | T(TMP_REG1) | D(TMP_REG1), DR(TMP_REG1)));
544 base = S(TMP_REG1);
545 local_size = 0;
546 }
547
548 FAIL_IF(push_inst(compiler, STACK_LOAD | base | TA(RETURN_ADDR_REG) | IMM(local_size - 1 * (int)sizeof(sljit_w)), RETURN_ADDR_REG));
549 if (compiler->generals >= 5)
550 FAIL_IF(push_inst(compiler, STACK_LOAD | base | T(SLJIT_GENERAL_EREG2) | IMM(local_size - 7 * (int)sizeof(sljit_w)), DR(SLJIT_GENERAL_EREG2)));
551 if (compiler->generals >= 4)
552 FAIL_IF(push_inst(compiler, STACK_LOAD | base | T(SLJIT_GENERAL_EREG1) | IMM(local_size - 6 * (int)sizeof(sljit_w)), DR(SLJIT_GENERAL_EREG1)));
553 if (compiler->generals >= 3)
554 FAIL_IF(push_inst(compiler, STACK_LOAD | base | T(SLJIT_GENERAL_REG3) | IMM(local_size - 5 * (int)sizeof(sljit_w)), DR(SLJIT_GENERAL_REG3)));
555 if (compiler->generals >= 2)
556 FAIL_IF(push_inst(compiler, STACK_LOAD | base | T(SLJIT_GENERAL_REG2) | IMM(local_size - 4 * (int)sizeof(sljit_w)), DR(SLJIT_GENERAL_REG2)));
557 if (compiler->generals >= 1)
558 FAIL_IF(push_inst(compiler, STACK_LOAD | base | T(SLJIT_GENERAL_REG1) | IMM(local_size - 3 * (int)sizeof(sljit_w)), DR(SLJIT_GENERAL_REG1)));
559 if (compiler->has_locals)
560 FAIL_IF(push_inst(compiler, STACK_LOAD | base | T(SLJIT_LOCALS_REG) | IMM(local_size - 2 * (int)sizeof(sljit_w)), DR(SLJIT_LOCALS_REG)));
561
562 FAIL_IF(push_inst(compiler, JR | SA(RETURN_ADDR_REG), UNMOVABLE_INS));
563 if (compiler->local_size <= SIMM_MAX)
564 return push_inst(compiler, ADDIU_W | S(REAL_STACK_PTR) | T(REAL_STACK_PTR) | IMM(compiler->local_size), UNMOVABLE_INS);
565 else
566 return push_inst(compiler, ADDU_W | S(TMP_REG1) | TA(0) | D(REAL_STACK_PTR), UNMOVABLE_INS);
567 }
568
569 #undef STACK_STORE
570 #undef STACK_LOAD
571
572 /* --------------------------------------------------------------------- */
573 /* Operators */
574 /* --------------------------------------------------------------------- */
575
576 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
577 #define ARCH_DEPEND(a, b) a
578 #else
579 #define ARCH_DEPEND(a, b) b
580 #endif
581
582 static SLJIT_CONST sljit_ins data_transfer_insts[16] = {
583 /* s u w */ ARCH_DEPEND(HI(43) /* sw */, HI(63) /* sd */),
584 /* s u b */ HI(40) /* sb */,
585 /* s u h */ HI(41) /* sh*/,
586 /* s u i */ HI(43) /* sw */,
587
588 /* s s w */ ARCH_DEPEND(HI(43) /* sw */, HI(63) /* sd */),
589 /* s s b */ HI(40) /* sb */,
590 /* s s h */ HI(41) /* sh*/,
591 /* s s i */ HI(43) /* sw */,
592
593 /* l u w */ ARCH_DEPEND(HI(35) /* lw */, HI(55) /* ld */),
594 /* l u b */ HI(36) /* lbu */,
595 /* l u h */ HI(37) /* lhu */,
596 /* l u i */ ARCH_DEPEND(HI(35) /* lw */, HI(39) /* lwu */),
597
598 /* l s w */ ARCH_DEPEND(HI(35) /* lw */, HI(55) /* ld */),
599 /* l s b */ HI(32) /* lb */,
600 /* l s h */ HI(33) /* lh */,
601 /* l s i */ HI(35) /* lw */,
602 };
603
604 /* reg_ar is an absoulute register! */
605
606 /* Can perform an operation using at most 1 instruction. */
607 static int getput_arg_fast(struct sljit_compiler *compiler, int flags, int reg_ar, int arg, sljit_w argw)
608 {
609 SLJIT_ASSERT(arg & SLJIT_MEM);
610
611 if (!(flags & WRITE_BACK) && !(arg & 0xf0) && argw <= SIMM_MAX && argw >= SIMM_MIN) {
612 /* Works for both absoulte and relative addresses. */
613 if (SLJIT_UNLIKELY(flags & ARG_TEST))
614 return 1;
615 FAIL_IF(push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(arg & 0xf) | TA(reg_ar) | IMM(argw), (flags & LOAD_DATA) ? reg_ar : MOVABLE_INS));
616 return -1;
617 }
618 return (flags & ARG_TEST) ? SLJIT_SUCCESS : 0;
619 }
620
621 /* See getput_arg below.
622 Note: can_cache is called only for binary operators. Those
623 operators always uses word arguments without write back. */
624 static int can_cache(int arg, sljit_w argw, int next_arg, sljit_w next_argw)
625 {
626 if (!(next_arg & SLJIT_MEM))
627 return 0;
628
629 /* Simple operation except for updates. */
630 if (arg & 0xf0) {
631 argw &= 0x3;
632 next_argw &= 0x3;
633 if (argw && argw == next_argw && (arg == next_arg || (arg & 0xf0) == (next_arg & 0xf0)))
634 return 1;
635 return 0;
636 }
637
638 if (arg == next_arg) {
639 if (((sljit_uw)(next_argw - argw) <= SIMM_MAX && (sljit_uw)(next_argw - argw) >= SIMM_MIN))
640 return 1;
641 return 0;
642 }
643
644 return 0;
645 }
646
647 /* Emit the necessary instructions. See can_cache above. */
648 static int getput_arg(struct sljit_compiler *compiler, int flags, int reg_ar, int arg, sljit_w argw, int next_arg, sljit_w next_argw)
649 {
650 int tmp_ar;
651 int base;
652
653 SLJIT_ASSERT(arg & SLJIT_MEM);
654 if (!(next_arg & SLJIT_MEM)) {
655 next_arg = 0;
656 next_argw = 0;
657 }
658
659 tmp_ar = (flags & LOAD_DATA) ? reg_ar : DR(TMP_REG3);
660 base = arg & 0xf;
661
662 if (SLJIT_UNLIKELY(arg & 0xf0)) {
663 argw &= 0x3;
664 if ((flags & WRITE_BACK) && reg_ar == DR(base)) {
665 SLJIT_ASSERT(!(flags & LOAD_DATA) && DR(TMP_REG1) != reg_ar);
666 FAIL_IF(push_inst(compiler, ADDU_W | SA(reg_ar) | TA(0) | D(TMP_REG1), DR(TMP_REG1)));
667 reg_ar = DR(TMP_REG1);
668 }
669
670 /* Using the cache. */
671 if (argw == compiler->cache_argw) {
672 if (!(flags & WRITE_BACK)) {
673 if (arg == compiler->cache_arg)
674 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(TMP_REG3) | TA(reg_ar), (flags & LOAD_DATA) ? reg_ar : MOVABLE_INS);
675 if ((SLJIT_MEM | (arg & 0xf0)) == compiler->cache_arg) {
676 if (arg == next_arg && argw == (next_argw & 0x3)) {
677 compiler->cache_arg = arg;
678 compiler->cache_argw = argw;
679 FAIL_IF(push_inst(compiler, ADDU_W | S(base) | T(TMP_REG3) | D(TMP_REG3), DR(TMP_REG3)));
680 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(TMP_REG3) | TA(reg_ar), (flags & LOAD_DATA) ? reg_ar : MOVABLE_INS);
681 }
682 FAIL_IF(push_inst(compiler, ADDU_W | S(base) | T(TMP_REG3) | DA(tmp_ar), tmp_ar));
683 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | SA(tmp_ar) | TA(reg_ar), (flags & LOAD_DATA) ? reg_ar : MOVABLE_INS);
684 }
685 }
686 else {
687 if ((SLJIT_MEM | (arg & 0xf0)) == compiler->cache_arg) {
688 FAIL_IF(push_inst(compiler, ADDU_W | S(base) | T(TMP_REG3) | D(base), DR(base)));
689 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(base) | TA(reg_ar), (flags & LOAD_DATA) ? reg_ar : MOVABLE_INS);
690 }
691 }
692 }
693
694 if (SLJIT_UNLIKELY(argw)) {
695 compiler->cache_arg = SLJIT_MEM | (arg & 0xf0);
696 compiler->cache_argw = argw;
697 FAIL_IF(push_inst(compiler, SLL_W | T((arg >> 4) & 0xf) | D(TMP_REG3) | SH_IMM(argw), DR(TMP_REG3)));
698 }
699
700 if (!(flags & WRITE_BACK)) {
701 if (arg == next_arg && argw == (next_argw & 0x3)) {
702 compiler->cache_arg = arg;
703 compiler->cache_argw = argw;
704 FAIL_IF(push_inst(compiler, ADDU_W | S(base) | T(!argw ? ((arg >> 4) & 0xf) : TMP_REG3) | D(TMP_REG3), DR(TMP_REG3)));
705 tmp_ar = DR(TMP_REG3);
706 }
707 else
708 FAIL_IF(push_inst(compiler, ADDU_W | S(base) | T(!argw ? ((arg >> 4) & 0xf) : TMP_REG3) | DA(tmp_ar), tmp_ar));
709 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | SA(tmp_ar) | TA(reg_ar), (flags & LOAD_DATA) ? reg_ar : MOVABLE_INS);
710 }
711 FAIL_IF(push_inst(compiler, ADDU_W | S(base) | T(!argw ? ((arg >> 4) & 0xf) : TMP_REG3) | D(base), DR(base)));
712 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(base) | TA(reg_ar), (flags & LOAD_DATA) ? reg_ar : MOVABLE_INS);
713 }
714
715 if (SLJIT_UNLIKELY(flags & WRITE_BACK) && base) {
716 /* Update only applies if a base register exists. */
717 if (reg_ar == DR(base)) {
718 SLJIT_ASSERT(!(flags & LOAD_DATA) && DR(TMP_REG1) != reg_ar);
719 if (argw <= SIMM_MAX && argw >= SIMM_MIN) {
720 FAIL_IF(push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(base) | TA(reg_ar) | IMM(argw), MOVABLE_INS));
721 if (argw)
722 return push_inst(compiler, ADDIU_W | S(base) | T(base) | IMM(argw), DR(base));
723 return SLJIT_SUCCESS;
724 }
725 FAIL_IF(push_inst(compiler, ADDU_W | SA(reg_ar) | TA(0) | D(TMP_REG1), DR(TMP_REG1)));
726 reg_ar = DR(TMP_REG1);
727 }
728
729 if (argw <= SIMM_MAX && argw >= SIMM_MIN) {
730 if (argw)
731 FAIL_IF(push_inst(compiler, ADDIU_W | S(base) | T(base) | IMM(argw), DR(base)));
732 }
733 else {
734 if (compiler->cache_arg == SLJIT_MEM && argw - compiler->cache_argw <= SIMM_MAX && argw - compiler->cache_argw >= SIMM_MIN) {
735 if (argw != compiler->cache_argw) {
736 FAIL_IF(push_inst(compiler, ADDIU_W | S(TMP_REG3) | T(TMP_REG3) | IMM(argw - compiler->cache_argw), DR(TMP_REG3)));
737 compiler->cache_argw = argw;
738 }
739 FAIL_IF(push_inst(compiler, ADDU_W | S(base) | T(TMP_REG3) | D(base), DR(base)));
740 }
741 else {
742 compiler->cache_arg = SLJIT_MEM;
743 compiler->cache_argw = argw;
744 FAIL_IF(load_immediate(compiler, DR(TMP_REG3), argw));
745 FAIL_IF(push_inst(compiler, ADDU_W | S(base) | T(TMP_REG3) | D(base), DR(base)));
746 }
747 }
748 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(base) | TA(reg_ar), (flags & LOAD_DATA) ? reg_ar : MOVABLE_INS);
749 }
750
751 if (compiler->cache_arg == arg && argw - compiler->cache_argw <= SIMM_MAX && argw - compiler->cache_argw >= SIMM_MIN) {
752 if (argw != compiler->cache_argw) {
753 FAIL_IF(push_inst(compiler, ADDIU_W | S(TMP_REG3) | T(TMP_REG3) | IMM(argw - compiler->cache_argw), DR(TMP_REG3)));
754 compiler->cache_argw = argw;
755 }
756 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(TMP_REG3) | TA(reg_ar), (flags & LOAD_DATA) ? reg_ar : MOVABLE_INS);
757 }
758
759 if (compiler->cache_arg == SLJIT_MEM && argw - compiler->cache_argw <= SIMM_MAX && argw - compiler->cache_argw >= SIMM_MIN) {
760 if (argw != compiler->cache_argw)
761 FAIL_IF(push_inst(compiler, ADDIU_W | S(TMP_REG3) | T(TMP_REG3) | IMM(argw - compiler->cache_argw), DR(TMP_REG3)));
762 }
763 else {
764 compiler->cache_arg = SLJIT_MEM;
765 FAIL_IF(load_immediate(compiler, DR(TMP_REG3), argw));
766 }
767 compiler->cache_argw = argw;
768
769 if (!base)
770 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(TMP_REG3) | TA(reg_ar), (flags & LOAD_DATA) ? reg_ar : MOVABLE_INS);
771
772 if (arg == next_arg && next_argw - argw <= SIMM_MAX && next_argw - argw >= SIMM_MIN) {
773 compiler->cache_arg = arg;
774 FAIL_IF(push_inst(compiler, ADDU_W | S(TMP_REG3) | T(base) | D(TMP_REG3), DR(TMP_REG3)));
775 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(TMP_REG3) | TA(reg_ar), (flags & LOAD_DATA) ? reg_ar : MOVABLE_INS);
776 }
777
778 FAIL_IF(push_inst(compiler, ADDU_W | S(TMP_REG3) | T(base) | DA(tmp_ar), tmp_ar));
779 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | SA(tmp_ar) | TA(reg_ar), (flags & LOAD_DATA) ? reg_ar : MOVABLE_INS);
780 }
781
782 static SLJIT_INLINE int emit_op_mem(struct sljit_compiler *compiler, int flags, int reg_ar, int arg, sljit_w argw)
783 {
784 if (getput_arg_fast(compiler, flags, reg_ar, arg, argw))
785 return compiler->error;
786 compiler->cache_arg = 0;
787 compiler->cache_argw = 0;
788 return getput_arg(compiler, flags, reg_ar, arg, argw, 0, 0);
789 }
790
791 static int emit_op(struct sljit_compiler *compiler, int op, int flags,
792 int dst, sljit_w dstw,
793 int src1, sljit_w src1w,
794 int src2, sljit_w src2w)
795 {
796 /* arg1 goes to TMP_REG1 or src reg
797 arg2 goes to TMP_REG2, imm or src reg
798 TMP_REG3 can be used for caching
799 result goes to TMP_REG2, so put result can use TMP_REG1 and TMP_REG3. */
800 int dst_r = TMP_REG2;
801 int src1_r;
802 sljit_w src2_r = 0;
803 int sugg_src2_r = TMP_REG2;
804
805 compiler->cache_arg = 0;
806 compiler->cache_argw = 0;
807
808 if (dst >= SLJIT_TEMPORARY_REG1 && dst <= TMP_REG3) {
809 dst_r = dst;
810 flags |= REG_DEST;
811 if (GET_OPCODE(op) >= SLJIT_MOV && GET_OPCODE(op) <= SLJIT_MOVU_SI)
812 sugg_src2_r = dst_r;
813 }
814 else if (dst == SLJIT_UNUSED) {
815 if (op >= SLJIT_MOV && op <= SLJIT_MOVU_SI && !(src2 & SLJIT_MEM))
816 return SLJIT_SUCCESS;
817 if (GET_FLAGS(op))
818 flags |= UNUSED_DEST;
819 }
820 else if ((dst & SLJIT_MEM) && !getput_arg_fast(compiler, flags | ARG_TEST, DR(TMP_REG1), dst, dstw))
821 flags |= SLOW_DEST;
822
823 if (flags & IMM_OP) {
824 if ((src2 & SLJIT_IMM) && src2w) {
825 if ((!(flags & LOGICAL_OP) && (src2w <= SIMM_MAX && src2w >= SIMM_MIN))
826 || ((flags & LOGICAL_OP) && !(src2w & ~UIMM_MAX))) {
827 flags |= SRC2_IMM;
828 src2_r = src2w;
829 }
830 }
831 if ((src1 & SLJIT_IMM) && src1w && (flags & CUMULATIVE_OP) && !(flags & SRC2_IMM)) {
832 if ((!(flags & LOGICAL_OP) && (src1w <= SIMM_MAX && src1w >= SIMM_MIN))
833 || ((flags & LOGICAL_OP) && !(src1w & ~UIMM_MAX))) {
834 flags |= SRC2_IMM;
835 src2_r = src1w;
836
837 /* And swap arguments. */
838 src1 = src2;
839 src1w = src2w;
840 src2 = SLJIT_IMM;
841 /* src2w = src2_r unneeded. */
842 }
843 }
844 }
845
846 /* Source 1. */
847 if (src1 >= SLJIT_TEMPORARY_REG1 && src1 <= TMP_REG3) {
848 src1_r = src1;
849 flags |= REG1_SOURCE;
850 }
851 else if (src1 & SLJIT_IMM) {
852 if (src1w) {
853 FAIL_IF(load_immediate(compiler, DR(TMP_REG1), src1w));
854 src1_r = TMP_REG1;
855 }
856 else
857 src1_r = 0;
858 }
859 else {
860 if (getput_arg_fast(compiler, flags | LOAD_DATA, DR(TMP_REG1), src1, src1w))
861 FAIL_IF(compiler->error);
862 else
863 flags |= SLOW_SRC1;
864 src1_r = TMP_REG1;
865 }
866
867 /* Source 2. */
868 if (src2 >= SLJIT_TEMPORARY_REG1 && src2 <= TMP_REG3) {
869 src2_r = src2;
870 flags |= REG2_SOURCE;
871 if (!(flags & REG_DEST) && GET_OPCODE(op) >= SLJIT_MOV && GET_OPCODE(op) <= SLJIT_MOVU_SI)
872 dst_r = src2_r;
873 }
874 else if (src2 & SLJIT_IMM) {
875 if (!(flags & SRC2_IMM)) {
876 if (src2w || (GET_OPCODE(op) >= SLJIT_MOV && GET_OPCODE(op) <= SLJIT_MOVU_SI)) {
877 FAIL_IF(load_immediate(compiler, DR(sugg_src2_r), src2w));
878 src2_r = sugg_src2_r;
879 }
880 else
881 src2_r = 0;
882 }
883 }
884 else {
885 if (getput_arg_fast(compiler, flags | LOAD_DATA, DR(sugg_src2_r), src2, src2w))
886 FAIL_IF(compiler->error);
887 else
888 flags |= SLOW_SRC2;
889 src2_r = sugg_src2_r;
890 }
891
892 if ((flags & (SLOW_SRC1 | SLOW_SRC2)) == (SLOW_SRC1 | SLOW_SRC2)) {
893 SLJIT_ASSERT(src2_r == TMP_REG2);
894 if (!can_cache(src1, src1w, src2, src2w) && can_cache(src1, src1w, dst, dstw)) {
895 FAIL_IF(getput_arg(compiler, flags | LOAD_DATA, DR(TMP_REG2), src2, src2w, src1, src1w));
896 FAIL_IF(getput_arg(compiler, flags | LOAD_DATA, DR(TMP_REG1), src1, src1w, dst, dstw));
897 }
898 else {
899 FAIL_IF(getput_arg(compiler, flags | LOAD_DATA, DR(TMP_REG1), src1, src1w, src2, src2w));
900 FAIL_IF(getput_arg(compiler, flags | LOAD_DATA, DR(TMP_REG2), src2, src2w, dst, dstw));
901 }
902 }
903 else if (flags & SLOW_SRC1)
904 FAIL_IF(getput_arg(compiler, flags | LOAD_DATA, DR(TMP_REG1), src1, src1w, dst, dstw));
905 else if (flags & SLOW_SRC2)
906 FAIL_IF(getput_arg(compiler, flags | LOAD_DATA, DR(sugg_src2_r), src2, src2w, dst, dstw));
907
908 FAIL_IF(emit_single_op(compiler, op, flags, dst_r, src1_r, src2_r));
909
910 if (dst & SLJIT_MEM) {
911 if (!(flags & SLOW_DEST)) {
912 getput_arg_fast(compiler, flags, DR(dst_r), dst, dstw);
913 return compiler->error;
914 }
915 return getput_arg(compiler, flags, DR(dst_r), dst, dstw, 0, 0);
916 }
917
918 return SLJIT_SUCCESS;
919 }
920
921 SLJIT_API_FUNC_ATTRIBUTE int sljit_emit_op0(struct sljit_compiler *compiler, int op)
922 {
923 CHECK_ERROR();
924 check_sljit_emit_op0(compiler, op);
925
926 op = GET_OPCODE(op);
927 switch (op) {
928 case SLJIT_BREAKPOINT:
929 return push_inst(compiler, BREAK, UNMOVABLE_INS);
930 case SLJIT_NOP:
931 return push_inst(compiler, NOP, UNMOVABLE_INS);
932 }
933
934 return SLJIT_SUCCESS;
935 }
936
937 SLJIT_API_FUNC_ATTRIBUTE int sljit_emit_op1(struct sljit_compiler *compiler, int op,
938 int dst, sljit_w dstw,
939 int src, sljit_w srcw)
940 {
941 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
942 #define inp_flags 0
943 #endif
944
945 CHECK_ERROR();
946 check_sljit_emit_op1(compiler, op, dst, dstw, src, srcw);
947
948 SLJIT_COMPILE_ASSERT(SLJIT_MOV + 7 == SLJIT_MOVU, movu_offset);
949
950 switch (GET_OPCODE(op)) {
951 case SLJIT_MOV:
952 return emit_op(compiler, SLJIT_MOV, inp_flags | WORD_DATA, dst, dstw, TMP_REG1, 0, src, srcw);
953
954 case SLJIT_MOV_UI:
955 return emit_op(compiler, SLJIT_MOV_UI, inp_flags | INT_DATA, dst, dstw, TMP_REG1, 0, src, srcw);
956
957 case SLJIT_MOV_SI:
958 return emit_op(compiler, SLJIT_MOV_SI, inp_flags | INT_DATA | SIGNED_DATA, dst, dstw, TMP_REG1, 0, src, srcw);
959
960 case SLJIT_MOV_UB:
961 return emit_op(compiler, SLJIT_MOV_UB, inp_flags | BYTE_DATA, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (unsigned char)srcw : srcw);
962
963 case SLJIT_MOV_SB:
964 return emit_op(compiler, SLJIT_MOV_SB, inp_flags | BYTE_DATA | SIGNED_DATA, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (signed char)srcw : srcw);
965
966 case SLJIT_MOV_UH:
967 return emit_op(compiler, SLJIT_MOV_UH, inp_flags | HALF_DATA, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (unsigned short)srcw : srcw);
968
969 case SLJIT_MOV_SH:
970 return emit_op(compiler, SLJIT_MOV_SH, inp_flags | HALF_DATA | SIGNED_DATA, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (signed short)srcw : srcw);
971
972 case SLJIT_MOVU:
973 return emit_op(compiler, SLJIT_MOV, inp_flags | WORD_DATA | WRITE_BACK, dst, dstw, TMP_REG1, 0, src, srcw);
974
975 case SLJIT_MOVU_UI:
976 return emit_op(compiler, SLJIT_MOV_UI, inp_flags | INT_DATA | WRITE_BACK, dst, dstw, TMP_REG1, 0, src, srcw);
977
978 case SLJIT_MOVU_SI:
979 return emit_op(compiler, SLJIT_MOV_SI, inp_flags | INT_DATA | SIGNED_DATA | WRITE_BACK, dst, dstw, TMP_REG1, 0, src, srcw);
980
981 case SLJIT_MOVU_UB:
982 return emit_op(compiler, SLJIT_MOV_UB, inp_flags | BYTE_DATA | WRITE_BACK, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (unsigned char)srcw : srcw);
983
984 case SLJIT_MOVU_SB:
985 return emit_op(compiler, SLJIT_MOV_SB, inp_flags | BYTE_DATA | SIGNED_DATA | WRITE_BACK, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (signed char)srcw : srcw);
986
987 case SLJIT_MOVU_UH:
988 return emit_op(compiler, SLJIT_MOV_UH, inp_flags | HALF_DATA | WRITE_BACK, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (unsigned short)srcw : srcw);
989
990 case SLJIT_MOVU_SH:
991 return emit_op(compiler, SLJIT_MOV_SH, inp_flags | HALF_DATA | SIGNED_DATA | WRITE_BACK, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (signed short)srcw : srcw);
992
993 case SLJIT_NOT:
994 return emit_op(compiler, op, inp_flags, dst, dstw, TMP_REG1, 0, src, srcw);
995
996 case SLJIT_NEG:
997 return emit_op(compiler, SLJIT_SUB | GET_ALL_FLAGS(op), inp_flags | IMM_OP, dst, dstw, SLJIT_IMM, 0, src, srcw);
998
999 case SLJIT_CLZ:
1000 return emit_op(compiler, op, inp_flags, dst, dstw, TMP_REG1, 0, src, srcw);
1001 }
1002
1003 return SLJIT_SUCCESS;
1004 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
1005 #undef inp_flags
1006 #endif
1007 }
1008
1009 SLJIT_API_FUNC_ATTRIBUTE int sljit_emit_op2(struct sljit_compiler *compiler, int op,
1010 int dst, sljit_w dstw,
1011 int src1, sljit_w src1w,
1012 int src2, sljit_w src2w)
1013 {
1014 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
1015 #define inp_flags 0
1016 #endif
1017
1018 CHECK_ERROR();
1019 check_sljit_emit_op2(compiler, op, dst, dstw, src1, src1w, src2, src2w);
1020
1021 switch (GET_OPCODE(op)) {
1022 case SLJIT_ADD:
1023 case SLJIT_ADDC:
1024 return emit_op(compiler, op, inp_flags | CUMULATIVE_OP | IMM_OP, dst, dstw, src1, src1w, src2, src2w);
1025
1026 case SLJIT_SUB:
1027 case SLJIT_SUBC:
1028 return emit_op(compiler, op, inp_flags | IMM_OP, dst, dstw, src1, src1w, src2, src2w);
1029
1030 case SLJIT_MUL:
1031 return emit_op(compiler, op, inp_flags | CUMULATIVE_OP, dst, dstw, src1, src1w, src2, src2w);
1032
1033 case SLJIT_AND:
1034 case SLJIT_OR:
1035 case SLJIT_XOR:
1036 return emit_op(compiler, op, inp_flags | CUMULATIVE_OP | LOGICAL_OP | IMM_OP, dst, dstw, src1, src1w, src2, src2w);
1037
1038 case SLJIT_SHL:
1039 case SLJIT_LSHR:
1040 case SLJIT_ASHR:
1041 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
1042 if (src2 & SLJIT_IMM)
1043 src2w &= 0x1f;
1044 #else
1045 if (src2 & SLJIT_IMM)
1046 src2w &= 0x3f;
1047 #endif
1048 return emit_op(compiler, op, inp_flags | IMM_OP, dst, dstw, src1, src1w, src2, src2w);
1049 }
1050
1051 return SLJIT_SUCCESS;
1052 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
1053 #undef inp_flags
1054 #endif
1055 }
1056
1057 SLJIT_API_FUNC_ATTRIBUTE int sljit_get_register_index(int reg)
1058 {
1059 check_sljit_get_register_index(reg);
1060 return reg_map[reg];
1061 }
1062
1063 SLJIT_API_FUNC_ATTRIBUTE int sljit_emit_op_custom(struct sljit_compiler *compiler,
1064 void *instruction, int size)
1065 {
1066 CHECK_ERROR();
1067 check_sljit_emit_op_custom(compiler, instruction, size);
1068 SLJIT_ASSERT(size == 4);
1069
1070 return push_inst(compiler, *(sljit_ins*)instruction, UNMOVABLE_INS);
1071 }
1072
1073 /* --------------------------------------------------------------------- */
1074 /* Floating point operators */
1075 /* --------------------------------------------------------------------- */
1076
1077 SLJIT_API_FUNC_ATTRIBUTE int sljit_is_fpu_available(void)
1078 {
1079 #if (defined SLJIT_QEMU && SLJIT_QEMU)
1080 /* Qemu says fir is 0 by default. */
1081 return 1;
1082 #elif defined(__GNUC__)
1083 sljit_w fir;
1084 asm ("cfc1 %0, $0" : "=r"(fir));
1085 return (fir >> 22) & 0x1;
1086 #else
1087 #error "FIR check is not implemented for this architecture"
1088 #endif
1089 }
1090
1091 static int emit_fpu_data_transfer(struct sljit_compiler *compiler, int fpu_reg, int load, int arg, sljit_w argw)
1092 {
1093 int hi_reg;
1094
1095 SLJIT_ASSERT(arg & SLJIT_MEM);
1096
1097 /* Fast loads and stores. */
1098 if (!(arg & 0xf0)) {
1099 /* Both for (arg & 0xf) == SLJIT_UNUSED and (arg & 0xf) != SLJIT_UNUSED. */
1100 if (argw <= SIMM_MAX && argw >= SIMM_MIN)
1101 return push_inst(compiler, (load ? LDC1 : SDC1) | S(arg & 0xf) | FT(fpu_reg) | IMM(argw), MOVABLE_INS);
1102 }
1103
1104 if (arg & 0xf0) {
1105 argw &= 0x3;
1106 hi_reg = (arg >> 4) & 0xf;
1107 if (argw) {
1108 FAIL_IF(push_inst(compiler, SLL_W | T(hi_reg) | D(TMP_REG1) | SH_IMM(argw), DR(TMP_REG1)));
1109 hi_reg = TMP_REG1;
1110 }
1111 FAIL_IF(push_inst(compiler, ADDU_W | S(hi_reg) | T(arg & 0xf) | D(TMP_REG1), DR(TMP_REG1)));
1112 return push_inst(compiler, (load ? LDC1 : SDC1) | S(TMP_REG1) | FT(fpu_reg) | IMM(0), MOVABLE_INS);
1113 }
1114
1115 /* Use cache. */
1116 if (compiler->cache_arg == arg && argw - compiler->cache_argw <= SIMM_MAX && argw - compiler->cache_argw >= SIMM_MIN)
1117 return push_inst(compiler, (load ? LDC1 : SDC1) | S(TMP_REG3) | FT(fpu_reg) | IMM(argw - compiler->cache_argw), MOVABLE_INS);
1118
1119 /* Put value to cache. */
1120 compiler->cache_arg = arg;
1121 compiler->cache_argw = argw;
1122
1123 FAIL_IF(load_immediate(compiler, DR(TMP_REG3), argw));
1124 if (arg & 0xf)
1125 FAIL_IF(push_inst(compiler, ADDU_W | S(TMP_REG3) | T(arg & 0xf) | D(TMP_REG3), DR(TMP_REG3)));
1126 return push_inst(compiler, (load ? LDC1 : SDC1) | S(TMP_REG3) | FT(fpu_reg) | IMM(0), MOVABLE_INS);
1127 }
1128
1129 SLJIT_API_FUNC_ATTRIBUTE int sljit_emit_fop1(struct sljit_compiler *compiler, int op,
1130 int dst, sljit_w dstw,
1131 int src, sljit_w srcw)
1132 {
1133 int dst_fr;
1134
1135 CHECK_ERROR();
1136 check_sljit_emit_fop1(compiler, op, dst, dstw, src, srcw);
1137
1138 compiler->cache_arg = 0;
1139 compiler->cache_argw = 0;
1140
1141 if (GET_OPCODE(op) == SLJIT_FCMP) {
1142 if (dst > SLJIT_FLOAT_REG4) {
1143 FAIL_IF(emit_fpu_data_transfer(compiler, TMP_FREG1, 1, dst, dstw));
1144 dst = TMP_FREG1;
1145 }
1146 if (src > SLJIT_FLOAT_REG4) {
1147 FAIL_IF(emit_fpu_data_transfer(compiler, TMP_FREG2, 1, src, srcw));
1148 src = TMP_FREG2;
1149 }
1150
1151 /* src and dst are swapped. */
1152 if (op & SLJIT_SET_E) {
1153 FAIL_IF(push_inst(compiler, C_UEQ_D | FT(src) | FS(dst), UNMOVABLE_INS));
1154 FAIL_IF(push_inst(compiler, CFC1 | TA(EQUAL_FLAG) | DA(FCSR_REG), EQUAL_FLAG));
1155 FAIL_IF(push_inst(compiler, SRL | TA(EQUAL_FLAG) | DA(EQUAL_FLAG) | SH_IMM(23), EQUAL_FLAG));
1156 FAIL_IF(push_inst(compiler, ANDI | SA(EQUAL_FLAG) | TA(EQUAL_FLAG) | IMM(1), EQUAL_FLAG));
1157 }
1158 if (op & SLJIT_SET_S) {
1159 /* Mixing the instructions for the two checks. */
1160 FAIL_IF(push_inst(compiler, C_ULT_D | FT(src) | FS(dst), UNMOVABLE_INS));
1161 FAIL_IF(push_inst(compiler, CFC1 | TA(ULESS_FLAG) | DA(FCSR_REG), ULESS_FLAG));
1162 FAIL_IF(push_inst(compiler, C_ULT_D | FT(dst) | FS(src), UNMOVABLE_INS));
1163 FAIL_IF(push_inst(compiler, SRL | TA(ULESS_FLAG) | DA(ULESS_FLAG) | SH_IMM(23), ULESS_FLAG));
1164 FAIL_IF(push_inst(compiler, ANDI | SA(ULESS_FLAG) | TA(ULESS_FLAG) | IMM(1), ULESS_FLAG));
1165 FAIL_IF(push_inst(compiler, CFC1 | TA(UGREATER_FLAG) | DA(FCSR_REG), UGREATER_FLAG));
1166 FAIL_IF(push_inst(compiler, SRL | TA(UGREATER_FLAG) | DA(UGREATER_FLAG) | SH_IMM(23), UGREATER_FLAG));
1167 FAIL_IF(push_inst(compiler, ANDI | SA(UGREATER_FLAG) | TA(UGREATER_FLAG) | IMM(1), UGREATER_FLAG));
1168 }
1169 return push_inst(compiler, C_UN_D | FT(src) | FS(dst), FCSR_FCC);
1170 }
1171
1172 dst_fr = (dst > SLJIT_FLOAT_REG4) ? TMP_FREG1 : dst;
1173
1174 if (src > SLJIT_FLOAT_REG4) {
1175 FAIL_IF(emit_fpu_data_transfer(compiler, dst_fr, 1, src, srcw));
1176 src = dst_fr;
1177 }
1178
1179 switch (op) {
1180 case SLJIT_FMOV:
1181 if (src != dst_fr && dst_fr != TMP_FREG1)
1182 FAIL_IF(push_inst(compiler, MOV_D | FS(src) | FD(dst_fr), MOVABLE_INS));
1183 break;
1184 case SLJIT_FNEG:
1185 FAIL_IF(push_inst(compiler, NEG_D | FS(src) | FD(dst_fr), MOVABLE_INS));
1186 break;
1187 case SLJIT_FABS:
1188 FAIL_IF(push_inst(compiler, ABS_D | FS(src) | FD(dst_fr), MOVABLE_INS));
1189 break;
1190 }
1191
1192 if (dst_fr == TMP_FREG1)
1193 FAIL_IF(emit_fpu_data_transfer(compiler, src, 0, dst, dstw));
1194
1195 return SLJIT_SUCCESS;
1196 }
1197
1198 SLJIT_API_FUNC_ATTRIBUTE int sljit_emit_fop2(struct sljit_compiler *compiler, int op,
1199 int dst, sljit_w dstw,
1200 int src1, sljit_w src1w,
1201 int src2, sljit_w src2w)
1202 {
1203 int dst_fr;
1204
1205 CHECK_ERROR();
1206 check_sljit_emit_fop2(compiler, op, dst, dstw, src1, src1w, src2, src2w);
1207
1208 compiler->cache_arg = 0;
1209 compiler->cache_argw = 0;
1210
1211 dst_fr = (dst > SLJIT_FLOAT_REG4) ? TMP_FREG1 : dst;
1212
1213 if (src2 > SLJIT_FLOAT_REG4) {
1214 FAIL_IF(emit_fpu_data_transfer(compiler, TMP_FREG2, 1, src2, src2w));
1215 src2 = TMP_FREG2;
1216 }
1217
1218 if (src1 > SLJIT_FLOAT_REG4) {
1219 FAIL_IF(emit_fpu_data_transfer(compiler, TMP_FREG1, 1, src1, src1w));
1220 src1 = TMP_FREG1;
1221 }
1222
1223 switch (op) {
1224 case SLJIT_FADD:
1225 FAIL_IF(push_inst(compiler, ADD_D | FT(src2) | FS(src1) | FD(dst_fr), MOVABLE_INS));
1226 break;
1227
1228 case SLJIT_FSUB:
1229 FAIL_IF(push_inst(compiler, SUB_D | FT(src2) | FS(src1) | FD(dst_fr), MOVABLE_INS));
1230 break;
1231
1232 case SLJIT_FMUL:
1233 FAIL_IF(push_inst(compiler, MUL_D | FT(src2) | FS(src1) | FD(dst_fr), MOVABLE_INS));
1234 break;
1235
1236 case SLJIT_FDIV:
1237 FAIL_IF(push_inst(compiler, DIV_D | FT(src2) | FS(src1) | FD(dst_fr), MOVABLE_INS));
1238 break;
1239 }
1240
1241 if (dst_fr == TMP_FREG1)
1242 FAIL_IF(emit_fpu_data_transfer(compiler, TMP_FREG1, 0, dst, dstw));
1243
1244 return SLJIT_SUCCESS;
1245 }
1246
1247 /* --------------------------------------------------------------------- */
1248 /* Other instructions */
1249 /* --------------------------------------------------------------------- */
1250
1251 SLJIT_API_FUNC_ATTRIBUTE int sljit_emit_fast_enter(struct sljit_compiler *compiler, int dst, sljit_w dstw, int args, int temporaries, int generals, int local_size)
1252 {
1253 CHECK_ERROR();
1254 check_sljit_emit_fast_enter(compiler, dst, dstw, args, temporaries, generals, local_size);
1255
1256 compiler->temporaries = temporaries;
1257 compiler->generals = generals;
1258
1259 compiler->has_locals = local_size > 0;
1260 local_size += (generals + 2 + 4) * sizeof(sljit_w);
1261 compiler->local_size = (local_size + 15) & ~0xf;
1262
1263 if (dst >= SLJIT_TEMPORARY_REG1 && dst <= SLJIT_NO_REGISTERS)
1264 return push_inst(compiler, ADDU_W | SA(RETURN_ADDR_REG) | TA(0) | D(dst), DR(dst));
1265 else if (dst & SLJIT_MEM)
1266 return emit_op_mem(compiler, WORD_DATA, RETURN_ADDR_REG, dst, dstw);
1267 return SLJIT_SUCCESS;
1268 }
1269
1270 SLJIT_API_FUNC_ATTRIBUTE int sljit_emit_fast_return(struct sljit_compiler *compiler, int src, sljit_w srcw)
1271 {
1272 CHECK_ERROR();
1273 check_sljit_emit_fast_return(compiler, src, srcw);
1274
1275 if (src >= SLJIT_TEMPORARY_REG1 && src <= SLJIT_NO_REGISTERS)
1276 FAIL_IF(push_inst(compiler, ADDU_W | S(src) | TA(0) | DA(RETURN_ADDR_REG), RETURN_ADDR_REG));
1277 else if (src & SLJIT_MEM)
1278 FAIL_IF(emit_op_mem(compiler, WORD_DATA | LOAD_DATA, RETURN_ADDR_REG, src, srcw));
1279 else if (src & SLJIT_IMM)
1280 FAIL_IF(load_immediate(compiler, RETURN_ADDR_REG, srcw));
1281
1282 FAIL_IF(push_inst(compiler, JR | SA(RETURN_ADDR_REG), UNMOVABLE_INS));
1283 return push_inst(compiler, NOP, UNMOVABLE_INS);
1284 }
1285
1286 /* --------------------------------------------------------------------- */
1287 /* Conditional instructions */
1288 /* --------------------------------------------------------------------- */
1289
1290 SLJIT_API_FUNC_ATTRIBUTE struct sljit_label* sljit_emit_label(struct sljit_compiler *compiler)
1291 {
1292 struct sljit_label *label;
1293
1294 CHECK_ERROR_PTR();
1295 check_sljit_emit_label(compiler);
1296
1297 if (compiler->last_label && compiler->last_label->size == compiler->size)
1298 return compiler->last_label;
1299
1300 label = (struct sljit_label*)ensure_abuf(compiler, sizeof(struct sljit_label));
1301 PTR_FAIL_IF(!label);
1302 set_label(label, compiler);
1303 compiler->delay_slot = UNMOVABLE_INS;
1304 return label;
1305 }
1306
1307 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
1308 #define JUMP_LENGTH 4
1309 #else
1310 #define JUMP_LENGTH 7
1311 #endif
1312
1313 #define BR_Z(src) \
1314 inst = BEQ | SA(src) | TA(0) | JUMP_LENGTH; \
1315 flags = IS_BIT26_COND; \
1316 delay_check = src;
1317
1318 #define BR_NZ(src) \
1319 inst = BNE | SA(src) | TA(0) | JUMP_LENGTH; \
1320 flags = IS_BIT26_COND; \
1321 delay_check = src;
1322
1323 #define BR_T() \
1324 inst = BC1T | JUMP_LENGTH; \
1325 flags = IS_BIT16_COND; \
1326 delay_check = FCSR_FCC;
1327
1328 #define BR_F() \
1329 inst = BC1F | JUMP_LENGTH; \
1330 flags = IS_BIT16_COND; \
1331 delay_check = FCSR_FCC;
1332
1333 SLJIT_API_FUNC_ATTRIBUTE struct sljit_jump* sljit_emit_jump(struct sljit_compiler *compiler, int type)
1334 {
1335 struct sljit_jump *jump;
1336 sljit_ins inst;
1337 int flags = 0;
1338 int delay_check = UNMOVABLE_INS;
1339
1340 CHECK_ERROR_PTR();
1341 check_sljit_emit_jump(compiler, type);
1342
1343 jump = (struct sljit_jump*)ensure_abuf(compiler, sizeof(struct sljit_jump));
1344 PTR_FAIL_IF(!jump);
1345 set_jump(jump, compiler, type & SLJIT_REWRITABLE_JUMP);
1346 type &= 0xff;
1347
1348 switch (type) {
1349 case SLJIT_C_EQUAL:
1350 case SLJIT_C_FLOAT_NOT_EQUAL:
1351 BR_NZ(EQUAL_FLAG);
1352 break;
1353 case SLJIT_C_NOT_EQUAL:
1354 case SLJIT_C_FLOAT_EQUAL:
1355 BR_Z(EQUAL_FLAG);
1356 break;
1357 case SLJIT_C_LESS:
1358 case SLJIT_C_FLOAT_LESS:
1359 BR_Z(ULESS_FLAG);
1360 break;
1361 case SLJIT_C_GREATER_EQUAL:
1362 case SLJIT_C_FLOAT_GREATER_EQUAL:
1363 BR_NZ(ULESS_FLAG);
1364 break;
1365 case SLJIT_C_GREATER:
1366 case SLJIT_C_FLOAT_GREATER:
1367 BR_Z(UGREATER_FLAG);
1368 break;
1369 case SLJIT_C_LESS_EQUAL:
1370 case SLJIT_C_FLOAT_LESS_EQUAL:
1371 BR_NZ(UGREATER_FLAG);
1372 break;
1373 case SLJIT_C_SIG_LESS:
1374 BR_Z(LESS_FLAG);
1375 break;
1376 case SLJIT_C_SIG_GREATER_EQUAL:
1377 BR_NZ(LESS_FLAG);
1378 break;
1379 case SLJIT_C_SIG_GREATER:
1380 BR_Z(GREATER_FLAG);
1381 break;
1382 case SLJIT_C_SIG_LESS_EQUAL:
1383 BR_NZ(GREATER_FLAG);
1384 break;
1385 case SLJIT_C_OVERFLOW:
1386 case SLJIT_C_MUL_OVERFLOW:
1387 BR_Z(OVERFLOW_FLAG);
1388 break;
1389 case SLJIT_C_NOT_OVERFLOW:
1390 case SLJIT_C_MUL_NOT_OVERFLOW:
1391 BR_NZ(OVERFLOW_FLAG);
1392 break;
1393 case SLJIT_C_FLOAT_NAN:
1394 BR_F();
1395 break;
1396 case SLJIT_C_FLOAT_NOT_NAN:
1397 BR_T();
1398 break;
1399 default:
1400 /* Not conditional branch. */
1401 inst = 0;
1402 break;
1403 }
1404
1405 jump->flags |= flags;
1406 if (compiler->delay_slot == MOVABLE_INS || (compiler->delay_slot != UNMOVABLE_INS && compiler->delay_slot != delay_check))
1407 jump->flags |= IS_MOVABLE;
1408
1409 if (inst)
1410 PTR_FAIL_IF(push_inst(compiler, inst, UNMOVABLE_INS));
1411
1412 PTR_FAIL_IF(emit_const(compiler, TMP_REG2, 0));
1413 if (type <= SLJIT_JUMP) {
1414 PTR_FAIL_IF(push_inst(compiler, JR | S(TMP_REG2), UNMOVABLE_INS));
1415 jump->addr = compiler->size;
1416 PTR_FAIL_IF(push_inst(compiler, NOP, UNMOVABLE_INS));
1417 } else {
1418 SLJIT_ASSERT(DR(PIC_ADDR_REG) == 25 && PIC_ADDR_REG == TMP_REG2);
1419 /* Cannot be optimized out if type is >= CALL0. */
1420 jump->flags |= IS_JAL | (type >= SLJIT_CALL0 ? SLJIT_REWRITABLE_JUMP : 0);
1421 PTR_FAIL_IF(push_inst(compiler, JALR | S(TMP_REG2) | DA(RETURN_ADDR_REG), UNMOVABLE_INS));
1422 jump->addr = compiler->size;
1423 /* A NOP if type < CALL1. */
1424 PTR_FAIL_IF(push_inst(compiler, ADDU_W | S(SLJIT_TEMPORARY_REG1) | TA(0) | DA(4), UNMOVABLE_INS));
1425 }
1426 return jump;
1427 }
1428
1429 #define RESOLVE_IMM1() \
1430 if (src1 & SLJIT_IMM) { \
1431 if (src1w) { \
1432 PTR_FAIL_IF(load_immediate(compiler, DR(TMP_REG1), src1w)); \
1433 src1 = TMP_REG1; \
1434 } \
1435 else \
1436 src1 = 0; \
1437 }
1438
1439 #define RESOLVE_IMM2() \
1440 if (src2 & SLJIT_IMM) { \
1441 if (src2w) { \
1442 PTR_FAIL_IF(load_immediate(compiler, DR(TMP_REG2), src2w)); \
1443 src2 = TMP_REG2; \
1444 } \
1445 else \
1446 src2 = 0; \
1447 }
1448
1449 SLJIT_API_FUNC_ATTRIBUTE struct sljit_jump* sljit_emit_cmp(struct sljit_compiler *compiler, int type,
1450 int src1, sljit_w src1w,
1451 int src2, sljit_w src2w)
1452 {
1453 struct sljit_jump *jump;
1454 int flags;
1455 sljit_ins inst;
1456
1457 CHECK_ERROR_PTR();
1458 check_sljit_emit_cmp(compiler, type, src1, src1w, src2, src2w);
1459
1460 compiler->cache_arg = 0;
1461 compiler->cache_argw = 0;
1462 flags = ((type & SLJIT_INT_OP) ? INT_DATA : WORD_DATA) | LOAD_DATA;
1463 if (src1 & SLJIT_MEM) {
1464 if (getput_arg_fast(compiler, flags, DR(TMP_REG1), src1, src1w))
1465 PTR_FAIL_IF(compiler->error);
1466 else
1467 PTR_FAIL_IF(getput_arg(compiler, flags, DR(TMP_REG1), src1, src1w, src2, src2w));
1468 src1 = TMP_REG1;
1469 }
1470 if (src2 & SLJIT_MEM) {
1471 if (getput_arg_fast(compiler, flags, DR(TMP_REG2), src2, src2w))
1472 PTR_FAIL_IF(compiler->error);
1473 else
1474 PTR_FAIL_IF(getput_arg(compiler, flags, DR(TMP_REG2), src2, src2w, 0, 0));
1475 src2 = TMP_REG2;
1476 }
1477
1478 jump = (struct sljit_jump*)ensure_abuf(compiler, sizeof(struct sljit_jump));
1479 PTR_FAIL_IF(!jump);
1480 set_jump(jump, compiler, type & SLJIT_REWRITABLE_JUMP);
1481 type &= 0xff;
1482
1483 if (type <= SLJIT_C_NOT_EQUAL) {
1484 RESOLVE_IMM1();
1485 RESOLVE_IMM2();
1486 jump->flags |= IS_BIT26_COND;
1487 if (compiler->delay_slot == MOVABLE_INS || (compiler->delay_slot != UNMOVABLE_INS && compiler->delay_slot != DR(src1) && compiler->delay_slot != DR(src2)))
1488 jump->flags |= IS_MOVABLE;
1489 PTR_FAIL_IF(push_inst(compiler, (type == SLJIT_C_EQUAL ? BNE : BEQ) | S(src1) | T(src2) | JUMP_LENGTH, UNMOVABLE_INS));
1490 }
1491 else if (type >= SLJIT_C_SIG_LESS && (((src1 & SLJIT_IMM) && (src1w == 0)) || ((src2 & SLJIT_IMM) && (src2w == 0)))) {
1492 inst = NOP;
1493 if ((src1 & SLJIT_IMM) && (src1w == 0)) {
1494 RESOLVE_IMM2();
1495 switch (type) {
1496 case SLJIT_C_SIG_LESS:
1497 inst = BLEZ;
1498 jump->flags |= IS_BIT26_COND;
1499 break;
1500 case SLJIT_C_SIG_GREATER_EQUAL:
1501 inst = BGTZ;
1502 jump->flags |= IS_BIT26_COND;
1503 break;
1504 case SLJIT_C_SIG_GREATER:
1505 inst = BGEZ;
1506 jump->flags |= IS_BIT16_COND;
1507 break;
1508 case SLJIT_C_SIG_LESS_EQUAL:
1509 inst = BLTZ;
1510 jump->flags |= IS_BIT16_COND;
1511 break;
1512 }
1513 src1 = src2;
1514 }
1515 else {
1516 RESOLVE_IMM1();
1517 switch (type) {
1518 case SLJIT_C_SIG_LESS:
1519 inst = BGEZ;
1520 jump->flags |= IS_BIT16_COND;
1521 break;
1522 case SLJIT_C_SIG_GREATER_EQUAL:
1523 inst = BLTZ;
1524 jump->flags |= IS_BIT16_COND;
1525 break;
1526 case SLJIT_C_SIG_GREATER:
1527 inst = BLEZ;
1528 jump->flags |= IS_BIT26_COND;
1529 break;
1530 case SLJIT_C_SIG_LESS_EQUAL:
1531 inst = BGTZ;
1532 jump->flags |= IS_BIT26_COND;
1533 break;
1534 }
1535 }
1536 PTR_FAIL_IF(push_inst(compiler, inst | S(src1) | JUMP_LENGTH, UNMOVABLE_INS));
1537 }
1538 else {
1539 if (type == SLJIT_C_LESS || type == SLJIT_C_GREATER_EQUAL || type == SLJIT_C_SIG_LESS || type == SLJIT_C_SIG_GREATER_EQUAL) {
1540 RESOLVE_IMM1();
1541 if ((src2 & SLJIT_IMM) && src2w <= SIMM_MAX && src2w >= SIMM_MIN)
1542 PTR_FAIL_IF(push_inst(compiler, (type <= SLJIT_C_LESS_EQUAL ? SLTIU : SLTI) | S(src1) | T(TMP_REG1) | IMM(src2w), DR(TMP_REG1)));
1543 else {
1544 RESOLVE_IMM2();
1545 PTR_FAIL_IF(push_inst(compiler, (type <= SLJIT_C_LESS_EQUAL ? SLTU : SLT) | S(src1) | T(src2) | D(TMP_REG1), DR(TMP_REG1)));
1546 }
1547 type = (type == SLJIT_C_LESS || type == SLJIT_C_SIG_LESS) ? SLJIT_C_NOT_EQUAL : SLJIT_C_EQUAL;
1548 }
1549 else {
1550 RESOLVE_IMM2();
1551 if ((src1 & SLJIT_IMM) && src1w <= SIMM_MAX && src1w >= SIMM_MIN)
1552 PTR_FAIL_IF(push_inst(compiler, (type <= SLJIT_C_LESS_EQUAL ? SLTIU : SLTI) | S(src2) | T(TMP_REG1) | IMM(src1w), DR(TMP_REG1)));
1553 else {
1554 RESOLVE_IMM1();
1555 PTR_FAIL_IF(push_inst(compiler, (type <= SLJIT_C_LESS_EQUAL ? SLTU : SLT) | S(src2) | T(src1) | D(TMP_REG1), DR(TMP_REG1)));
1556 }
1557 type = (type == SLJIT_C_GREATER || type == SLJIT_C_SIG_GREATER) ? SLJIT_C_NOT_EQUAL : SLJIT_C_EQUAL;
1558 }
1559
1560 jump->flags |= IS_BIT26_COND;
1561 PTR_FAIL_IF(push_inst(compiler, (type == SLJIT_C_EQUAL ? BNE : BEQ) | S(TMP_REG1) | TA(0) | JUMP_LENGTH, UNMOVABLE_INS));
1562 }
1563
1564 PTR_FAIL_IF(emit_const(compiler, TMP_REG2, 0));
1565 PTR_FAIL_IF(push_inst(compiler, JR | S(TMP_REG2), UNMOVABLE_INS));
1566 jump->addr = compiler->size;
1567 PTR_FAIL_IF(push_inst(compiler, NOP, UNMOVABLE_INS));
1568 return jump;
1569 }
1570
1571 #undef RESOLVE_IMM1
1572 #undef RESOLVE_IMM2
1573
1574 #undef JUMP_LENGTH
1575 #undef BR_Z
1576 #undef BR_NZ
1577 #undef BR_T
1578 #undef BR_F
1579
1580 SLJIT_API_FUNC_ATTRIBUTE int sljit_emit_ijump(struct sljit_compiler *compiler, int type, int src, sljit_w srcw)
1581 {
1582 int src_r = TMP_REG2;
1583 struct sljit_jump *jump = NULL;
1584
1585 CHECK_ERROR();
1586 check_sljit_emit_ijump(compiler, type, src, srcw);
1587
1588 if (src >= SLJIT_TEMPORARY_REG1 && src <= SLJIT_NO_REGISTERS) {
1589 if (DR(src) != 4)
1590 src_r = src;
1591 else
1592 FAIL_IF(push_inst(compiler, ADDU_W | S(src) | TA(0) | D(TMP_REG2), DR(TMP_REG2)));
1593 }
1594
1595 if (type >= SLJIT_CALL0) {
1596 SLJIT_ASSERT(DR(PIC_ADDR_REG) == 25 && PIC_ADDR_REG == TMP_REG2);
1597 if (src & (SLJIT_IMM | SLJIT_MEM)) {
1598 if (src & SLJIT_IMM)
1599 FAIL_IF(load_immediate(compiler, DR(PIC_ADDR_REG), srcw));
1600 else {
1601 SLJIT_ASSERT(src_r == TMP_REG2 && (src & SLJIT_MEM));
1602 FAIL_IF(emit_op(compiler, SLJIT_MOV, WORD_DATA, TMP_REG2, 0, TMP_REG1, 0, src, srcw));
1603 }
1604 FAIL_IF(push_inst(compiler, JALR | S(PIC_ADDR_REG) | DA(RETURN_ADDR_REG), UNMOVABLE_INS));
1605 /* We need an extra instruction in any case. */
1606 return push_inst(compiler, ADDU_W | S(SLJIT_TEMPORARY_REG1) | TA(0) | DA(4), UNMOVABLE_INS);
1607 }
1608
1609 /* Register input. */
1610 if (type >= SLJIT_CALL1)
1611 FAIL_IF(push_inst(compiler, ADDU_W | S(SLJIT_TEMPORARY_REG1) | TA(0) | DA(4), 4));
1612 FAIL_IF(push_inst(compiler, JALR | S(src_r) | DA(RETURN_ADDR_REG), UNMOVABLE_INS));
1613 return push_inst(compiler, ADDU_W | S(src_r) | TA(0) | D(PIC_ADDR_REG), UNMOVABLE_INS);
1614 }
1615
1616 if (src & SLJIT_IMM) {
1617 jump = (struct sljit_jump*)ensure_abuf(compiler, sizeof(struct sljit_jump));
1618 FAIL_IF(!jump);
1619 set_jump(jump, compiler, JUMP_ADDR | ((type >= SLJIT_FAST_CALL) ? IS_JAL : 0));
1620 jump->u.target = srcw;
1621
1622 if (compiler->delay_slot != UNMOVABLE_INS)
1623 jump->flags |= IS_MOVABLE;
1624
1625 FAIL_IF(emit_const(compiler, TMP_REG2, 0));
1626 }
1627 else if (src & SLJIT_MEM)
1628 FAIL_IF(emit_op(compiler, SLJIT_MOV, WORD_DATA, TMP_REG2, 0, TMP_REG1, 0, src, srcw));
1629
1630 FAIL_IF(push_inst(compiler, JR | S(src_r), UNMOVABLE_INS));
1631 if (jump)
1632 jump->addr = compiler->size;
1633 FAIL_IF(push_inst(compiler, NOP, UNMOVABLE_INS));
1634 return SLJIT_SUCCESS;
1635 }
1636
1637 SLJIT_API_FUNC_ATTRIBUTE int sljit_emit_cond_value(struct sljit_compiler *compiler, int op, int dst, sljit_w dstw, int type)
1638 {
1639 int sugg_dst_ar, dst_ar;
1640
1641 CHECK_ERROR();
1642 check_sljit_emit_cond_value(compiler, op, dst, dstw, type);
1643
1644 if (dst == SLJIT_UNUSED)
1645 return SLJIT_SUCCESS;
1646
1647 sugg_dst_ar = DR((op == SLJIT_MOV && dst >= SLJIT_TEMPORARY_REG1 && dst <= SLJIT_NO_REGISTERS) ? dst : TMP_REG2);
1648
1649 switch (type) {
1650 case SLJIT_C_EQUAL:
1651 case SLJIT_C_NOT_EQUAL:
1652 FAIL_IF(push_inst(compiler, SLTIU | SA(EQUAL_FLAG) | TA(sugg_dst_ar) | IMM(1), sugg_dst_ar));
1653 dst_ar = sugg_dst_ar;
1654 break;
1655 case SLJIT_C_LESS:
1656 case SLJIT_C_GREATER_EQUAL:
1657 case SLJIT_C_FLOAT_LESS:
1658 case SLJIT_C_FLOAT_GREATER_EQUAL:
1659 dst_ar = ULESS_FLAG;
1660 break;
1661 case SLJIT_C_GREATER:
1662 case SLJIT_C_LESS_EQUAL:
1663 case SLJIT_C_FLOAT_GREATER:
1664 case SLJIT_C_FLOAT_LESS_EQUAL:
1665 dst_ar = UGREATER_FLAG;
1666 break;
1667 case SLJIT_C_SIG_LESS:
1668 case SLJIT_C_SIG_GREATER_EQUAL:
1669 dst_ar = LESS_FLAG;
1670 break;
1671 case SLJIT_C_SIG_GREATER:
1672 case SLJIT_C_SIG_LESS_EQUAL:
1673 dst_ar = GREATER_FLAG;
1674 break;
1675 case SLJIT_C_OVERFLOW:
1676 case SLJIT_C_NOT_OVERFLOW:
1677 dst_ar = OVERFLOW_FLAG;
1678 break;
1679 case SLJIT_C_MUL_OVERFLOW:
1680 case SLJIT_C_MUL_NOT_OVERFLOW:
1681 FAIL_IF(push_inst(compiler, SLTIU | SA(OVERFLOW_FLAG) | TA(sugg_dst_ar) | IMM(1), sugg_dst_ar));
1682 dst_ar = sugg_dst_ar;
1683 type ^= 0x1; /* Flip type bit for the XORI below. */
1684 break;
1685 case SLJIT_C_FLOAT_EQUAL:
1686 case SLJIT_C_FLOAT_NOT_EQUAL:
1687 dst_ar = EQUAL_FLAG;
1688 break;
1689
1690 case SLJIT_C_FLOAT_NAN:
1691 case SLJIT_C_FLOAT_NOT_NAN:
1692 FAIL_IF(push_inst(compiler, CFC1 | TA(sugg_dst_ar) | DA(FCSR_REG), sugg_dst_ar));
1693 FAIL_IF(push_inst(compiler, SRL | TA(sugg_dst_ar) | DA(sugg_dst_ar) | SH_IMM(23), sugg_dst_ar));
1694 FAIL_IF(push_inst(compiler, ANDI | SA(sugg_dst_ar) | TA(sugg_dst_ar) | IMM(1), sugg_dst_ar));
1695 dst_ar = sugg_dst_ar;
1696 break;
1697
1698 default:
1699 SLJIT_ASSERT_STOP();
1700 dst_ar = sugg_dst_ar;
1701 break;
1702 }
1703
1704 if (type & 0x1) {
1705 FAIL_IF(push_inst(compiler, XORI | SA(dst_ar) | TA(sugg_dst_ar) | IMM(1), sugg_dst_ar));
1706 dst_ar = sugg_dst_ar;
1707 }
1708
1709 if (GET_OPCODE(op) == SLJIT_OR) {
1710 if (DR(TMP_REG2) != dst_ar)
1711 FAIL_IF(push_inst(compiler, ADDU_W | SA(dst_ar) | TA(0) | D(TMP_REG2), DR(TMP_REG2)));
1712 return emit_op(compiler, op, CUMULATIVE_OP | LOGICAL_OP | IMM_OP, dst, dstw, dst, dstw, TMP_REG2, 0);
1713 }
1714
1715 if (dst & SLJIT_MEM)
1716 return emit_op_mem(compiler, WORD_DATA, dst_ar, dst, dstw);
1717
1718 if (sugg_dst_ar != dst_ar)
1719 return push_inst(compiler, ADDU_W | SA(dst_ar) | TA(0) | DA(sugg_dst_ar), sugg_dst_ar);
1720 return SLJIT_SUCCESS;
1721 }
1722
1723 SLJIT_API_FUNC_ATTRIBUTE struct sljit_const* sljit_emit_const(struct sljit_compiler *compiler, int dst, sljit_w dstw, sljit_w init_value)
1724 {
1725 struct sljit_const *const_;
1726 int reg;
1727
1728 CHECK_ERROR_PTR();
1729 check_sljit_emit_const(compiler, dst, dstw, init_value);
1730
1731 const_ = (struct sljit_const*)ensure_abuf(compiler, sizeof(struct sljit_const));
1732 PTR_FAIL_IF(!const_);
1733 set_const(const_, compiler);
1734
1735 reg = (dst >= SLJIT_TEMPORARY_REG1 && dst <= SLJIT_NO_REGISTERS) ? dst : TMP_REG2;
1736
1737 PTR_FAIL_IF(emit_const(compiler, reg, init_value));
1738
1739 if (dst & SLJIT_MEM)
1740 PTR_FAIL_IF(emit_op(compiler, SLJIT_MOV, WORD_DATA, dst, dstw, TMP_REG1, 0, TMP_REG2, 0));
1741 return const_;
1742 }

  ViewVC Help
Powered by ViewVC 1.1.5