/[pcre]/code/trunk/sljit/sljitNativeMIPS_common.c
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Contents of /code/trunk/sljit/sljitNativeMIPS_common.c

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Revision 1754 - (show annotations)
Wed Jul 17 07:17:16 2019 UTC (7 months, 1 week ago) by zherczeg
File MIME type: text/plain
File size: 72505 byte(s)
JIT compiler update.
1 /*
2 * Stack-less Just-In-Time compiler
3 *
4 * Copyright Zoltan Herczeg (hzmester@freemail.hu). All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without modification, are
7 * permitted provided that the following conditions are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright notice, this list of
10 * conditions and the following disclaimer.
11 *
12 * 2. Redistributions in binary form must reproduce the above copyright notice, this list
13 * of conditions and the following disclaimer in the documentation and/or other materials
14 * provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER(S) AND CONTRIBUTORS ``AS IS'' AND ANY
17 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
19 * SHALL THE COPYRIGHT HOLDER(S) OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
21 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
22 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
24 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 */
26
27 /* Latest MIPS architecture. */
28 /* Automatically detect SLJIT_MIPS_R1 */
29
30 #if (defined __mips_isa_rev) && (__mips_isa_rev >= 6)
31 #define SLJIT_MIPS_R6 1
32 #endif
33
34 SLJIT_API_FUNC_ATTRIBUTE const char* sljit_get_platform_name(void)
35 {
36 #if (defined SLJIT_MIPS_R6 && SLJIT_MIPS_R6)
37
38 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
39 return "MIPS32-R6" SLJIT_CPUINFO;
40 #else /* !SLJIT_CONFIG_MIPS_32 */
41 return "MIPS64-R6" SLJIT_CPUINFO;
42 #endif /* SLJIT_CONFIG_MIPS_32 */
43
44 #elif (defined SLJIT_MIPS_R1 && SLJIT_MIPS_R1)
45
46 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
47 return "MIPS32-R1" SLJIT_CPUINFO;
48 #else /* !SLJIT_CONFIG_MIPS_32 */
49 return "MIPS64-R1" SLJIT_CPUINFO;
50 #endif /* SLJIT_CONFIG_MIPS_32 */
51
52 #else /* SLJIT_MIPS_R1 */
53 return "MIPS III" SLJIT_CPUINFO;
54 #endif /* SLJIT_MIPS_R6 */
55 }
56
57 /* Length of an instruction word
58 Both for mips-32 and mips-64 */
59 typedef sljit_u32 sljit_ins;
60
61 #define TMP_REG1 (SLJIT_NUMBER_OF_REGISTERS + 2)
62 #define TMP_REG2 (SLJIT_NUMBER_OF_REGISTERS + 3)
63 #define TMP_REG3 (SLJIT_NUMBER_OF_REGISTERS + 4)
64
65 /* For position independent code, t9 must contain the function address. */
66 #define PIC_ADDR_REG TMP_REG2
67
68 /* Floating point status register. */
69 #define FCSR_REG 31
70 /* Return address register. */
71 #define RETURN_ADDR_REG 31
72
73 /* Flags are kept in volatile registers. */
74 #define EQUAL_FLAG 3
75 #define OTHER_FLAG 1
76
77 #define TMP_FREG1 (SLJIT_NUMBER_OF_FLOAT_REGISTERS + 1)
78 #define TMP_FREG2 (SLJIT_NUMBER_OF_FLOAT_REGISTERS + 2)
79 #define TMP_FREG3 (SLJIT_NUMBER_OF_FLOAT_REGISTERS + 3)
80
81 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 5] = {
82 0, 2, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 24, 23, 22, 21, 20, 19, 18, 17, 16, 29, 4, 25, 31
83 };
84
85 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
86
87 static const sljit_u8 freg_map[SLJIT_NUMBER_OF_FLOAT_REGISTERS + 4] = {
88 0, 0, 14, 2, 4, 6, 8, 12, 10, 16
89 };
90
91 #else
92
93 static const sljit_u8 freg_map[SLJIT_NUMBER_OF_FLOAT_REGISTERS + 4] = {
94 0, 0, 13, 14, 15, 16, 17, 12, 18, 10
95 };
96
97 #endif
98
99 /* --------------------------------------------------------------------- */
100 /* Instrucion forms */
101 /* --------------------------------------------------------------------- */
102
103 #define S(s) (reg_map[s] << 21)
104 #define T(t) (reg_map[t] << 16)
105 #define D(d) (reg_map[d] << 11)
106 #define FT(t) (freg_map[t] << 16)
107 #define FS(s) (freg_map[s] << 11)
108 #define FD(d) (freg_map[d] << 6)
109 /* Absolute registers. */
110 #define SA(s) ((s) << 21)
111 #define TA(t) ((t) << 16)
112 #define DA(d) ((d) << 11)
113 #define IMM(imm) ((imm) & 0xffff)
114 #define SH_IMM(imm) ((imm) << 6)
115
116 #define DR(dr) (reg_map[dr])
117 #define FR(dr) (freg_map[dr])
118 #define HI(opcode) ((opcode) << 26)
119 #define LO(opcode) (opcode)
120 #if (defined SLJIT_MIPS_R6 && SLJIT_MIPS_R6)
121 /* CMP.cond.fmt */
122 /* S = (20 << 21) D = (21 << 21) */
123 #define CMP_FMT_S (20 << 21)
124 #endif /* SLJIT_MIPS_R6 */
125 /* S = (16 << 21) D = (17 << 21) */
126 #define FMT_S (16 << 21)
127 #define FMT_D (17 << 21)
128
129 #define ABS_S (HI(17) | FMT_S | LO(5))
130 #define ADD_S (HI(17) | FMT_S | LO(0))
131 #define ADDIU (HI(9))
132 #define ADDU (HI(0) | LO(33))
133 #define AND (HI(0) | LO(36))
134 #define ANDI (HI(12))
135 #define B (HI(4))
136 #define BAL (HI(1) | (17 << 16))
137 #if (defined SLJIT_MIPS_R6 && SLJIT_MIPS_R6)
138 #define BC1EQZ (HI(17) | (9 << 21) | FT(TMP_FREG3))
139 #define BC1NEZ (HI(17) | (13 << 21) | FT(TMP_FREG3))
140 #else /* !SLJIT_MIPS_R6 */
141 #define BC1F (HI(17) | (8 << 21))
142 #define BC1T (HI(17) | (8 << 21) | (1 << 16))
143 #endif /* SLJIT_MIPS_R6 */
144 #define BEQ (HI(4))
145 #define BGEZ (HI(1) | (1 << 16))
146 #define BGTZ (HI(7))
147 #define BLEZ (HI(6))
148 #define BLTZ (HI(1) | (0 << 16))
149 #define BNE (HI(5))
150 #define BREAK (HI(0) | LO(13))
151 #define CFC1 (HI(17) | (2 << 21))
152 #if (defined SLJIT_MIPS_R6 && SLJIT_MIPS_R6)
153 #define C_UEQ_S (HI(17) | CMP_FMT_S | LO(3))
154 #define C_ULE_S (HI(17) | CMP_FMT_S | LO(7))
155 #define C_ULT_S (HI(17) | CMP_FMT_S | LO(5))
156 #define C_UN_S (HI(17) | CMP_FMT_S | LO(1))
157 #define C_FD (FD(TMP_FREG3))
158 #else /* !SLJIT_MIPS_R6 */
159 #define C_UEQ_S (HI(17) | FMT_S | LO(51))
160 #define C_ULE_S (HI(17) | FMT_S | LO(55))
161 #define C_ULT_S (HI(17) | FMT_S | LO(53))
162 #define C_UN_S (HI(17) | FMT_S | LO(49))
163 #define C_FD (0)
164 #endif /* SLJIT_MIPS_R6 */
165 #define CVT_S_S (HI(17) | FMT_S | LO(32))
166 #define DADDIU (HI(25))
167 #define DADDU (HI(0) | LO(45))
168 #if (defined SLJIT_MIPS_R6 && SLJIT_MIPS_R6)
169 #define DDIV (HI(0) | (2 << 6) | LO(30))
170 #define DDIVU (HI(0) | (2 << 6) | LO(31))
171 #define DMOD (HI(0) | (3 << 6) | LO(30))
172 #define DMODU (HI(0) | (3 << 6) | LO(31))
173 #define DIV (HI(0) | (2 << 6) | LO(26))
174 #define DIVU (HI(0) | (2 << 6) | LO(27))
175 #define DMUH (HI(0) | (3 << 6) | LO(28))
176 #define DMUHU (HI(0) | (3 << 6) | LO(29))
177 #define DMUL (HI(0) | (2 << 6) | LO(28))
178 #define DMULU (HI(0) | (2 << 6) | LO(29))
179 #else /* !SLJIT_MIPS_R6 */
180 #define DDIV (HI(0) | LO(30))
181 #define DDIVU (HI(0) | LO(31))
182 #define DIV (HI(0) | LO(26))
183 #define DIVU (HI(0) | LO(27))
184 #define DMULT (HI(0) | LO(28))
185 #define DMULTU (HI(0) | LO(29))
186 #endif /* SLJIT_MIPS_R6 */
187 #define DIV_S (HI(17) | FMT_S | LO(3))
188 #define DSLL (HI(0) | LO(56))
189 #define DSLL32 (HI(0) | LO(60))
190 #define DSLLV (HI(0) | LO(20))
191 #define DSRA (HI(0) | LO(59))
192 #define DSRA32 (HI(0) | LO(63))
193 #define DSRAV (HI(0) | LO(23))
194 #define DSRL (HI(0) | LO(58))
195 #define DSRL32 (HI(0) | LO(62))
196 #define DSRLV (HI(0) | LO(22))
197 #define DSUBU (HI(0) | LO(47))
198 #define J (HI(2))
199 #define JAL (HI(3))
200 #define JALR (HI(0) | LO(9))
201 #if (defined SLJIT_MIPS_R6 && SLJIT_MIPS_R6)
202 #define JR (HI(0) | LO(9))
203 #else /* !SLJIT_MIPS_R6 */
204 #define JR (HI(0) | LO(8))
205 #endif /* SLJIT_MIPS_R6 */
206 #define LD (HI(55))
207 #define LUI (HI(15))
208 #define LW (HI(35))
209 #define MFC1 (HI(17))
210 #if !(defined SLJIT_MIPS_R6 && SLJIT_MIPS_R6)
211 #define MFHI (HI(0) | LO(16))
212 #define MFLO (HI(0) | LO(18))
213 #else /* SLJIT_MIPS_R6 */
214 #define MOD (HI(0) | (3 << 6) | LO(26))
215 #define MODU (HI(0) | (3 << 6) | LO(27))
216 #endif /* !SLJIT_MIPS_R6 */
217 #define MOV_S (HI(17) | FMT_S | LO(6))
218 #define MTC1 (HI(17) | (4 << 21))
219 #if (defined SLJIT_MIPS_R6 && SLJIT_MIPS_R6)
220 #define MUH (HI(0) | (3 << 6) | LO(24))
221 #define MUHU (HI(0) | (3 << 6) | LO(25))
222 #define MUL (HI(0) | (2 << 6) | LO(24))
223 #define MULU (HI(0) | (2 << 6) | LO(25))
224 #else /* !SLJIT_MIPS_R6 */
225 #define MULT (HI(0) | LO(24))
226 #define MULTU (HI(0) | LO(25))
227 #endif /* SLJIT_MIPS_R6 */
228 #define MUL_S (HI(17) | FMT_S | LO(2))
229 #define NEG_S (HI(17) | FMT_S | LO(7))
230 #define NOP (HI(0) | LO(0))
231 #define NOR (HI(0) | LO(39))
232 #define OR (HI(0) | LO(37))
233 #define ORI (HI(13))
234 #define SD (HI(63))
235 #define SDC1 (HI(61))
236 #define SLT (HI(0) | LO(42))
237 #define SLTI (HI(10))
238 #define SLTIU (HI(11))
239 #define SLTU (HI(0) | LO(43))
240 #define SLL (HI(0) | LO(0))
241 #define SLLV (HI(0) | LO(4))
242 #define SRL (HI(0) | LO(2))
243 #define SRLV (HI(0) | LO(6))
244 #define SRA (HI(0) | LO(3))
245 #define SRAV (HI(0) | LO(7))
246 #define SUB_S (HI(17) | FMT_S | LO(1))
247 #define SUBU (HI(0) | LO(35))
248 #define SW (HI(43))
249 #define SWC1 (HI(57))
250 #define TRUNC_W_S (HI(17) | FMT_S | LO(13))
251 #define XOR (HI(0) | LO(38))
252 #define XORI (HI(14))
253
254 #if (defined SLJIT_MIPS_R1 && SLJIT_MIPS_R1) || (defined SLJIT_MIPS_R6 && SLJIT_MIPS_R6)
255 #define CLZ (HI(28) | LO(32))
256 #if (defined SLJIT_MIPS_R6 && SLJIT_MIPS_R6)
257 #define DCLZ (LO(18))
258 #else /* !SLJIT_MIPS_R6 */
259 #define DCLZ (HI(28) | LO(36))
260 #define MOVF (HI(0) | (0 << 16) | LO(1))
261 #define MOVN (HI(0) | LO(11))
262 #define MOVT (HI(0) | (1 << 16) | LO(1))
263 #define MOVZ (HI(0) | LO(10))
264 #define MUL (HI(28) | LO(2))
265 #endif /* SLJIT_MIPS_R6 */
266 #define PREF (HI(51))
267 #define PREFX (HI(19) | LO(15))
268 #define SEB (HI(31) | (16 << 6) | LO(32))
269 #define SEH (HI(31) | (24 << 6) | LO(32))
270 #endif
271
272 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
273 #define ADDU_W ADDU
274 #define ADDIU_W ADDIU
275 #define SLL_W SLL
276 #define SUBU_W SUBU
277 #else
278 #define ADDU_W DADDU
279 #define ADDIU_W DADDIU
280 #define SLL_W DSLL
281 #define SUBU_W DSUBU
282 #endif
283
284 #define SIMM_MAX (0x7fff)
285 #define SIMM_MIN (-0x8000)
286 #define UIMM_MAX (0xffff)
287
288 /* dest_reg is the absolute name of the register
289 Useful for reordering instructions in the delay slot. */
290 static sljit_s32 push_inst(struct sljit_compiler *compiler, sljit_ins ins, sljit_s32 delay_slot)
291 {
292 SLJIT_ASSERT(delay_slot == MOVABLE_INS || delay_slot >= UNMOVABLE_INS
293 || delay_slot == ((ins >> 11) & 0x1f) || delay_slot == ((ins >> 16) & 0x1f));
294 sljit_ins *ptr = (sljit_ins*)ensure_buf(compiler, sizeof(sljit_ins));
295 FAIL_IF(!ptr);
296 *ptr = ins;
297 compiler->size++;
298 compiler->delay_slot = delay_slot;
299 return SLJIT_SUCCESS;
300 }
301
302 static SLJIT_INLINE sljit_ins invert_branch(sljit_s32 flags)
303 {
304 if (flags & IS_BIT26_COND)
305 return (1 << 26);
306 #if (defined SLJIT_MIPS_R6 && SLJIT_MIPS_R6)
307 if (flags & IS_BIT23_COND)
308 return (1 << 23);
309 #endif /* SLJIT_MIPS_R6 */
310 return (1 << 16);
311 }
312
313 static SLJIT_INLINE sljit_ins* detect_jump_type(struct sljit_jump *jump, sljit_ins *code_ptr, sljit_ins *code, sljit_sw executable_offset)
314 {
315 sljit_sw diff;
316 sljit_uw target_addr;
317 sljit_ins *inst;
318 sljit_ins saved_inst;
319
320 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
321 if (jump->flags & (SLJIT_REWRITABLE_JUMP | IS_CALL))
322 return code_ptr;
323 #else
324 if (jump->flags & SLJIT_REWRITABLE_JUMP)
325 return code_ptr;
326 #endif
327
328 if (jump->flags & JUMP_ADDR)
329 target_addr = jump->u.target;
330 else {
331 SLJIT_ASSERT(jump->flags & JUMP_LABEL);
332 target_addr = (sljit_uw)(code + jump->u.label->size) + (sljit_uw)executable_offset;
333 }
334
335 inst = (sljit_ins *)jump->addr;
336 if (jump->flags & IS_COND)
337 inst--;
338
339 #if (defined SLJIT_CONFIG_MIPS_64 && SLJIT_CONFIG_MIPS_64)
340 if (jump->flags & IS_CALL)
341 goto keep_address;
342 #endif
343
344 /* B instructions. */
345 if (jump->flags & IS_MOVABLE) {
346 diff = ((sljit_sw)target_addr - (sljit_sw)inst - executable_offset) >> 2;
347 if (diff <= SIMM_MAX && diff >= SIMM_MIN) {
348 jump->flags |= PATCH_B;
349
350 if (!(jump->flags & IS_COND)) {
351 inst[0] = inst[-1];
352 inst[-1] = (jump->flags & IS_JAL) ? BAL : B;
353 jump->addr -= sizeof(sljit_ins);
354 return inst;
355 }
356 saved_inst = inst[0];
357 inst[0] = inst[-1];
358 inst[-1] = saved_inst ^ invert_branch(jump->flags);
359 jump->addr -= 2 * sizeof(sljit_ins);
360 return inst;
361 }
362 }
363 else {
364 diff = ((sljit_sw)target_addr - (sljit_sw)(inst + 1) - executable_offset) >> 2;
365 if (diff <= SIMM_MAX && diff >= SIMM_MIN) {
366 jump->flags |= PATCH_B;
367
368 if (!(jump->flags & IS_COND)) {
369 inst[0] = (jump->flags & IS_JAL) ? BAL : B;
370 inst[1] = NOP;
371 return inst + 1;
372 }
373 inst[0] = inst[0] ^ invert_branch(jump->flags);
374 inst[1] = NOP;
375 jump->addr -= sizeof(sljit_ins);
376 return inst + 1;
377 }
378 }
379
380 if (jump->flags & IS_COND) {
381 if ((jump->flags & IS_MOVABLE) && (target_addr & ~0xfffffff) == ((jump->addr + 2 * sizeof(sljit_ins)) & ~0xfffffff)) {
382 jump->flags |= PATCH_J;
383 saved_inst = inst[0];
384 inst[0] = inst[-1];
385 inst[-1] = (saved_inst & 0xffff0000) | 3;
386 inst[1] = J;
387 inst[2] = NOP;
388 return inst + 2;
389 }
390 else if ((target_addr & ~0xfffffff) == ((jump->addr + 3 * sizeof(sljit_ins)) & ~0xfffffff)) {
391 jump->flags |= PATCH_J;
392 inst[0] = (inst[0] & 0xffff0000) | 3;
393 inst[1] = NOP;
394 inst[2] = J;
395 inst[3] = NOP;
396 jump->addr += sizeof(sljit_ins);
397 return inst + 3;
398 }
399 }
400 else {
401 /* J instuctions. */
402 if ((jump->flags & IS_MOVABLE) && (target_addr & ~0xfffffff) == (jump->addr & ~0xfffffff)) {
403 jump->flags |= PATCH_J;
404 inst[0] = inst[-1];
405 inst[-1] = (jump->flags & IS_JAL) ? JAL : J;
406 jump->addr -= sizeof(sljit_ins);
407 return inst;
408 }
409
410 if ((target_addr & ~0xfffffff) == ((jump->addr + sizeof(sljit_ins)) & ~0xfffffff)) {
411 jump->flags |= PATCH_J;
412 inst[0] = (jump->flags & IS_JAL) ? JAL : J;
413 inst[1] = NOP;
414 return inst + 1;
415 }
416 }
417
418 #if (defined SLJIT_CONFIG_MIPS_64 && SLJIT_CONFIG_MIPS_64)
419 keep_address:
420 if (target_addr <= 0x7fffffff) {
421 jump->flags |= PATCH_ABS32;
422 if (jump->flags & IS_COND) {
423 inst[0] -= 4;
424 inst++;
425 }
426 inst[2] = inst[6];
427 inst[3] = inst[7];
428 return inst + 3;
429 }
430 if (target_addr <= 0x7fffffffffffl) {
431 jump->flags |= PATCH_ABS48;
432 if (jump->flags & IS_COND) {
433 inst[0] -= 2;
434 inst++;
435 }
436 inst[4] = inst[6];
437 inst[5] = inst[7];
438 return inst + 5;
439 }
440 #endif
441
442 return code_ptr;
443 }
444
445 #ifdef __GNUC__
446 static __attribute__ ((noinline)) void sljit_cache_flush(void* code, void* code_ptr)
447 {
448 SLJIT_CACHE_FLUSH(code, code_ptr);
449 }
450 #endif
451
452 #if (defined SLJIT_CONFIG_MIPS_64 && SLJIT_CONFIG_MIPS_64)
453
454 static SLJIT_INLINE sljit_sw put_label_get_length(struct sljit_put_label *put_label, sljit_uw max_label)
455 {
456 if (max_label < 0x80000000l) {
457 put_label->flags = 0;
458 return 1;
459 }
460
461 if (max_label < 0x800000000000l) {
462 put_label->flags = 1;
463 return 3;
464 }
465
466 put_label->flags = 2;
467 return 5;
468 }
469
470 static SLJIT_INLINE void put_label_set(struct sljit_put_label *put_label)
471 {
472 sljit_uw addr = put_label->label->addr;
473 sljit_ins *inst = (sljit_ins *)put_label->addr;
474 sljit_s32 reg = *inst;
475
476 if (put_label->flags == 0) {
477 SLJIT_ASSERT(addr < 0x80000000l);
478 inst[0] = LUI | T(reg) | IMM(addr >> 16);
479 }
480 else if (put_label->flags == 1) {
481 SLJIT_ASSERT(addr < 0x800000000000l);
482 inst[0] = LUI | T(reg) | IMM(addr >> 32);
483 inst[1] = ORI | S(reg) | T(reg) | IMM((addr >> 16) & 0xffff);
484 inst[2] = DSLL | T(reg) | D(reg) | SH_IMM(16);
485 inst += 2;
486 }
487 else {
488 inst[0] = LUI | T(reg) | IMM(addr >> 48);
489 inst[1] = ORI | S(reg) | T(reg) | IMM((addr >> 32) & 0xffff);
490 inst[2] = DSLL | T(reg) | D(reg) | SH_IMM(16);
491 inst[3] = ORI | S(reg) | T(reg) | IMM((addr >> 16) & 0xffff);
492 inst[4] = DSLL | T(reg) | D(reg) | SH_IMM(16);
493 inst += 4;
494 }
495
496 inst[1] = ORI | S(reg) | T(reg) | IMM(addr & 0xffff);
497 }
498
499 #endif
500
501 SLJIT_API_FUNC_ATTRIBUTE void* sljit_generate_code(struct sljit_compiler *compiler)
502 {
503 struct sljit_memory_fragment *buf;
504 sljit_ins *code;
505 sljit_ins *code_ptr;
506 sljit_ins *buf_ptr;
507 sljit_ins *buf_end;
508 sljit_uw word_count;
509 sljit_uw next_addr;
510 sljit_sw executable_offset;
511 sljit_uw addr;
512
513 struct sljit_label *label;
514 struct sljit_jump *jump;
515 struct sljit_const *const_;
516 struct sljit_put_label *put_label;
517
518 CHECK_ERROR_PTR();
519 CHECK_PTR(check_sljit_generate_code(compiler));
520 reverse_buf(compiler);
521
522 code = (sljit_ins*)SLJIT_MALLOC_EXEC(compiler->size * sizeof(sljit_ins));
523 PTR_FAIL_WITH_EXEC_IF(code);
524 buf = compiler->buf;
525
526 code_ptr = code;
527 word_count = 0;
528 next_addr = 0;
529 executable_offset = SLJIT_EXEC_OFFSET(code);
530
531 label = compiler->labels;
532 jump = compiler->jumps;
533 const_ = compiler->consts;
534 put_label = compiler->put_labels;
535
536 do {
537 buf_ptr = (sljit_ins*)buf->memory;
538 buf_end = buf_ptr + (buf->used_size >> 2);
539 do {
540 *code_ptr = *buf_ptr++;
541 if (next_addr == word_count) {
542 SLJIT_ASSERT(!label || label->size >= word_count);
543 SLJIT_ASSERT(!jump || jump->addr >= word_count);
544 SLJIT_ASSERT(!const_ || const_->addr >= word_count);
545 SLJIT_ASSERT(!put_label || put_label->addr >= word_count);
546
547 /* These structures are ordered by their address. */
548 if (label && label->size == word_count) {
549 label->addr = (sljit_uw)SLJIT_ADD_EXEC_OFFSET(code_ptr, executable_offset);
550 label->size = code_ptr - code;
551 label = label->next;
552 }
553 if (jump && jump->addr == word_count) {
554 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
555 jump->addr = (sljit_uw)(code_ptr - 3);
556 #else
557 jump->addr = (sljit_uw)(code_ptr - 7);
558 #endif
559 code_ptr = detect_jump_type(jump, code_ptr, code, executable_offset);
560 jump = jump->next;
561 }
562 if (const_ && const_->addr == word_count) {
563 const_->addr = (sljit_uw)code_ptr;
564 const_ = const_->next;
565 }
566 if (put_label && put_label->addr == word_count) {
567 SLJIT_ASSERT(put_label->label);
568 put_label->addr = (sljit_uw)code_ptr;
569 #if (defined SLJIT_CONFIG_MIPS_64 && SLJIT_CONFIG_MIPS_64)
570 code_ptr += put_label_get_length(put_label, (sljit_uw)(SLJIT_ADD_EXEC_OFFSET(code, executable_offset) + put_label->label->size));
571 word_count += 5;
572 #endif
573 put_label = put_label->next;
574 }
575 next_addr = compute_next_addr(label, jump, const_, put_label);
576 }
577 code_ptr ++;
578 word_count ++;
579 } while (buf_ptr < buf_end);
580
581 buf = buf->next;
582 } while (buf);
583
584 if (label && label->size == word_count) {
585 label->addr = (sljit_uw)code_ptr;
586 label->size = code_ptr - code;
587 label = label->next;
588 }
589
590 SLJIT_ASSERT(!label);
591 SLJIT_ASSERT(!jump);
592 SLJIT_ASSERT(!const_);
593 SLJIT_ASSERT(!put_label);
594 SLJIT_ASSERT(code_ptr - code <= (sljit_sw)compiler->size);
595
596 jump = compiler->jumps;
597 while (jump) {
598 do {
599 addr = (jump->flags & JUMP_LABEL) ? jump->u.label->addr : jump->u.target;
600 buf_ptr = (sljit_ins *)jump->addr;
601
602 if (jump->flags & PATCH_B) {
603 addr = (sljit_sw)(addr - ((sljit_uw)SLJIT_ADD_EXEC_OFFSET(buf_ptr, executable_offset) + sizeof(sljit_ins))) >> 2;
604 SLJIT_ASSERT((sljit_sw)addr <= SIMM_MAX && (sljit_sw)addr >= SIMM_MIN);
605 buf_ptr[0] = (buf_ptr[0] & 0xffff0000) | (addr & 0xffff);
606 break;
607 }
608 if (jump->flags & PATCH_J) {
609 SLJIT_ASSERT((addr & ~0xfffffff) == (((sljit_uw)SLJIT_ADD_EXEC_OFFSET(buf_ptr, executable_offset) + sizeof(sljit_ins)) & ~0xfffffff));
610 buf_ptr[0] |= (addr >> 2) & 0x03ffffff;
611 break;
612 }
613
614 /* Set the fields of immediate loads. */
615 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
616 buf_ptr[0] = (buf_ptr[0] & 0xffff0000) | ((addr >> 16) & 0xffff);
617 buf_ptr[1] = (buf_ptr[1] & 0xffff0000) | (addr & 0xffff);
618 #else
619 if (jump->flags & PATCH_ABS32) {
620 SLJIT_ASSERT(addr <= 0x7fffffff);
621 buf_ptr[0] = (buf_ptr[0] & 0xffff0000) | ((addr >> 16) & 0xffff);
622 buf_ptr[1] = (buf_ptr[1] & 0xffff0000) | (addr & 0xffff);
623 }
624 else if (jump->flags & PATCH_ABS48) {
625 SLJIT_ASSERT(addr <= 0x7fffffffffffl);
626 buf_ptr[0] = (buf_ptr[0] & 0xffff0000) | ((addr >> 32) & 0xffff);
627 buf_ptr[1] = (buf_ptr[1] & 0xffff0000) | ((addr >> 16) & 0xffff);
628 buf_ptr[3] = (buf_ptr[3] & 0xffff0000) | (addr & 0xffff);
629 }
630 else {
631 buf_ptr[0] = (buf_ptr[0] & 0xffff0000) | ((addr >> 48) & 0xffff);
632 buf_ptr[1] = (buf_ptr[1] & 0xffff0000) | ((addr >> 32) & 0xffff);
633 buf_ptr[3] = (buf_ptr[3] & 0xffff0000) | ((addr >> 16) & 0xffff);
634 buf_ptr[5] = (buf_ptr[5] & 0xffff0000) | (addr & 0xffff);
635 }
636 #endif
637 } while (0);
638 jump = jump->next;
639 }
640
641 put_label = compiler->put_labels;
642 while (put_label) {
643 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
644 addr = put_label->label->addr;
645 buf_ptr = (sljit_ins *)put_label->addr;
646
647 SLJIT_ASSERT((buf_ptr[0] & 0xffe00000) == LUI && (buf_ptr[1] & 0xfc000000) == ORI);
648 buf_ptr[0] |= (addr >> 16) & 0xffff;
649 buf_ptr[1] |= addr & 0xffff;
650 #else
651 put_label_set(put_label);
652 #endif
653 put_label = put_label->next;
654 }
655
656 compiler->error = SLJIT_ERR_COMPILED;
657 compiler->executable_offset = executable_offset;
658 compiler->executable_size = (code_ptr - code) * sizeof(sljit_ins);
659
660 code = (sljit_ins *)SLJIT_ADD_EXEC_OFFSET(code, executable_offset);
661 code_ptr = (sljit_ins *)SLJIT_ADD_EXEC_OFFSET(code_ptr, executable_offset);
662
663 #ifndef __GNUC__
664 SLJIT_CACHE_FLUSH(code, code_ptr);
665 #else
666 /* GCC workaround for invalid code generation with -O2. */
667 sljit_cache_flush(code, code_ptr);
668 #endif
669 return code;
670 }
671
672 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_has_cpu_feature(sljit_s32 feature_type)
673 {
674 sljit_sw fir = 0;
675
676 switch (feature_type) {
677 case SLJIT_HAS_FPU:
678 #ifdef SLJIT_IS_FPU_AVAILABLE
679 return SLJIT_IS_FPU_AVAILABLE;
680 #elif defined(__GNUC__)
681 asm ("cfc1 %0, $0" : "=r"(fir));
682 return (fir >> 22) & 0x1;
683 #else
684 #error "FIR check is not implemented for this architecture"
685 #endif
686
687 #if (defined SLJIT_MIPS_R1 && SLJIT_MIPS_R1)
688 case SLJIT_HAS_CLZ:
689 case SLJIT_HAS_CMOV:
690 return 1;
691 #endif
692
693 default:
694 return fir;
695 }
696 }
697
698 /* --------------------------------------------------------------------- */
699 /* Entry, exit */
700 /* --------------------------------------------------------------------- */
701
702 /* Creates an index in data_transfer_insts array. */
703 #define LOAD_DATA 0x01
704 #define WORD_DATA 0x00
705 #define BYTE_DATA 0x02
706 #define HALF_DATA 0x04
707 #define INT_DATA 0x06
708 #define SIGNED_DATA 0x08
709 /* Separates integer and floating point registers */
710 #define GPR_REG 0x0f
711 #define DOUBLE_DATA 0x10
712 #define SINGLE_DATA 0x12
713
714 #define MEM_MASK 0x1f
715
716 #define ARG_TEST 0x00020
717 #define ALT_KEEP_CACHE 0x00040
718 #define CUMULATIVE_OP 0x00080
719 #define LOGICAL_OP 0x00100
720 #define IMM_OP 0x00200
721 #define SRC2_IMM 0x00400
722
723 #define UNUSED_DEST 0x00800
724 #define REG_DEST 0x01000
725 #define REG1_SOURCE 0x02000
726 #define REG2_SOURCE 0x04000
727 #define SLOW_SRC1 0x08000
728 #define SLOW_SRC2 0x10000
729 #define SLOW_DEST 0x20000
730
731 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
732 #define STACK_STORE SW
733 #define STACK_LOAD LW
734 #else
735 #define STACK_STORE SD
736 #define STACK_LOAD LD
737 #endif
738
739 static SLJIT_INLINE sljit_s32 emit_op_mem(struct sljit_compiler *compiler, sljit_s32 flags, sljit_s32 reg_ar, sljit_s32 arg, sljit_sw argw);
740
741 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
742 #include "sljitNativeMIPS_32.c"
743 #else
744 #include "sljitNativeMIPS_64.c"
745 #endif
746
747 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_enter(struct sljit_compiler *compiler,
748 sljit_s32 options, sljit_s32 arg_types, sljit_s32 scratches, sljit_s32 saveds,
749 sljit_s32 fscratches, sljit_s32 fsaveds, sljit_s32 local_size)
750 {
751 sljit_ins base;
752 sljit_s32 args, i, tmp, offs;
753
754 CHECK_ERROR();
755 CHECK(check_sljit_emit_enter(compiler, options, arg_types, scratches, saveds, fscratches, fsaveds, local_size));
756 set_emit_enter(compiler, options, arg_types, scratches, saveds, fscratches, fsaveds, local_size);
757
758 local_size += GET_SAVED_REGISTERS_SIZE(scratches, saveds, 1) + SLJIT_LOCALS_OFFSET;
759 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
760 local_size = (local_size + 15) & ~0xf;
761 #else
762 local_size = (local_size + 31) & ~0x1f;
763 #endif
764 compiler->local_size = local_size;
765
766 if (local_size <= SIMM_MAX) {
767 /* Frequent case. */
768 FAIL_IF(push_inst(compiler, ADDIU_W | S(SLJIT_SP) | T(SLJIT_SP) | IMM(-local_size), DR(SLJIT_SP)));
769 base = S(SLJIT_SP);
770 offs = local_size - (sljit_sw)sizeof(sljit_sw);
771 }
772 else {
773 FAIL_IF(load_immediate(compiler, DR(OTHER_FLAG), local_size));
774 FAIL_IF(push_inst(compiler, ADDU_W | S(SLJIT_SP) | TA(0) | D(TMP_REG2), DR(TMP_REG2)));
775 FAIL_IF(push_inst(compiler, SUBU_W | S(SLJIT_SP) | T(OTHER_FLAG) | D(SLJIT_SP), DR(SLJIT_SP)));
776 base = S(TMP_REG2);
777 local_size = 0;
778 offs = -(sljit_sw)sizeof(sljit_sw);
779 }
780
781 FAIL_IF(push_inst(compiler, STACK_STORE | base | TA(RETURN_ADDR_REG) | IMM(offs), MOVABLE_INS));
782
783 tmp = saveds < SLJIT_NUMBER_OF_SAVED_REGISTERS ? (SLJIT_S0 + 1 - saveds) : SLJIT_FIRST_SAVED_REG;
784 for (i = SLJIT_S0; i >= tmp; i--) {
785 offs -= (sljit_s32)(sizeof(sljit_sw));
786 FAIL_IF(push_inst(compiler, STACK_STORE | base | T(i) | IMM(offs), MOVABLE_INS));
787 }
788
789 for (i = scratches; i >= SLJIT_FIRST_SAVED_REG; i--) {
790 offs -= (sljit_s32)(sizeof(sljit_sw));
791 FAIL_IF(push_inst(compiler, STACK_STORE | base | T(i) | IMM(offs), MOVABLE_INS));
792 }
793
794 args = get_arg_count(arg_types);
795
796 if (args >= 1)
797 FAIL_IF(push_inst(compiler, ADDU_W | SA(4) | TA(0) | D(SLJIT_S0), DR(SLJIT_S0)));
798 if (args >= 2)
799 FAIL_IF(push_inst(compiler, ADDU_W | SA(5) | TA(0) | D(SLJIT_S1), DR(SLJIT_S1)));
800 if (args >= 3)
801 FAIL_IF(push_inst(compiler, ADDU_W | SA(6) | TA(0) | D(SLJIT_S2), DR(SLJIT_S2)));
802
803 return SLJIT_SUCCESS;
804 }
805
806 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_set_context(struct sljit_compiler *compiler,
807 sljit_s32 options, sljit_s32 arg_types, sljit_s32 scratches, sljit_s32 saveds,
808 sljit_s32 fscratches, sljit_s32 fsaveds, sljit_s32 local_size)
809 {
810 CHECK_ERROR();
811 CHECK(check_sljit_set_context(compiler, options, arg_types, scratches, saveds, fscratches, fsaveds, local_size));
812 set_set_context(compiler, options, arg_types, scratches, saveds, fscratches, fsaveds, local_size);
813
814 local_size += GET_SAVED_REGISTERS_SIZE(scratches, saveds, 1) + SLJIT_LOCALS_OFFSET;
815 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
816 compiler->local_size = (local_size + 15) & ~0xf;
817 #else
818 compiler->local_size = (local_size + 31) & ~0x1f;
819 #endif
820 return SLJIT_SUCCESS;
821 }
822
823 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_return(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 src, sljit_sw srcw)
824 {
825 sljit_s32 local_size, i, tmp, offs;
826 sljit_ins base;
827
828 CHECK_ERROR();
829 CHECK(check_sljit_emit_return(compiler, op, src, srcw));
830
831 FAIL_IF(emit_mov_before_return(compiler, op, src, srcw));
832
833 local_size = compiler->local_size;
834 if (local_size <= SIMM_MAX)
835 base = S(SLJIT_SP);
836 else {
837 FAIL_IF(load_immediate(compiler, DR(TMP_REG1), local_size));
838 FAIL_IF(push_inst(compiler, ADDU_W | S(SLJIT_SP) | T(TMP_REG1) | D(TMP_REG1), DR(TMP_REG1)));
839 base = S(TMP_REG1);
840 local_size = 0;
841 }
842
843 FAIL_IF(push_inst(compiler, STACK_LOAD | base | TA(RETURN_ADDR_REG) | IMM(local_size - (sljit_s32)sizeof(sljit_sw)), RETURN_ADDR_REG));
844 offs = local_size - (sljit_s32)GET_SAVED_REGISTERS_SIZE(compiler->scratches, compiler->saveds, 1);
845
846 tmp = compiler->scratches;
847 for (i = SLJIT_FIRST_SAVED_REG; i <= tmp; i++) {
848 FAIL_IF(push_inst(compiler, STACK_LOAD | base | T(i) | IMM(offs), DR(i)));
849 offs += (sljit_s32)(sizeof(sljit_sw));
850 }
851
852 tmp = compiler->saveds < SLJIT_NUMBER_OF_SAVED_REGISTERS ? (SLJIT_S0 + 1 - compiler->saveds) : SLJIT_FIRST_SAVED_REG;
853 for (i = tmp; i <= SLJIT_S0; i++) {
854 FAIL_IF(push_inst(compiler, STACK_LOAD | base | T(i) | IMM(offs), DR(i)));
855 offs += (sljit_s32)(sizeof(sljit_sw));
856 }
857
858 SLJIT_ASSERT(offs == local_size - (sljit_sw)(sizeof(sljit_sw)));
859
860 FAIL_IF(push_inst(compiler, JR | SA(RETURN_ADDR_REG), UNMOVABLE_INS));
861 if (compiler->local_size <= SIMM_MAX)
862 return push_inst(compiler, ADDIU_W | S(SLJIT_SP) | T(SLJIT_SP) | IMM(compiler->local_size), UNMOVABLE_INS);
863 else
864 return push_inst(compiler, ADDU_W | S(TMP_REG1) | TA(0) | D(SLJIT_SP), UNMOVABLE_INS);
865 }
866
867 #undef STACK_STORE
868 #undef STACK_LOAD
869
870 /* --------------------------------------------------------------------- */
871 /* Operators */
872 /* --------------------------------------------------------------------- */
873
874 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
875 #define ARCH_32_64(a, b) a
876 #else
877 #define ARCH_32_64(a, b) b
878 #endif
879
880 static const sljit_ins data_transfer_insts[16 + 4] = {
881 /* u w s */ ARCH_32_64(HI(43) /* sw */, HI(63) /* sd */),
882 /* u w l */ ARCH_32_64(HI(35) /* lw */, HI(55) /* ld */),
883 /* u b s */ HI(40) /* sb */,
884 /* u b l */ HI(36) /* lbu */,
885 /* u h s */ HI(41) /* sh */,
886 /* u h l */ HI(37) /* lhu */,
887 /* u i s */ HI(43) /* sw */,
888 /* u i l */ ARCH_32_64(HI(35) /* lw */, HI(39) /* lwu */),
889
890 /* s w s */ ARCH_32_64(HI(43) /* sw */, HI(63) /* sd */),
891 /* s w l */ ARCH_32_64(HI(35) /* lw */, HI(55) /* ld */),
892 /* s b s */ HI(40) /* sb */,
893 /* s b l */ HI(32) /* lb */,
894 /* s h s */ HI(41) /* sh */,
895 /* s h l */ HI(33) /* lh */,
896 /* s i s */ HI(43) /* sw */,
897 /* s i l */ HI(35) /* lw */,
898
899 /* d s */ HI(61) /* sdc1 */,
900 /* d l */ HI(53) /* ldc1 */,
901 /* s s */ HI(57) /* swc1 */,
902 /* s l */ HI(49) /* lwc1 */,
903 };
904
905 #undef ARCH_32_64
906
907 /* reg_ar is an absoulute register! */
908
909 /* Can perform an operation using at most 1 instruction. */
910 static sljit_s32 getput_arg_fast(struct sljit_compiler *compiler, sljit_s32 flags, sljit_s32 reg_ar, sljit_s32 arg, sljit_sw argw)
911 {
912 SLJIT_ASSERT(arg & SLJIT_MEM);
913
914 if (!(arg & OFFS_REG_MASK) && argw <= SIMM_MAX && argw >= SIMM_MIN) {
915 /* Works for both absoulte and relative addresses. */
916 if (SLJIT_UNLIKELY(flags & ARG_TEST))
917 return 1;
918 FAIL_IF(push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(arg & REG_MASK)
919 | TA(reg_ar) | IMM(argw), ((flags & MEM_MASK) <= GPR_REG && (flags & LOAD_DATA)) ? reg_ar : MOVABLE_INS));
920 return -1;
921 }
922 return 0;
923 }
924
925 /* See getput_arg below.
926 Note: can_cache is called only for binary operators. Those
927 operators always uses word arguments without write back. */
928 static sljit_s32 can_cache(sljit_s32 arg, sljit_sw argw, sljit_s32 next_arg, sljit_sw next_argw)
929 {
930 SLJIT_ASSERT((arg & SLJIT_MEM) && (next_arg & SLJIT_MEM));
931
932 /* Simple operation except for updates. */
933 if (arg & OFFS_REG_MASK) {
934 argw &= 0x3;
935 next_argw &= 0x3;
936 if (argw && argw == next_argw && (arg == next_arg || (arg & OFFS_REG_MASK) == (next_arg & OFFS_REG_MASK)))
937 return 1;
938 return 0;
939 }
940
941 if (arg == next_arg) {
942 if (((next_argw - argw) <= SIMM_MAX && (next_argw - argw) >= SIMM_MIN))
943 return 1;
944 return 0;
945 }
946
947 return 0;
948 }
949
950 /* Emit the necessary instructions. See can_cache above. */
951 static sljit_s32 getput_arg(struct sljit_compiler *compiler, sljit_s32 flags, sljit_s32 reg_ar, sljit_s32 arg, sljit_sw argw, sljit_s32 next_arg, sljit_sw next_argw)
952 {
953 sljit_s32 tmp_ar, base, delay_slot;
954
955 SLJIT_ASSERT(arg & SLJIT_MEM);
956 if (!(next_arg & SLJIT_MEM)) {
957 next_arg = 0;
958 next_argw = 0;
959 }
960
961 if ((flags & MEM_MASK) <= GPR_REG && (flags & LOAD_DATA)) {
962 tmp_ar = reg_ar;
963 delay_slot = reg_ar;
964 }
965 else {
966 tmp_ar = DR(TMP_REG1);
967 delay_slot = MOVABLE_INS;
968 }
969 base = arg & REG_MASK;
970
971 if (SLJIT_UNLIKELY(arg & OFFS_REG_MASK)) {
972 argw &= 0x3;
973
974 /* Using the cache. */
975 if (argw == compiler->cache_argw) {
976 if (arg == compiler->cache_arg)
977 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(TMP_REG3) | TA(reg_ar), delay_slot);
978
979 if ((SLJIT_MEM | (arg & OFFS_REG_MASK)) == compiler->cache_arg) {
980 if (arg == next_arg && argw == (next_argw & 0x3)) {
981 compiler->cache_arg = arg;
982 compiler->cache_argw = argw;
983 FAIL_IF(push_inst(compiler, ADDU_W | S(base) | T(TMP_REG3) | D(TMP_REG3), DR(TMP_REG3)));
984 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(TMP_REG3) | TA(reg_ar), delay_slot);
985 }
986 FAIL_IF(push_inst(compiler, ADDU_W | S(base) | T(TMP_REG3) | DA(tmp_ar), tmp_ar));
987 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | SA(tmp_ar) | TA(reg_ar), delay_slot);
988 }
989 }
990
991 if (SLJIT_UNLIKELY(argw)) {
992 compiler->cache_arg = SLJIT_MEM | (arg & OFFS_REG_MASK);
993 compiler->cache_argw = argw;
994 FAIL_IF(push_inst(compiler, SLL_W | T(OFFS_REG(arg)) | D(TMP_REG3) | SH_IMM(argw), DR(TMP_REG3)));
995 }
996
997 if (arg == next_arg && argw == (next_argw & 0x3)) {
998 compiler->cache_arg = arg;
999 compiler->cache_argw = argw;
1000 FAIL_IF(push_inst(compiler, ADDU_W | S(base) | T(!argw ? OFFS_REG(arg) : TMP_REG3) | D(TMP_REG3), DR(TMP_REG3)));
1001 tmp_ar = DR(TMP_REG3);
1002 }
1003 else
1004 FAIL_IF(push_inst(compiler, ADDU_W | S(base) | T(!argw ? OFFS_REG(arg) : TMP_REG3) | DA(tmp_ar), tmp_ar));
1005 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | SA(tmp_ar) | TA(reg_ar), delay_slot);
1006 }
1007
1008 if (compiler->cache_arg == arg && argw - compiler->cache_argw <= SIMM_MAX && argw - compiler->cache_argw >= SIMM_MIN) {
1009 if (argw != compiler->cache_argw) {
1010 FAIL_IF(push_inst(compiler, ADDIU_W | S(TMP_REG3) | T(TMP_REG3) | IMM(argw - compiler->cache_argw), DR(TMP_REG3)));
1011 compiler->cache_argw = argw;
1012 }
1013 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(TMP_REG3) | TA(reg_ar), delay_slot);
1014 }
1015
1016 if (compiler->cache_arg == SLJIT_MEM && argw - compiler->cache_argw <= SIMM_MAX && argw - compiler->cache_argw >= SIMM_MIN) {
1017 if (argw != compiler->cache_argw)
1018 FAIL_IF(push_inst(compiler, ADDIU_W | S(TMP_REG3) | T(TMP_REG3) | IMM(argw - compiler->cache_argw), DR(TMP_REG3)));
1019 }
1020 else {
1021 compiler->cache_arg = SLJIT_MEM;
1022 FAIL_IF(load_immediate(compiler, DR(TMP_REG3), argw));
1023 }
1024 compiler->cache_argw = argw;
1025
1026 if (!base)
1027 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(TMP_REG3) | TA(reg_ar), delay_slot);
1028
1029 if (arg == next_arg && next_argw - argw <= SIMM_MAX && next_argw - argw >= SIMM_MIN) {
1030 compiler->cache_arg = arg;
1031 FAIL_IF(push_inst(compiler, ADDU_W | S(TMP_REG3) | T(base) | D(TMP_REG3), DR(TMP_REG3)));
1032 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(TMP_REG3) | TA(reg_ar), delay_slot);
1033 }
1034
1035 FAIL_IF(push_inst(compiler, ADDU_W | S(TMP_REG3) | T(base) | DA(tmp_ar), tmp_ar));
1036 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | SA(tmp_ar) | TA(reg_ar), delay_slot);
1037 }
1038
1039 static SLJIT_INLINE sljit_s32 emit_op_mem(struct sljit_compiler *compiler, sljit_s32 flags, sljit_s32 reg_ar, sljit_s32 arg, sljit_sw argw)
1040 {
1041 sljit_s32 tmp_ar, base, delay_slot;
1042
1043 if (getput_arg_fast(compiler, flags, reg_ar, arg, argw))
1044 return compiler->error;
1045
1046 if ((flags & MEM_MASK) <= GPR_REG && (flags & LOAD_DATA)) {
1047 tmp_ar = reg_ar;
1048 delay_slot = reg_ar;
1049 }
1050 else {
1051 tmp_ar = DR(TMP_REG1);
1052 delay_slot = MOVABLE_INS;
1053 }
1054 base = arg & REG_MASK;
1055
1056 if (SLJIT_UNLIKELY(arg & OFFS_REG_MASK)) {
1057 argw &= 0x3;
1058
1059 if (SLJIT_UNLIKELY(argw)) {
1060 FAIL_IF(push_inst(compiler, SLL_W | T(OFFS_REG(arg)) | DA(tmp_ar) | SH_IMM(argw), tmp_ar));
1061 FAIL_IF(push_inst(compiler, ADDU_W | S(base) | TA(tmp_ar) | DA(tmp_ar), tmp_ar));
1062 }
1063 else
1064 FAIL_IF(push_inst(compiler, ADDU_W | S(base) | T(OFFS_REG(arg)) | DA(tmp_ar), tmp_ar));
1065 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | SA(tmp_ar) | TA(reg_ar), delay_slot);
1066 }
1067
1068 FAIL_IF(load_immediate(compiler, tmp_ar, argw));
1069
1070 if (base != 0)
1071 FAIL_IF(push_inst(compiler, ADDU_W | S(base) | TA(tmp_ar) | DA(tmp_ar), tmp_ar));
1072
1073 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | SA(tmp_ar) | TA(reg_ar), delay_slot);
1074 }
1075
1076 static SLJIT_INLINE sljit_s32 emit_op_mem2(struct sljit_compiler *compiler, sljit_s32 flags, sljit_s32 reg, sljit_s32 arg1, sljit_sw arg1w, sljit_s32 arg2, sljit_sw arg2w)
1077 {
1078 if (getput_arg_fast(compiler, flags, reg, arg1, arg1w))
1079 return compiler->error;
1080 return getput_arg(compiler, flags, reg, arg1, arg1w, arg2, arg2w);
1081 }
1082
1083 static sljit_s32 emit_op(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 flags,
1084 sljit_s32 dst, sljit_sw dstw,
1085 sljit_s32 src1, sljit_sw src1w,
1086 sljit_s32 src2, sljit_sw src2w)
1087 {
1088 /* arg1 goes to TMP_REG1 or src reg
1089 arg2 goes to TMP_REG2, imm or src reg
1090 TMP_REG3 can be used for caching
1091 result goes to TMP_REG2, so put result can use TMP_REG1 and TMP_REG3. */
1092 sljit_s32 dst_r = TMP_REG2;
1093 sljit_s32 src1_r;
1094 sljit_sw src2_r = 0;
1095 sljit_s32 sugg_src2_r = TMP_REG2;
1096
1097 if (!(flags & ALT_KEEP_CACHE)) {
1098 compiler->cache_arg = 0;
1099 compiler->cache_argw = 0;
1100 }
1101
1102 if (SLJIT_UNLIKELY(dst == SLJIT_UNUSED)) {
1103 SLJIT_ASSERT(HAS_FLAGS(op));
1104 flags |= UNUSED_DEST;
1105 }
1106 else if (FAST_IS_REG(dst)) {
1107 dst_r = dst;
1108 flags |= REG_DEST;
1109 if (op >= SLJIT_MOV && op <= SLJIT_MOV_P)
1110 sugg_src2_r = dst_r;
1111 }
1112 else if ((dst & SLJIT_MEM) && !getput_arg_fast(compiler, flags | ARG_TEST, DR(TMP_REG1), dst, dstw))
1113 flags |= SLOW_DEST;
1114
1115 if (flags & IMM_OP) {
1116 if ((src2 & SLJIT_IMM) && src2w) {
1117 if ((!(flags & LOGICAL_OP) && (src2w <= SIMM_MAX && src2w >= SIMM_MIN))
1118 || ((flags & LOGICAL_OP) && !(src2w & ~UIMM_MAX))) {
1119 flags |= SRC2_IMM;
1120 src2_r = src2w;
1121 }
1122 }
1123 if (!(flags & SRC2_IMM) && (flags & CUMULATIVE_OP) && (src1 & SLJIT_IMM) && src1w) {
1124 if ((!(flags & LOGICAL_OP) && (src1w <= SIMM_MAX && src1w >= SIMM_MIN))
1125 || ((flags & LOGICAL_OP) && !(src1w & ~UIMM_MAX))) {
1126 flags |= SRC2_IMM;
1127 src2_r = src1w;
1128
1129 /* And swap arguments. */
1130 src1 = src2;
1131 src1w = src2w;
1132 src2 = SLJIT_IMM;
1133 /* src2w = src2_r unneeded. */
1134 }
1135 }
1136 }
1137
1138 /* Source 1. */
1139 if (FAST_IS_REG(src1)) {
1140 src1_r = src1;
1141 flags |= REG1_SOURCE;
1142 }
1143 else if (src1 & SLJIT_IMM) {
1144 if (src1w) {
1145 FAIL_IF(load_immediate(compiler, DR(TMP_REG1), src1w));
1146 src1_r = TMP_REG1;
1147 }
1148 else
1149 src1_r = 0;
1150 }
1151 else {
1152 if (getput_arg_fast(compiler, flags | LOAD_DATA, DR(TMP_REG1), src1, src1w))
1153 FAIL_IF(compiler->error);
1154 else
1155 flags |= SLOW_SRC1;
1156 src1_r = TMP_REG1;
1157 }
1158
1159 /* Source 2. */
1160 if (FAST_IS_REG(src2)) {
1161 src2_r = src2;
1162 flags |= REG2_SOURCE;
1163 if (!(flags & REG_DEST) && op >= SLJIT_MOV && op <= SLJIT_MOV_P)
1164 dst_r = src2_r;
1165 }
1166 else if (src2 & SLJIT_IMM) {
1167 if (!(flags & SRC2_IMM)) {
1168 if (src2w) {
1169 FAIL_IF(load_immediate(compiler, DR(sugg_src2_r), src2w));
1170 src2_r = sugg_src2_r;
1171 }
1172 else {
1173 src2_r = 0;
1174 if ((op >= SLJIT_MOV && op <= SLJIT_MOV_P) && (dst & SLJIT_MEM))
1175 dst_r = 0;
1176 }
1177 }
1178 }
1179 else {
1180 if (getput_arg_fast(compiler, flags | LOAD_DATA, DR(sugg_src2_r), src2, src2w))
1181 FAIL_IF(compiler->error);
1182 else
1183 flags |= SLOW_SRC2;
1184 src2_r = sugg_src2_r;
1185 }
1186
1187 if ((flags & (SLOW_SRC1 | SLOW_SRC2)) == (SLOW_SRC1 | SLOW_SRC2)) {
1188 SLJIT_ASSERT(src2_r == TMP_REG2);
1189 if (!can_cache(src1, src1w, src2, src2w) && can_cache(src1, src1w, dst, dstw)) {
1190 FAIL_IF(getput_arg(compiler, flags | LOAD_DATA, DR(TMP_REG2), src2, src2w, src1, src1w));
1191 FAIL_IF(getput_arg(compiler, flags | LOAD_DATA, DR(TMP_REG1), src1, src1w, dst, dstw));
1192 }
1193 else {
1194 FAIL_IF(getput_arg(compiler, flags | LOAD_DATA, DR(TMP_REG1), src1, src1w, src2, src2w));
1195 FAIL_IF(getput_arg(compiler, flags | LOAD_DATA, DR(TMP_REG2), src2, src2w, dst, dstw));
1196 }
1197 }
1198 else if (flags & SLOW_SRC1)
1199 FAIL_IF(getput_arg(compiler, flags | LOAD_DATA, DR(TMP_REG1), src1, src1w, dst, dstw));
1200 else if (flags & SLOW_SRC2)
1201 FAIL_IF(getput_arg(compiler, flags | LOAD_DATA, DR(sugg_src2_r), src2, src2w, dst, dstw));
1202
1203 FAIL_IF(emit_single_op(compiler, op, flags, dst_r, src1_r, src2_r));
1204
1205 if (dst & SLJIT_MEM) {
1206 if (!(flags & SLOW_DEST)) {
1207 getput_arg_fast(compiler, flags, DR(dst_r), dst, dstw);
1208 return compiler->error;
1209 }
1210 return getput_arg(compiler, flags, DR(dst_r), dst, dstw, 0, 0);
1211 }
1212
1213 return SLJIT_SUCCESS;
1214 }
1215
1216 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_op0(struct sljit_compiler *compiler, sljit_s32 op)
1217 {
1218 #if (defined SLJIT_CONFIG_MIPS_64 && SLJIT_CONFIG_MIPS_64)
1219 sljit_s32 int_op = op & SLJIT_I32_OP;
1220 #endif
1221
1222 CHECK_ERROR();
1223 CHECK(check_sljit_emit_op0(compiler, op));
1224
1225 op = GET_OPCODE(op);
1226 switch (op) {
1227 case SLJIT_BREAKPOINT:
1228 return push_inst(compiler, BREAK, UNMOVABLE_INS);
1229 case SLJIT_NOP:
1230 return push_inst(compiler, NOP, UNMOVABLE_INS);
1231 case SLJIT_LMUL_UW:
1232 case SLJIT_LMUL_SW:
1233 #if (defined SLJIT_MIPS_R6 && SLJIT_MIPS_R6)
1234 #if (defined SLJIT_CONFIG_MIPS_64 && SLJIT_CONFIG_MIPS_64)
1235 FAIL_IF(push_inst(compiler, (op == SLJIT_LMUL_UW ? DMULU : DMUL) | S(SLJIT_R0) | T(SLJIT_R1) | D(TMP_REG3), DR(TMP_REG3)));
1236 FAIL_IF(push_inst(compiler, (op == SLJIT_LMUL_UW ? DMUHU : DMUH) | S(SLJIT_R0) | T(SLJIT_R1) | D(TMP_REG1), DR(TMP_REG1)));
1237 #else /* !SLJIT_CONFIG_MIPS_64 */
1238 FAIL_IF(push_inst(compiler, (op == SLJIT_LMUL_UW ? MULU : MUL) | S(SLJIT_R0) | T(SLJIT_R1) | D(TMP_REG3), DR(TMP_REG3)));
1239 FAIL_IF(push_inst(compiler, (op == SLJIT_LMUL_UW ? MUHU : MUH) | S(SLJIT_R0) | T(SLJIT_R1) | D(TMP_REG1), DR(TMP_REG1)));
1240 #endif /* SLJIT_CONFIG_MIPS_64 */
1241 FAIL_IF(push_inst(compiler, ADDU_W | S(TMP_REG3) | TA(0) | D(SLJIT_R0), DR(SLJIT_R0)));
1242 return push_inst(compiler, ADDU_W | S(TMP_REG1) | TA(0) | D(SLJIT_R1), DR(SLJIT_R1));
1243 #else /* !SLJIT_MIPS_R6 */
1244 #if (defined SLJIT_CONFIG_MIPS_64 && SLJIT_CONFIG_MIPS_64)
1245 FAIL_IF(push_inst(compiler, (op == SLJIT_LMUL_UW ? DMULTU : DMULT) | S(SLJIT_R0) | T(SLJIT_R1), MOVABLE_INS));
1246 #else /* !SLJIT_CONFIG_MIPS_64 */
1247 FAIL_IF(push_inst(compiler, (op == SLJIT_LMUL_UW ? MULTU : MULT) | S(SLJIT_R0) | T(SLJIT_R1), MOVABLE_INS));
1248 #endif /* SLJIT_CONFIG_MIPS_64 */
1249 FAIL_IF(push_inst(compiler, MFLO | D(SLJIT_R0), DR(SLJIT_R0)));
1250 return push_inst(compiler, MFHI | D(SLJIT_R1), DR(SLJIT_R1));
1251 #endif /* SLJIT_MIPS_R6 */
1252 case SLJIT_DIVMOD_UW:
1253 case SLJIT_DIVMOD_SW:
1254 case SLJIT_DIV_UW:
1255 case SLJIT_DIV_SW:
1256 SLJIT_COMPILE_ASSERT((SLJIT_DIVMOD_UW & 0x2) == 0 && SLJIT_DIV_UW - 0x2 == SLJIT_DIVMOD_UW, bad_div_opcode_assignments);
1257 #if (defined SLJIT_MIPS_R6 && SLJIT_MIPS_R6)
1258 #if (defined SLJIT_CONFIG_MIPS_64 && SLJIT_CONFIG_MIPS_64)
1259 if (int_op) {
1260 FAIL_IF(push_inst(compiler, ((op | 0x2) == SLJIT_DIV_UW ? DIVU : DIV) | S(SLJIT_R0) | T(SLJIT_R1) | D(TMP_REG3), DR(TMP_REG3)));
1261 FAIL_IF(push_inst(compiler, ((op | 0x2) == SLJIT_DIV_UW ? MODU : MOD) | S(SLJIT_R0) | T(SLJIT_R1) | D(TMP_REG1), DR(TMP_REG1)));
1262 }
1263 else {
1264 FAIL_IF(push_inst(compiler, ((op | 0x2) == SLJIT_DIV_UW ? DDIVU : DDIV) | S(SLJIT_R0) | T(SLJIT_R1) | D(TMP_REG3), DR(TMP_REG3)));
1265 FAIL_IF(push_inst(compiler, ((op | 0x2) == SLJIT_DIV_UW ? DMODU : DMOD) | S(SLJIT_R0) | T(SLJIT_R1) | D(TMP_REG1), DR(TMP_REG1)));
1266 }
1267 #else /* !SLJIT_CONFIG_MIPS_64 */
1268 FAIL_IF(push_inst(compiler, ((op | 0x2) == SLJIT_DIV_UW ? DIVU : DIV) | S(SLJIT_R0) | T(SLJIT_R1) | D(TMP_REG3), DR(TMP_REG3)));
1269 FAIL_IF(push_inst(compiler, ((op | 0x2) == SLJIT_DIV_UW ? MODU : MOD) | S(SLJIT_R0) | T(SLJIT_R1) | D(TMP_REG1), DR(TMP_REG1)));
1270 #endif /* SLJIT_CONFIG_MIPS_64 */
1271 FAIL_IF(push_inst(compiler, ADDU_W | S(TMP_REG3) | TA(0) | D(SLJIT_R0), DR(SLJIT_R0)));
1272 return (op >= SLJIT_DIV_UW) ? SLJIT_SUCCESS : push_inst(compiler, ADDU_W | S(TMP_REG1) | TA(0) | D(SLJIT_R1), DR(SLJIT_R1));
1273 #else /* !SLJIT_MIPS_R6 */
1274 #if !(defined SLJIT_MIPS_R1 && SLJIT_MIPS_R1)
1275 FAIL_IF(push_inst(compiler, NOP, UNMOVABLE_INS));
1276 FAIL_IF(push_inst(compiler, NOP, UNMOVABLE_INS));
1277 #endif /* !SLJIT_MIPS_R1 */
1278 #if (defined SLJIT_CONFIG_MIPS_64 && SLJIT_CONFIG_MIPS_64)
1279 if (int_op)
1280 FAIL_IF(push_inst(compiler, ((op | 0x2) == SLJIT_DIV_UW ? DIVU : DIV) | S(SLJIT_R0) | T(SLJIT_R1), MOVABLE_INS));
1281 else
1282 FAIL_IF(push_inst(compiler, ((op | 0x2) == SLJIT_DIV_UW ? DDIVU : DDIV) | S(SLJIT_R0) | T(SLJIT_R1), MOVABLE_INS));
1283 #else /* !SLJIT_CONFIG_MIPS_64 */
1284 FAIL_IF(push_inst(compiler, ((op | 0x2) == SLJIT_DIV_UW ? DIVU : DIV) | S(SLJIT_R0) | T(SLJIT_R1), MOVABLE_INS));
1285 #endif /* SLJIT_CONFIG_MIPS_64 */
1286 FAIL_IF(push_inst(compiler, MFLO | D(SLJIT_R0), DR(SLJIT_R0)));
1287 return (op >= SLJIT_DIV_UW) ? SLJIT_SUCCESS : push_inst(compiler, MFHI | D(SLJIT_R1), DR(SLJIT_R1));
1288 #endif /* SLJIT_MIPS_R6 */
1289 }
1290
1291 return SLJIT_SUCCESS;
1292 }
1293
1294 #if (defined SLJIT_MIPS_R1 && SLJIT_MIPS_R1)
1295 static sljit_s32 emit_prefetch(struct sljit_compiler *compiler,
1296 sljit_s32 src, sljit_sw srcw)
1297 {
1298 if (!(src & OFFS_REG_MASK)) {
1299 if (srcw <= SIMM_MAX && srcw >= SIMM_MIN)
1300 return push_inst(compiler, PREF | S(src & REG_MASK) | IMM(srcw), MOVABLE_INS);
1301
1302 FAIL_IF(load_immediate(compiler, DR(TMP_REG1), srcw));
1303 return push_inst(compiler, PREFX | S(src & REG_MASK) | T(TMP_REG1), MOVABLE_INS);
1304 }
1305
1306 srcw &= 0x3;
1307
1308 if (SLJIT_UNLIKELY(srcw != 0)) {
1309 FAIL_IF(push_inst(compiler, SLL_W | T(OFFS_REG(src)) | D(TMP_REG1) | SH_IMM(srcw), DR(TMP_REG1)));
1310 return push_inst(compiler, PREFX | S(src & REG_MASK) | T(TMP_REG1), MOVABLE_INS);
1311 }
1312
1313 return push_inst(compiler, PREFX | S(src & REG_MASK) | T(OFFS_REG(src)), MOVABLE_INS);
1314 }
1315 #endif
1316
1317 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_op1(struct sljit_compiler *compiler, sljit_s32 op,
1318 sljit_s32 dst, sljit_sw dstw,
1319 sljit_s32 src, sljit_sw srcw)
1320 {
1321 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
1322 # define flags 0
1323 #else
1324 sljit_s32 flags = 0;
1325 #endif
1326
1327 CHECK_ERROR();
1328 CHECK(check_sljit_emit_op1(compiler, op, dst, dstw, src, srcw));
1329 ADJUST_LOCAL_OFFSET(dst, dstw);
1330 ADJUST_LOCAL_OFFSET(src, srcw);
1331
1332 if (dst == SLJIT_UNUSED && !HAS_FLAGS(op)) {
1333 #if (defined SLJIT_MIPS_R1 && SLJIT_MIPS_R1)
1334 if (op <= SLJIT_MOV_P && (src & SLJIT_MEM))
1335 return emit_prefetch(compiler, src, srcw);
1336 #endif
1337 return SLJIT_SUCCESS;
1338 }
1339
1340 #if (defined SLJIT_CONFIG_MIPS_64 && SLJIT_CONFIG_MIPS_64)
1341 if ((op & SLJIT_I32_OP) && GET_OPCODE(op) >= SLJIT_NOT)
1342 flags |= INT_DATA | SIGNED_DATA;
1343 #endif
1344
1345 switch (GET_OPCODE(op)) {
1346 case SLJIT_MOV:
1347 case SLJIT_MOV_P:
1348 return emit_op(compiler, SLJIT_MOV, WORD_DATA, dst, dstw, TMP_REG1, 0, src, srcw);
1349
1350 case SLJIT_MOV_U32:
1351 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
1352 return emit_op(compiler, SLJIT_MOV_U32, INT_DATA, dst, dstw, TMP_REG1, 0, src, srcw);
1353 #else
1354 return emit_op(compiler, SLJIT_MOV_U32, INT_DATA, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_u32)srcw : srcw);
1355 #endif
1356
1357 case SLJIT_MOV_S32:
1358 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
1359 return emit_op(compiler, SLJIT_MOV_S32, INT_DATA | SIGNED_DATA, dst, dstw, TMP_REG1, 0, src, srcw);
1360 #else
1361 return emit_op(compiler, SLJIT_MOV_S32, INT_DATA | SIGNED_DATA, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_s32)srcw : srcw);
1362 #endif
1363
1364 case SLJIT_MOV_U8:
1365 return emit_op(compiler, SLJIT_MOV_U8, BYTE_DATA, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_u8)srcw : srcw);
1366
1367 case SLJIT_MOV_S8:
1368 return emit_op(compiler, SLJIT_MOV_S8, BYTE_DATA | SIGNED_DATA, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_s8)srcw : srcw);
1369
1370 case SLJIT_MOV_U16:
1371 return emit_op(compiler, SLJIT_MOV_U16, HALF_DATA, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_u16)srcw : srcw);
1372
1373 case SLJIT_MOV_S16:
1374 return emit_op(compiler, SLJIT_MOV_S16, HALF_DATA | SIGNED_DATA, dst, dstw, TMP_REG1, 0, src, (src & SLJIT_IMM) ? (sljit_s16)srcw : srcw);
1375
1376 case SLJIT_NOT:
1377 return emit_op(compiler, op, flags, dst, dstw, TMP_REG1, 0, src, srcw);
1378
1379 case SLJIT_NEG:
1380 return emit_op(compiler, SLJIT_SUB | GET_ALL_FLAGS(op), flags | IMM_OP, dst, dstw, SLJIT_IMM, 0, src, srcw);
1381
1382 case SLJIT_CLZ:
1383 return emit_op(compiler, op, flags, dst, dstw, TMP_REG1, 0, src, srcw);
1384 }
1385
1386 SLJIT_UNREACHABLE();
1387 return SLJIT_SUCCESS;
1388
1389 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
1390 # undef flags
1391 #endif
1392 }
1393
1394 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_op2(struct sljit_compiler *compiler, sljit_s32 op,
1395 sljit_s32 dst, sljit_sw dstw,
1396 sljit_s32 src1, sljit_sw src1w,
1397 sljit_s32 src2, sljit_sw src2w)
1398 {
1399 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
1400 # define flags 0
1401 #else
1402 sljit_s32 flags = 0;
1403 #endif
1404
1405 CHECK_ERROR();
1406 CHECK(check_sljit_emit_op2(compiler, op, dst, dstw, src1, src1w, src2, src2w));
1407 ADJUST_LOCAL_OFFSET(dst, dstw);
1408 ADJUST_LOCAL_OFFSET(src1, src1w);
1409 ADJUST_LOCAL_OFFSET(src2, src2w);
1410
1411 if (dst == SLJIT_UNUSED && !HAS_FLAGS(op))
1412 return SLJIT_SUCCESS;
1413
1414 #if (defined SLJIT_CONFIG_MIPS_64 && SLJIT_CONFIG_MIPS_64)
1415 if (op & SLJIT_I32_OP) {
1416 flags |= INT_DATA | SIGNED_DATA;
1417 if (src1 & SLJIT_IMM)
1418 src1w = (sljit_s32)src1w;
1419 if (src2 & SLJIT_IMM)
1420 src2w = (sljit_s32)src2w;
1421 }
1422 #endif
1423
1424 switch (GET_OPCODE(op)) {
1425 case SLJIT_ADD:
1426 case SLJIT_ADDC:
1427 return emit_op(compiler, op, flags | CUMULATIVE_OP | IMM_OP, dst, dstw, src1, src1w, src2, src2w);
1428
1429 case SLJIT_SUB:
1430 case SLJIT_SUBC:
1431 return emit_op(compiler, op, flags | IMM_OP, dst, dstw, src1, src1w, src2, src2w);
1432
1433 case SLJIT_MUL:
1434 return emit_op(compiler, op, flags | CUMULATIVE_OP, dst, dstw, src1, src1w, src2, src2w);
1435
1436 case SLJIT_AND:
1437 case SLJIT_OR:
1438 case SLJIT_XOR:
1439 return emit_op(compiler, op, flags | CUMULATIVE_OP | LOGICAL_OP | IMM_OP, dst, dstw, src1, src1w, src2, src2w);
1440
1441 case SLJIT_SHL:
1442 case SLJIT_LSHR:
1443 case SLJIT_ASHR:
1444 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
1445 if (src2 & SLJIT_IMM)
1446 src2w &= 0x1f;
1447 #else
1448 if (src2 & SLJIT_IMM) {
1449 if (op & SLJIT_I32_OP)
1450 src2w &= 0x1f;
1451 else
1452 src2w &= 0x3f;
1453 }
1454 #endif
1455 return emit_op(compiler, op, flags | IMM_OP, dst, dstw, src1, src1w, src2, src2w);
1456 }
1457
1458 SLJIT_UNREACHABLE();
1459 return SLJIT_SUCCESS;
1460
1461 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
1462 # undef flags
1463 #endif
1464 }
1465
1466 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_get_register_index(sljit_s32 reg)
1467 {
1468 CHECK_REG_INDEX(check_sljit_get_register_index(reg));
1469 return reg_map[reg];
1470 }
1471
1472 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_get_float_register_index(sljit_s32 reg)
1473 {
1474 CHECK_REG_INDEX(check_sljit_get_float_register_index(reg));
1475 return FR(reg);
1476 }
1477
1478 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_op_custom(struct sljit_compiler *compiler,
1479 void *instruction, sljit_s32 size)
1480 {
1481 CHECK_ERROR();
1482 CHECK(check_sljit_emit_op_custom(compiler, instruction, size));
1483
1484 return push_inst(compiler, *(sljit_ins*)instruction, UNMOVABLE_INS);
1485 }
1486
1487 /* --------------------------------------------------------------------- */
1488 /* Floating point operators */
1489 /* --------------------------------------------------------------------- */
1490
1491 #define FLOAT_DATA(op) (DOUBLE_DATA | ((op & SLJIT_F32_OP) >> 7))
1492 #define FMT(op) (((op & SLJIT_F32_OP) ^ SLJIT_F32_OP) << (21 - 8))
1493
1494 static SLJIT_INLINE sljit_s32 sljit_emit_fop1_conv_sw_from_f64(struct sljit_compiler *compiler, sljit_s32 op,
1495 sljit_s32 dst, sljit_sw dstw,
1496 sljit_s32 src, sljit_sw srcw)
1497 {
1498 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
1499 # define flags 0
1500 #else
1501 sljit_s32 flags = (GET_OPCODE(op) == SLJIT_CONV_SW_FROM_F64) << 21;
1502 #endif
1503
1504 if (src & SLJIT_MEM) {
1505 FAIL_IF(emit_op_mem2(compiler, FLOAT_DATA(op) | LOAD_DATA, FR(TMP_FREG1), src, srcw, dst, dstw));
1506 src = TMP_FREG1;
1507 }
1508
1509 FAIL_IF(push_inst(compiler, (TRUNC_W_S ^ (flags >> 19)) | FMT(op) | FS(src) | FD(TMP_FREG1), MOVABLE_INS));
1510
1511 if (FAST_IS_REG(dst))
1512 return push_inst(compiler, MFC1 | flags | T(dst) | FS(TMP_FREG1), MOVABLE_INS);
1513
1514 /* Store the integer value from a VFP register. */
1515 return emit_op_mem2(compiler, flags ? DOUBLE_DATA : SINGLE_DATA, FR(TMP_FREG1), dst, dstw, 0, 0);
1516
1517 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
1518 # undef is_long
1519 #endif
1520 }
1521
1522 static SLJIT_INLINE sljit_s32 sljit_emit_fop1_conv_f64_from_sw(struct sljit_compiler *compiler, sljit_s32 op,
1523 sljit_s32 dst, sljit_sw dstw,
1524 sljit_s32 src, sljit_sw srcw)
1525 {
1526 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
1527 # define flags 0
1528 #else
1529 sljit_s32 flags = (GET_OPCODE(op) == SLJIT_CONV_F64_FROM_SW) << 21;
1530 #endif
1531
1532 sljit_s32 dst_r = FAST_IS_REG(dst) ? dst : TMP_FREG1;
1533
1534 if (FAST_IS_REG(src))
1535 FAIL_IF(push_inst(compiler, MTC1 | flags | T(src) | FS(TMP_FREG1), MOVABLE_INS));
1536 else if (src & SLJIT_MEM) {
1537 /* Load the integer value into a VFP register. */
1538 FAIL_IF(emit_op_mem2(compiler, ((flags) ? DOUBLE_DATA : SINGLE_DATA) | LOAD_DATA, FR(TMP_FREG1), src, srcw, dst, dstw));
1539 }
1540 else {
1541 #if (defined SLJIT_CONFIG_X86_64 && SLJIT_CONFIG_X86_64)
1542 if (GET_OPCODE(op) == SLJIT_CONV_F64_FROM_S32)
1543 srcw = (sljit_s32)srcw;
1544 #endif
1545 FAIL_IF(load_immediate(compiler, DR(TMP_REG1), srcw));
1546 FAIL_IF(push_inst(compiler, MTC1 | flags | T(TMP_REG1) | FS(TMP_FREG1), MOVABLE_INS));
1547 }
1548
1549 FAIL_IF(push_inst(compiler, CVT_S_S | flags | (4 << 21) | (((op & SLJIT_F32_OP) ^ SLJIT_F32_OP) >> 8) | FS(TMP_FREG1) | FD(dst_r), MOVABLE_INS));
1550
1551 if (dst & SLJIT_MEM)
1552 return emit_op_mem2(compiler, FLOAT_DATA(op), FR(TMP_FREG1), dst, dstw, 0, 0);
1553 return SLJIT_SUCCESS;
1554
1555 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
1556 # undef flags
1557 #endif
1558 }
1559
1560 static SLJIT_INLINE sljit_s32 sljit_emit_fop1_cmp(struct sljit_compiler *compiler, sljit_s32 op,
1561 sljit_s32 src1, sljit_sw src1w,
1562 sljit_s32 src2, sljit_sw src2w)
1563 {
1564 sljit_ins inst;
1565
1566 if (src1 & SLJIT_MEM) {
1567 FAIL_IF(emit_op_mem2(compiler, FLOAT_DATA(op) | LOAD_DATA, FR(TMP_FREG1), src1, src1w, src2, src2w));
1568 src1 = TMP_FREG1;
1569 }
1570
1571 if (src2 & SLJIT_MEM) {
1572 FAIL_IF(emit_op_mem2(compiler, FLOAT_DATA(op) | LOAD_DATA, FR(TMP_FREG2), src2, src2w, 0, 0));
1573 src2 = TMP_FREG2;
1574 }
1575
1576 switch (GET_FLAG_TYPE(op)) {
1577 case SLJIT_EQUAL_F64:
1578 case SLJIT_NOT_EQUAL_F64:
1579 inst = C_UEQ_S;
1580 break;
1581 case SLJIT_LESS_F64:
1582 case SLJIT_GREATER_EQUAL_F64:
1583 inst = C_ULT_S;
1584 break;
1585 case SLJIT_GREATER_F64:
1586 case SLJIT_LESS_EQUAL_F64:
1587 inst = C_ULE_S;
1588 break;
1589 default:
1590 SLJIT_ASSERT(GET_FLAG_TYPE(op) == SLJIT_UNORDERED_F64 || GET_FLAG_TYPE(op) == SLJIT_ORDERED_F64);
1591 inst = C_UN_S;
1592 break;
1593 }
1594 return push_inst(compiler, inst | FMT(op) | FT(src2) | FS(src1) | C_FD, UNMOVABLE_INS);
1595 }
1596
1597 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_fop1(struct sljit_compiler *compiler, sljit_s32 op,
1598 sljit_s32 dst, sljit_sw dstw,
1599 sljit_s32 src, sljit_sw srcw)
1600 {
1601 sljit_s32 dst_r;
1602
1603 CHECK_ERROR();
1604 compiler->cache_arg = 0;
1605 compiler->cache_argw = 0;
1606
1607 SLJIT_COMPILE_ASSERT((SLJIT_F32_OP == 0x100) && !(DOUBLE_DATA & 0x2), float_transfer_bit_error);
1608 SELECT_FOP1_OPERATION_WITH_CHECKS(compiler, op, dst, dstw, src, srcw);
1609
1610 if (GET_OPCODE(op) == SLJIT_CONV_F64_FROM_F32)
1611 op ^= SLJIT_F32_OP;
1612
1613 dst_r = FAST_IS_REG(dst) ? dst : TMP_FREG1;
1614
1615 if (src & SLJIT_MEM) {
1616 FAIL_IF(emit_op_mem2(compiler, FLOAT_DATA(op) | LOAD_DATA, FR(dst_r), src, srcw, dst, dstw));
1617 src = dst_r;
1618 }
1619
1620 switch (GET_OPCODE(op)) {
1621 case SLJIT_MOV_F64:
1622 if (src != dst_r) {
1623 if (dst_r != TMP_FREG1)
1624 FAIL_IF(push_inst(compiler, MOV_S | FMT(op) | FS(src) | FD(dst_r), MOVABLE_INS));
1625 else
1626 dst_r = src;
1627 }
1628 break;
1629 case SLJIT_NEG_F64:
1630 FAIL_IF(push_inst(compiler, NEG_S | FMT(op) | FS(src) | FD(dst_r), MOVABLE_INS));
1631 break;
1632 case SLJIT_ABS_F64:
1633 FAIL_IF(push_inst(compiler, ABS_S | FMT(op) | FS(src) | FD(dst_r), MOVABLE_INS));
1634 break;
1635 case SLJIT_CONV_F64_FROM_F32:
1636 FAIL_IF(push_inst(compiler, CVT_S_S | ((op & SLJIT_F32_OP) ? 1 : (1 << 21)) | FS(src) | FD(dst_r), MOVABLE_INS));
1637 op ^= SLJIT_F32_OP;
1638 break;
1639 }
1640
1641 if (dst & SLJIT_MEM)
1642 return emit_op_mem2(compiler, FLOAT_DATA(op), FR(dst_r), dst, dstw, 0, 0);
1643 return SLJIT_SUCCESS;
1644 }
1645
1646 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_fop2(struct sljit_compiler *compiler, sljit_s32 op,
1647 sljit_s32 dst, sljit_sw dstw,
1648 sljit_s32 src1, sljit_sw src1w,
1649 sljit_s32 src2, sljit_sw src2w)
1650 {
1651 sljit_s32 dst_r, flags = 0;
1652
1653 CHECK_ERROR();
1654 CHECK(check_sljit_emit_fop2(compiler, op, dst, dstw, src1, src1w, src2, src2w));
1655 ADJUST_LOCAL_OFFSET(dst, dstw);
1656 ADJUST_LOCAL_OFFSET(src1, src1w);
1657 ADJUST_LOCAL_OFFSET(src2, src2w);
1658
1659 compiler->cache_arg = 0;
1660 compiler->cache_argw = 0;
1661
1662 dst_r = FAST_IS_REG(dst) ? dst : TMP_FREG2;
1663
1664 if (src1 & SLJIT_MEM) {
1665 if (getput_arg_fast(compiler, FLOAT_DATA(op) | LOAD_DATA, FR(TMP_FREG1), src1, src1w)) {
1666 FAIL_IF(compiler->error);
1667 src1 = TMP_FREG1;
1668 } else
1669 flags |= SLOW_SRC1;
1670 }
1671
1672 if (src2 & SLJIT_MEM) {
1673 if (getput_arg_fast(compiler, FLOAT_DATA(op) | LOAD_DATA, FR(TMP_FREG2), src2, src2w)) {
1674 FAIL_IF(compiler->error);
1675 src2 = TMP_FREG2;
1676 } else
1677 flags |= SLOW_SRC2;
1678 }
1679
1680 if ((flags & (SLOW_SRC1 | SLOW_SRC2)) == (SLOW_SRC1 | SLOW_SRC2)) {
1681 if (!can_cache(src1, src1w, src2, src2w) && can_cache(src1, src1w, dst, dstw)) {
1682 FAIL_IF(getput_arg(compiler, FLOAT_DATA(op) | LOAD_DATA, FR(TMP_FREG2), src2, src2w, src1, src1w));
1683 FAIL_IF(getput_arg(compiler, FLOAT_DATA(op) | LOAD_DATA, FR(TMP_FREG1), src1, src1w, dst, dstw));
1684 }
1685 else {
1686 FAIL_IF(getput_arg(compiler, FLOAT_DATA(op) | LOAD_DATA, FR(TMP_FREG1), src1, src1w, src2, src2w));
1687 FAIL_IF(getput_arg(compiler, FLOAT_DATA(op) | LOAD_DATA, FR(TMP_FREG2), src2, src2w, dst, dstw));
1688 }
1689 }
1690 else if (flags & SLOW_SRC1)
1691 FAIL_IF(getput_arg(compiler, FLOAT_DATA(op) | LOAD_DATA, FR(TMP_FREG1), src1, src1w, dst, dstw));
1692 else if (flags & SLOW_SRC2)
1693 FAIL_IF(getput_arg(compiler, FLOAT_DATA(op) | LOAD_DATA, FR(TMP_FREG2), src2, src2w, dst, dstw));
1694
1695 if (flags & SLOW_SRC1)
1696 src1 = TMP_FREG1;
1697 if (flags & SLOW_SRC2)
1698 src2 = TMP_FREG2;
1699
1700 switch (GET_OPCODE(op)) {
1701 case SLJIT_ADD_F64:
1702 FAIL_IF(push_inst(compiler, ADD_S | FMT(op) | FT(src2) | FS(src1) | FD(dst_r), MOVABLE_INS));
1703 break;
1704
1705 case SLJIT_SUB_F64:
1706 FAIL_IF(push_inst(compiler, SUB_S | FMT(op) | FT(src2) | FS(src1) | FD(dst_r), MOVABLE_INS));
1707 break;
1708
1709 case SLJIT_MUL_F64:
1710 FAIL_IF(push_inst(compiler, MUL_S | FMT(op) | FT(src2) | FS(src1) | FD(dst_r), MOVABLE_INS));
1711 break;
1712
1713 case SLJIT_DIV_F64:
1714 FAIL_IF(push_inst(compiler, DIV_S | FMT(op) | FT(src2) | FS(src1) | FD(dst_r), MOVABLE_INS));
1715 break;
1716 }
1717
1718 if (dst_r == TMP_FREG2)
1719 FAIL_IF(emit_op_mem2(compiler, FLOAT_DATA(op), FR(TMP_FREG2), dst, dstw, 0, 0));
1720
1721 return SLJIT_SUCCESS;
1722 }
1723
1724 /* --------------------------------------------------------------------- */
1725 /* Other instructions */
1726 /* --------------------------------------------------------------------- */
1727
1728 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_fast_enter(struct sljit_compiler *compiler, sljit_s32 dst, sljit_sw dstw)
1729 {
1730 CHECK_ERROR();
1731 CHECK(check_sljit_emit_fast_enter(compiler, dst, dstw));
1732 ADJUST_LOCAL_OFFSET(dst, dstw);
1733
1734 if (FAST_IS_REG(dst))
1735 return push_inst(compiler, ADDU_W | SA(RETURN_ADDR_REG) | TA(0) | D(dst), DR(dst));
1736
1737 /* Memory. */
1738 return emit_op_mem(compiler, WORD_DATA, RETURN_ADDR_REG, dst, dstw);
1739 }
1740
1741 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_fast_return(struct sljit_compiler *compiler, sljit_s32 src, sljit_sw srcw)
1742 {
1743 CHECK_ERROR();
1744 CHECK(check_sljit_emit_fast_return(compiler, src, srcw));
1745 ADJUST_LOCAL_OFFSET(src, srcw);
1746
1747 if (FAST_IS_REG(src))
1748 FAIL_IF(push_inst(compiler, ADDU_W | S(src) | TA(0) | DA(RETURN_ADDR_REG), RETURN_ADDR_REG));
1749 else
1750 FAIL_IF(emit_op_mem(compiler, WORD_DATA | LOAD_DATA, RETURN_ADDR_REG, src, srcw));
1751
1752 FAIL_IF(push_inst(compiler, JR | SA(RETURN_ADDR_REG), UNMOVABLE_INS));
1753 return push_inst(compiler, NOP, UNMOVABLE_INS);
1754 }
1755
1756 /* --------------------------------------------------------------------- */
1757 /* Conditional instructions */
1758 /* --------------------------------------------------------------------- */
1759
1760 SLJIT_API_FUNC_ATTRIBUTE struct sljit_label* sljit_emit_label(struct sljit_compiler *compiler)
1761 {
1762 struct sljit_label *label;
1763
1764 CHECK_ERROR_PTR();
1765 CHECK_PTR(check_sljit_emit_label(compiler));
1766
1767 if (compiler->last_label && compiler->last_label->size == compiler->size)
1768 return compiler->last_label;
1769
1770 label = (struct sljit_label*)ensure_abuf(compiler, sizeof(struct sljit_label));
1771 PTR_FAIL_IF(!label);
1772 set_label(label, compiler);
1773 compiler->delay_slot = UNMOVABLE_INS;
1774 return label;
1775 }
1776
1777 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
1778 #define JUMP_LENGTH 4
1779 #else
1780 #define JUMP_LENGTH 8
1781 #endif
1782
1783 #define BR_Z(src) \
1784 inst = BEQ | SA(src) | TA(0) | JUMP_LENGTH; \
1785 flags = IS_BIT26_COND; \
1786 delay_check = src;
1787
1788 #define BR_NZ(src) \
1789 inst = BNE | SA(src) | TA(0) | JUMP_LENGTH; \
1790 flags = IS_BIT26_COND; \
1791 delay_check = src;
1792
1793 #if (defined SLJIT_MIPS_R6 && SLJIT_MIPS_R6)
1794
1795 #define BR_T() \
1796 inst = BC1NEZ; \
1797 flags = IS_BIT23_COND; \
1798 delay_check = FCSR_FCC;
1799 #define BR_F() \
1800 inst = BC1EQZ; \
1801 flags = IS_BIT23_COND; \
1802 delay_check = FCSR_FCC;
1803
1804 #else /* !SLJIT_MIPS_R6 */
1805
1806 #define BR_T() \
1807 inst = BC1T | JUMP_LENGTH; \
1808 flags = IS_BIT16_COND; \
1809 delay_check = FCSR_FCC;
1810 #define BR_F() \
1811 inst = BC1F | JUMP_LENGTH; \
1812 flags = IS_BIT16_COND; \
1813 delay_check = FCSR_FCC;
1814
1815 #endif /* SLJIT_MIPS_R6 */
1816
1817 SLJIT_API_FUNC_ATTRIBUTE struct sljit_jump* sljit_emit_jump(struct sljit_compiler *compiler, sljit_s32 type)
1818 {
1819 struct sljit_jump *jump;
1820 sljit_ins inst;
1821 sljit_s32 flags = 0;
1822 sljit_s32 delay_check = UNMOVABLE_INS;
1823
1824 CHECK_ERROR_PTR();
1825 CHECK_PTR(check_sljit_emit_jump(compiler, type));
1826
1827 jump = (struct sljit_jump*)ensure_abuf(compiler, sizeof(struct sljit_jump));
1828 PTR_FAIL_IF(!jump);
1829 set_jump(jump, compiler, type & SLJIT_REWRITABLE_JUMP);
1830 type &= 0xff;
1831
1832 switch (type) {
1833 case SLJIT_EQUAL:
1834 BR_NZ(EQUAL_FLAG);
1835 break;
1836 case SLJIT_NOT_EQUAL:
1837 BR_Z(EQUAL_FLAG);
1838 break;
1839 case SLJIT_LESS:
1840 case SLJIT_GREATER:
1841 case SLJIT_SIG_LESS:
1842 case SLJIT_SIG_GREATER:
1843 case SLJIT_OVERFLOW:
1844 case SLJIT_MUL_OVERFLOW:
1845 BR_Z(OTHER_FLAG);
1846 break;
1847 case SLJIT_GREATER_EQUAL:
1848 case SLJIT_LESS_EQUAL:
1849 case SLJIT_SIG_GREATER_EQUAL:
1850 case SLJIT_SIG_LESS_EQUAL:
1851 case SLJIT_NOT_OVERFLOW:
1852 case SLJIT_MUL_NOT_OVERFLOW:
1853 BR_NZ(OTHER_FLAG);
1854 break;
1855 case SLJIT_NOT_EQUAL_F64:
1856 case SLJIT_GREATER_EQUAL_F64:
1857 case SLJIT_GREATER_F64:
1858 case SLJIT_ORDERED_F64:
1859 BR_T();
1860 break;
1861 case SLJIT_EQUAL_F64:
1862 case SLJIT_LESS_F64:
1863 case SLJIT_LESS_EQUAL_F64:
1864 case SLJIT_UNORDERED_F64:
1865 BR_F();
1866 break;
1867 default:
1868 /* Not conditional branch. */
1869 inst = 0;
1870 break;
1871 }
1872
1873 jump->flags |= flags;
1874 if (compiler->delay_slot == MOVABLE_INS || (compiler->delay_slot != UNMOVABLE_INS && compiler->delay_slot != delay_check))
1875 jump->flags |= IS_MOVABLE;
1876
1877 if (inst)
1878 PTR_FAIL_IF(push_inst(compiler, inst, UNMOVABLE_INS));
1879
1880 PTR_FAIL_IF(emit_const(compiler, TMP_REG2, 0));
1881
1882 if (type <= SLJIT_JUMP)
1883 PTR_FAIL_IF(push_inst(compiler, JR | S(TMP_REG2), UNMOVABLE_INS));
1884 else {
1885 jump->flags |= IS_JAL;
1886 PTR_FAIL_IF(push_inst(compiler, JALR | S(TMP_REG2) | DA(RETURN_ADDR_REG), UNMOVABLE_INS));
1887 }
1888
1889 jump->addr = compiler->size;
1890 PTR_FAIL_IF(push_inst(compiler, NOP, UNMOVABLE_INS));
1891 return jump;
1892 }
1893
1894 #define RESOLVE_IMM1() \
1895 if (src1 & SLJIT_IMM) { \
1896 if (src1w) { \
1897 PTR_FAIL_IF(load_immediate(compiler, DR(TMP_REG1), src1w)); \
1898 src1 = TMP_REG1; \
1899 } \
1900 else \
1901 src1 = 0; \
1902 }
1903
1904 #define RESOLVE_IMM2() \
1905 if (src2 & SLJIT_IMM) { \
1906 if (src2w) { \
1907 PTR_FAIL_IF(load_immediate(compiler, DR(TMP_REG2), src2w)); \
1908 src2 = TMP_REG2; \
1909 } \
1910 else \
1911 src2 = 0; \
1912 }
1913
1914 SLJIT_API_FUNC_ATTRIBUTE struct sljit_jump* sljit_emit_cmp(struct sljit_compiler *compiler, sljit_s32 type,
1915 sljit_s32 src1, sljit_sw src1w,
1916 sljit_s32 src2, sljit_sw src2w)
1917 {
1918 struct sljit_jump *jump;
1919 sljit_s32 flags;
1920 sljit_ins inst;
1921
1922 CHECK_ERROR_PTR();
1923 CHECK_PTR(check_sljit_emit_cmp(compiler, type, src1, src1w, src2, src2w));
1924 ADJUST_LOCAL_OFFSET(src1, src1w);
1925 ADJUST_LOCAL_OFFSET(src2, src2w);
1926
1927 compiler->cache_arg = 0;
1928 compiler->cache_argw = 0;
1929 flags = ((type & SLJIT_I32_OP) ? INT_DATA : WORD_DATA) | LOAD_DATA;
1930 if (src1 & SLJIT_MEM) {
1931 PTR_FAIL_IF(emit_op_mem2(compiler, flags, DR(TMP_REG1), src1, src1w, src2, src2w));
1932 src1 = TMP_REG1;
1933 }
1934 if (src2 & SLJIT_MEM) {
1935 PTR_FAIL_IF(emit_op_mem2(compiler, flags, DR(TMP_REG2), src2, src2w, 0, 0));
1936 src2 = TMP_REG2;
1937 }
1938
1939 jump = (struct sljit_jump*)ensure_abuf(compiler, sizeof(struct sljit_jump));
1940 PTR_FAIL_IF(!jump);
1941 set_jump(jump, compiler, type & SLJIT_REWRITABLE_JUMP);
1942 type &= 0xff;
1943
1944 if (type <= SLJIT_NOT_EQUAL) {
1945 RESOLVE_IMM1();
1946 RESOLVE_IMM2();
1947 jump->flags |= IS_BIT26_COND;
1948 if (compiler->delay_slot == MOVABLE_INS || (compiler->delay_slot != UNMOVABLE_INS && compiler->delay_slot != DR(src1) && compiler->delay_slot != DR(src2)))
1949 jump->flags |= IS_MOVABLE;
1950 PTR_FAIL_IF(push_inst(compiler, (type == SLJIT_EQUAL ? BNE : BEQ) | S(src1) | T(src2) | JUMP_LENGTH, UNMOVABLE_INS));
1951 }
1952 else if (type >= SLJIT_SIG_LESS && (((src1 & SLJIT_IMM) && (src1w == 0)) || ((src2 & SLJIT_IMM) && (src2w == 0)))) {
1953 inst = NOP;
1954 if ((src1 & SLJIT_IMM) && (src1w == 0)) {
1955 RESOLVE_IMM2();
1956 switch (type) {
1957 case SLJIT_SIG_LESS:
1958 inst = BLEZ;
1959 jump->flags |= IS_BIT26_COND;
1960 break;
1961 case SLJIT_SIG_GREATER_EQUAL:
1962 inst = BGTZ;
1963 jump->flags |= IS_BIT26_COND;
1964 break;
1965 case SLJIT_SIG_GREATER:
1966 inst = BGEZ;
1967 jump->flags |= IS_BIT16_COND;
1968 break;
1969 case SLJIT_SIG_LESS_EQUAL:
1970 inst = BLTZ;
1971 jump->flags |= IS_BIT16_COND;
1972 break;
1973 }
1974 src1 = src2;
1975 }
1976 else {
1977 RESOLVE_IMM1();
1978 switch (type) {
1979 case SLJIT_SIG_LESS:
1980 inst = BGEZ;
1981 jump->flags |= IS_BIT16_COND;
1982 break;
1983 case SLJIT_SIG_GREATER_EQUAL:
1984 inst = BLTZ;
1985 jump->flags |= IS_BIT16_COND;
1986 break;
1987 case SLJIT_SIG_GREATER:
1988 inst = BLEZ;
1989 jump->flags |= IS_BIT26_COND;
1990 break;
1991 case SLJIT_SIG_LESS_EQUAL:
1992 inst = BGTZ;
1993 jump->flags |= IS_BIT26_COND;
1994 break;
1995 }
1996 }
1997 PTR_FAIL_IF(push_inst(compiler, inst | S(src1) | JUMP_LENGTH, UNMOVABLE_INS));
1998 }
1999 else {
2000 if (type == SLJIT_LESS || type == SLJIT_GREATER_EQUAL || type == SLJIT_SIG_LESS || type == SLJIT_SIG_GREATER_EQUAL) {
2001 RESOLVE_IMM1();
2002 if ((src2 & SLJIT_IMM) && src2w <= SIMM_MAX && src2w >= SIMM_MIN)
2003 PTR_FAIL_IF(push_inst(compiler, (type <= SLJIT_LESS_EQUAL ? SLTIU : SLTI) | S(src1) | T(TMP_REG1) | IMM(src2w), DR(TMP_REG1)));
2004 else {
2005 RESOLVE_IMM2();
2006 PTR_FAIL_IF(push_inst(compiler, (type <= SLJIT_LESS_EQUAL ? SLTU : SLT) | S(src1) | T(src2) | D(TMP_REG1), DR(TMP_REG1)));
2007 }
2008 type = (type == SLJIT_LESS || type == SLJIT_SIG_LESS) ? SLJIT_NOT_EQUAL : SLJIT_EQUAL;
2009 }
2010 else {
2011 RESOLVE_IMM2();
2012 if ((src1 & SLJIT_IMM) && src1w <= SIMM_MAX && src1w >= SIMM_MIN)
2013 PTR_FAIL_IF(push_inst(compiler, (type <= SLJIT_LESS_EQUAL ? SLTIU : SLTI) | S(src2) | T(TMP_REG1) | IMM(src1w), DR(TMP_REG1)));
2014 else {
2015 RESOLVE_IMM1();
2016 PTR_FAIL_IF(push_inst(compiler, (type <= SLJIT_LESS_EQUAL ? SLTU : SLT) | S(src2) | T(src1) | D(TMP_REG1), DR(TMP_REG1)));
2017 }
2018 type = (type == SLJIT_GREATER || type == SLJIT_SIG_GREATER) ? SLJIT_NOT_EQUAL : SLJIT_EQUAL;
2019 }
2020
2021 jump->flags |= IS_BIT26_COND;
2022 PTR_FAIL_IF(push_inst(compiler, (type == SLJIT_EQUAL ? BNE : BEQ) | S(TMP_REG1) | TA(0) | JUMP_LENGTH, UNMOVABLE_INS));
2023 }
2024
2025 PTR_FAIL_IF(emit_const(compiler, TMP_REG2, 0));
2026 PTR_FAIL_IF(push_inst(compiler, JR | S(TMP_REG2), UNMOVABLE_INS));
2027 jump->addr = compiler->size;
2028 PTR_FAIL_IF(push_inst(compiler, NOP, UNMOVABLE_INS));
2029 return jump;
2030 }
2031
2032 #undef RESOLVE_IMM1
2033 #undef RESOLVE_IMM2
2034
2035 #undef JUMP_LENGTH
2036 #undef BR_Z
2037 #undef BR_NZ
2038 #undef BR_T
2039 #undef BR_F
2040
2041 #undef FLOAT_DATA
2042 #undef FMT
2043
2044 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_ijump(struct sljit_compiler *compiler, sljit_s32 type, sljit_s32 src, sljit_sw srcw)
2045 {
2046 struct sljit_jump *jump = NULL;
2047
2048 CHECK_ERROR();
2049 CHECK(check_sljit_emit_ijump(compiler, type, src, srcw));
2050 ADJUST_LOCAL_OFFSET(src, srcw);
2051
2052 if (src & SLJIT_IMM) {
2053 jump = (struct sljit_jump*)ensure_abuf(compiler, sizeof(struct sljit_jump));
2054 FAIL_IF(!jump);
2055 set_jump(jump, compiler, JUMP_ADDR | ((type >= SLJIT_FAST_CALL) ? IS_JAL : 0));
2056 jump->u.target = srcw;
2057
2058 if (compiler->delay_slot != UNMOVABLE_INS)
2059 jump->flags |= IS_MOVABLE;
2060
2061 FAIL_IF(emit_const(compiler, TMP_REG2, 0));
2062 src = TMP_REG2;
2063 }
2064 else if (src & SLJIT_MEM) {
2065 FAIL_IF(emit_op_mem(compiler, WORD_DATA | LOAD_DATA, DR(TMP_REG2), src, srcw));
2066 src = TMP_REG2;
2067 }
2068
2069 FAIL_IF(push_inst(compiler, JR | S(src), UNMOVABLE_INS));
2070 if (jump)
2071 jump->addr = compiler->size;
2072 FAIL_IF(push_inst(compiler, NOP, UNMOVABLE_INS));
2073 return SLJIT_SUCCESS;
2074 }
2075
2076 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_op_flags(struct sljit_compiler *compiler, sljit_s32 op,
2077 sljit_s32 dst, sljit_sw dstw,
2078 sljit_s32 type)
2079 {
2080 sljit_s32 src_ar, dst_ar;
2081 sljit_s32 saved_op = op;
2082 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
2083 sljit_s32 mem_type = WORD_DATA;
2084 #else
2085 sljit_s32 mem_type = (op & SLJIT_I32_OP) ? (INT_DATA | SIGNED_DATA) : WORD_DATA;
2086 #endif
2087
2088 CHECK_ERROR();
2089 CHECK(check_sljit_emit_op_flags(compiler, op, dst, dstw, type));
2090 ADJUST_LOCAL_OFFSET(dst, dstw);
2091
2092 op = GET_OPCODE(op);
2093 #if (defined SLJIT_CONFIG_MIPS_64 && SLJIT_CONFIG_MIPS_64)
2094 if (op == SLJIT_MOV_S32)
2095 mem_type = INT_DATA | SIGNED_DATA;
2096 #endif
2097 dst_ar = DR((op < SLJIT_ADD && FAST_IS_REG(dst)) ? dst : TMP_REG2);
2098
2099 compiler->cache_arg = 0;
2100 compiler->cache_argw = 0;
2101
2102 if (op >= SLJIT_ADD && (dst & SLJIT_MEM))
2103 FAIL_IF(emit_op_mem2(compiler, mem_type | LOAD_DATA, DR(TMP_REG1), dst, dstw, dst, dstw));
2104
2105 switch (type & 0xff) {
2106 case SLJIT_EQUAL:
2107 case SLJIT_NOT_EQUAL:
2108 FAIL_IF(push_inst(compiler, SLTIU | SA(EQUAL_FLAG) | TA(dst_ar) | IMM(1), dst_ar));
2109 src_ar = dst_ar;
2110 break;
2111 case SLJIT_MUL_OVERFLOW:
2112 case SLJIT_MUL_NOT_OVERFLOW:
2113 FAIL_IF(push_inst(compiler, SLTIU | SA(OTHER_FLAG) | TA(dst_ar) | IMM(1), dst_ar));
2114 src_ar = dst_ar;
2115 type ^= 0x1; /* Flip type bit for the XORI below. */
2116 break;
2117 case SLJIT_GREATER_F64:
2118 case SLJIT_LESS_EQUAL_F64:
2119 type ^= 0x1; /* Flip type bit for the XORI below. */
2120 case SLJIT_EQUAL_F64:
2121 case SLJIT_NOT_EQUAL_F64:
2122 case SLJIT_LESS_F64:
2123 case SLJIT_GREATER_EQUAL_F64:
2124 case SLJIT_UNORDERED_F64:
2125 case SLJIT_ORDERED_F64:
2126 #if (defined SLJIT_MIPS_R6 && SLJIT_MIPS_R6)
2127 FAIL_IF(push_inst(compiler, MFC1 | TA(dst_ar) | FS(TMP_FREG3), dst_ar));
2128 #else /* !SLJIT_MIPS_R6 */
2129 FAIL_IF(push_inst(compiler, CFC1 | TA(dst_ar) | DA(FCSR_REG), dst_ar));
2130 #endif /* SLJIT_MIPS_R6 */
2131 FAIL_IF(push_inst(compiler, SRL | TA(dst_ar) | DA(dst_ar) | SH_IMM(23), dst_ar));
2132 FAIL_IF(push_inst(compiler, ANDI | SA(dst_ar) | TA(dst_ar) | IMM(1), dst_ar));
2133 src_ar = dst_ar;
2134 break;
2135
2136 default:
2137 src_ar = OTHER_FLAG;
2138 break;
2139 }
2140
2141 if (type & 0x1) {
2142 FAIL_IF(push_inst(compiler, XORI | SA(src_ar) | TA(dst_ar) | IMM(1), dst_ar));
2143 src_ar = dst_ar;
2144 }
2145
2146 if (op < SLJIT_ADD) {
2147 if (dst & SLJIT_MEM)
2148 return emit_op_mem(compiler, mem_type, src_ar, dst, dstw);
2149
2150 if (src_ar != dst_ar)
2151 return push_inst(compiler, ADDU_W | SA(src_ar) | TA(0) | DA(dst_ar), dst_ar);
2152 return SLJIT_SUCCESS;
2153 }
2154
2155 /* OTHER_FLAG cannot be specified as src2 argument at the moment. */
2156 if (DR(TMP_REG2) != src_ar)
2157 FAIL_IF(push_inst(compiler, ADDU_W | SA(src_ar) | TA(0) | D(TMP_REG2), DR(TMP_REG2)));
2158
2159 mem_type |= CUMULATIVE_OP | LOGICAL_OP | IMM_OP | ALT_KEEP_CACHE;
2160
2161 if (dst & SLJIT_MEM)
2162 return emit_op(compiler, saved_op, mem_type, dst, dstw, TMP_REG1, 0, TMP_REG2, 0);
2163 return emit_op(compiler, saved_op, mem_type, dst, dstw, dst, dstw, TMP_REG2, 0);
2164 }
2165
2166 SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_cmov(struct sljit_compiler *compiler, sljit_s32 type,
2167 sljit_s32 dst_reg,
2168 sljit_s32 src, sljit_sw srcw)
2169 {
2170 #if (defined SLJIT_MIPS_R1 && SLJIT_MIPS_R1)
2171 sljit_ins ins;
2172 #endif
2173
2174 CHECK_ERROR();
2175 CHECK(check_sljit_emit_cmov(compiler, type, dst_reg, src, srcw));
2176
2177 #if (defined SLJIT_MIPS_R1 && SLJIT_MIPS_R1)
2178
2179 if (SLJIT_UNLIKELY(src & SLJIT_IMM)) {
2180 #if (defined SLJIT_CONFIG_MIPS_64 && SLJIT_CONFIG_MIPS_64)
2181 if (dst_reg & SLJIT_I32_OP)
2182 srcw = (sljit_s32)srcw;
2183 #endif
2184 FAIL_IF(load_immediate(compiler, DR(TMP_REG1), srcw));
2185 src = TMP_REG1;
2186 srcw = 0;
2187 }
2188
2189 dst_reg &= ~SLJIT_I32_OP;
2190
2191 switch (type & 0xff) {
2192 case SLJIT_EQUAL:
2193 ins = MOVZ | TA(EQUAL_FLAG);
2194 break;
2195 case SLJIT_NOT_EQUAL:
2196 ins = MOVN | TA(EQUAL_FLAG);
2197 break;
2198 case SLJIT_LESS:
2199 case SLJIT_GREATER:
2200 case SLJIT_SIG_LESS:
2201 case SLJIT_SIG_GREATER:
2202 case SLJIT_OVERFLOW:
2203 case SLJIT_MUL_OVERFLOW:
2204 ins = MOVN | TA(OTHER_FLAG);
2205 break;
2206 case SLJIT_GREATER_EQUAL:
2207 case SLJIT_LESS_EQUAL:
2208 case SLJIT_SIG_GREATER_EQUAL:
2209 case SLJIT_SIG_LESS_EQUAL:
2210 case SLJIT_NOT_OVERFLOW:
2211 case SLJIT_MUL_NOT_OVERFLOW:
2212 ins = MOVZ | TA(OTHER_FLAG);
2213 break;
2214 case SLJIT_EQUAL_F64:
2215 case SLJIT_LESS_F64:
2216 case SLJIT_LESS_EQUAL_F64:
2217 case SLJIT_UNORDERED_F64:
2218 ins = MOVT;
2219 break;
2220 case SLJIT_NOT_EQUAL_F64:
2221 case SLJIT_GREATER_EQUAL_F64:
2222 case SLJIT_GREATER_F64:
2223 case SLJIT_ORDERED_F64:
2224 ins = MOVF;
2225 break;
2226 default:
2227 ins = MOVZ | TA(OTHER_FLAG);
2228 SLJIT_UNREACHABLE();
2229 break;
2230 }
2231
2232 return push_inst(compiler, ins | S(src) | D(dst_reg), DR(dst_reg));
2233
2234 #else
2235 return sljit_emit_cmov_generic(compiler, type, dst_reg, src, srcw);
2236 #endif
2237 }
2238
2239 SLJIT_API_FUNC_ATTRIBUTE struct sljit_const* sljit_emit_const(struct sljit_compiler *compiler, sljit_s32 dst, sljit_sw dstw, sljit_sw init_value)
2240 {
2241 struct sljit_const *const_;
2242 sljit_s32 dst_r;
2243
2244 CHECK_ERROR_PTR();
2245 CHECK_PTR(check_sljit_emit_const(compiler, dst, dstw, init_value));
2246 ADJUST_LOCAL_OFFSET(dst, dstw);
2247
2248 const_ = (struct sljit_const*)ensure_abuf(compiler, sizeof(struct sljit_const));
2249 PTR_FAIL_IF(!const_);
2250 set_const(const_, compiler);
2251
2252 dst_r = FAST_IS_REG(dst) ? dst : TMP_REG2;
2253 PTR_FAIL_IF(emit_const(compiler, dst_r, init_value));
2254
2255 if (dst & SLJIT_MEM)
2256 PTR_FAIL_IF(emit_op(compiler, SLJIT_MOV, WORD_DATA, dst, dstw, TMP_REG1, 0, TMP_REG2, 0));
2257
2258 return const_;
2259 }
2260
2261 SLJIT_API_FUNC_ATTRIBUTE struct sljit_put_label* sljit_emit_put_label(struct sljit_compiler *compiler, sljit_s32 dst, sljit_sw dstw)
2262 {
2263 struct sljit_put_label *put_label;
2264 sljit_s32 dst_r;
2265
2266 CHECK_ERROR_PTR();
2267 CHECK_PTR(check_sljit_emit_put_label(compiler, dst, dstw));
2268 ADJUST_LOCAL_OFFSET(dst, dstw);
2269
2270 put_label = (struct sljit_put_label*)ensure_abuf(compiler, sizeof(struct sljit_put_label));
2271 PTR_FAIL_IF(!put_label);
2272 set_put_label(put_label, compiler, 0);
2273
2274 dst_r = FAST_IS_REG(dst) ? dst : TMP_REG2;
2275 #if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32)
2276 PTR_FAIL_IF(emit_const(compiler, dst_r, 0));
2277 #else
2278 PTR_FAIL_IF(push_inst(compiler, dst_r, UNMOVABLE_INS));
2279 compiler->size += 5;
2280 #endif
2281
2282 if (dst & SLJIT_MEM)
2283 PTR_FAIL_IF(emit_op(compiler, SLJIT_MOV, WORD_DATA, dst, dstw, TMP_REG1, 0, TMP_REG2, 0));
2284
2285 return put_label;
2286 }

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